TW202209071A - Electronic device - Google Patents

Abstract

An electronic device including a substrate, transversal signal lines, first vertical signal lines, second vertical signal lines, pixel structures, touch pads and shielding vertical lines is providing. The transversal signal lines, the first vertical signal lines, the second vertical signal lines, the pixel structures, the touch pads and the shielding vertical lines are disposed on the substrate. The first vertical signal lines and the second vertical signal lines are intersected with the transversal signal lines and each of the second vertical signal lines is connected to one of the transversal signal lines. Each of the pixel structures is connected to one of the transversal signal lines and one of the first vertical signal lines, and includes a pixel electrode. Each of the shielding vertical lines is connected to one of the touch pads. The shielding vertical lines, the first vertical signal lines and the second vertical signal lines are the same layer. The shielding vertical lines are located between at least two of the lines chosen from the group of the first vertical signal lines and the second vertical signal lines between two adjacent pixel electrodes.

Description

electronic device

The present invention relates to an electronic device.

With the popularization of electronic products, circuit layouts in various electronic devices are also complicated. Therefore, many adjacent lines may be used to carry different types of signals. However, the coupling effect between adjacent lines often affects the quality of signal transmission, resulting in the final performance not meeting expectations. Therefore, the planning of circuit layout is often one of the design priorities in electronic products.

The present invention provides an electronic device whose design can help reduce coupling between lines to provide improved quality.

The present invention provides another electronic device, the design of which can also help reduce the coupling between lines, and has a larger and uniform aperture ratio to provide improved quality.

The electronic device of the present invention includes a substrate, a plurality of horizontal signal lines, a plurality of first vertical signal lines, a plurality of second vertical signal lines, a plurality of pixel structures, a plurality of touch pads, and a plurality of shielding vertical lines, wherein the the plurality of horizontal signal lines, the plurality of first vertical signal lines, the plurality of second vertical signal lines, the plurality of pixel structures, the plurality of touch pads, and the plurality of shielding vertical lines arranged on the substrate. The plurality of first vertical signal lines and the plurality of second vertical signal lines intersect with the plurality of horizontal signal lines, and the plurality of second vertical signal lines are respectively connected to one of the plurality of horizontal signal lines one. Each of the plurality of pixel structures is connected to one of the plurality of horizontal signal lines, is electrically connected to one of the plurality of first vertical signal lines, and includes a pixel electrode. One of the shielding vertical lines is electrically connected to one of the plurality of touch pads, the plurality of shielding vertical lines, the plurality of first vertical signals and the plurality of second vertical signals For the same film layer, the plurality of shielding vertical lines are respectively located between two adjacent pixel electrodes and are selected from at least two of the plurality of first vertical signal lines and the plurality of second vertical signal line groups. between the bars.

In an embodiment of the present invention, the above-mentioned plurality of shielding vertical lines are respectively located between the first vertical signal line and the second vertical signal line between two adjacent pixel electrodes.

In an embodiment of the present invention, one of the first vertical signal lines and one of the plurality of second vertical signal lines are disposed between each adjacent two rows of the above-mentioned plurality of pixel structures and the shielding longitudinal line is located between the first longitudinal signal line and the second longitudinal signal line.

In an embodiment of the present invention, in the plan view of the above-mentioned electronic device, the touch pad overlaps with the first vertical signal line and the second vertical signal line, and the touch pad and the shielding The vertical lines do not overlap.

In an embodiment of the present invention, each of the above-mentioned pixel structures may include three sub-pixels arranged horizontally, the three sub-pixels are electrically connected to the same horizontal signal line, and the three sub-pixels are respectively electrically connected to the different first vertical signal lines located on the first side of the sub-pixel, the second vertical signal line is located on the first side of the first vertical signal line of the outermost sub-pixel, and The shielding vertical line is located between the second vertical signal line and the first vertical signal line of the outermost sub-pixel.

In an embodiment of the present invention, the above-mentioned electronic device may further include disposing the shielding vertical lines on the first sides of the other two sub-pixels of each of the pixel structures, respectively.

In an embodiment of the present invention, in each of the above pixel structures, the number of the shielding vertical lines between two adjacent sub-pixels is two.

In an embodiment of the present invention, two adjacent rows of the above-mentioned plurality of horizontal signal lines are electrically connected, and each of the pixel structures includes two sub-pixels arranged vertically, wherein the two sub-pixels are respectively The horizontal signal lines of the adjacent two rows are electrically connected, and the first vertical signal lines respectively connected to the two sub-pixels are arranged on opposite sides of the pixel structure. The second longitudinal signal line is located between two adjacent first longitudinal signal lines electrically connected to two adjacent pixel structures, and the shielding longitudinal line is located between the second longitudinal signal line and each of the between the first longitudinal signal lines.

In an embodiment of the present invention, in the plan view of the electronic device, the touch pad overlaps with the first vertical signal line, and the second vertical signal line does not overlap with the touch pad.

In an embodiment of the present invention, in the plan view of the above-mentioned electronic device, the touch pad overlaps with the first vertical signal line, and the second vertical signal line overlaps with the touch pad.

In an embodiment of the present invention, the above-mentioned electronic device may further include an insulating layer and a conduction structure penetrating the insulating layer, where the insulating layer is located between the film layer of the first vertical signal line and the insulating layer. Between the film layers of the touch pads, the shielding vertical line is connected to one of the plurality of touch pads through the conductive structure.

In an embodiment of the present invention, the above-mentioned plurality of shielding vertical lines are respectively located between the two first vertical signal lines between two adjacent pixel electrodes.

In an embodiment of the present invention, each of the above-mentioned pixel structures is surrounded by two adjacent horizontal signal lines and two of the first vertical signal lines disposed on two opposite sides of the pixel structure. The pixel structure includes two sub-pixels arranged horizontally, the second vertical signal line is located between the two sub-pixels in each of the pixel structures, and the shielding vertical line is arranged on two adjacent ones. The pixel structure is electrically connected between two adjacent first vertical signal lines.

In an embodiment of the present invention, in each of the above-mentioned pixel structures, the shielding vertical line may be disposed between the second vertical signal line and each of the sub-pixels.

In an embodiment of the present invention, between two adjacent sub-pixels of each pixel structure described above may include two of the shielding vertical lines and the first shielding vertical line located in the two shielding vertical lines. Two vertical signal lines.

In an embodiment of the present invention, two of the second vertical signal lines and two of the second vertical signal lines may be included between two adjacent sub-pixels of each pixel structure described above and between the two second vertical signal lines between the shielded longitudinal wires.

In an embodiment of the present invention, in the plan view of the above-mentioned electronic device, the first vertical signal line overlaps with the touch pad, the second vertical signal line overlaps with the touch pad, and all the The shielding vertical line does not overlap with the touch pad.

The electronic device of the present invention includes a substrate, a plurality of horizontal signal lines, a plurality of first vertical signal lines, a plurality of second vertical signal lines, a plurality of pixel structures, a plurality of touch pads, and a plurality of shielding vertical lines, wherein the the plurality of horizontal signal lines, the plurality of first vertical signal lines, the plurality of second vertical signal lines, the plurality of pixel structures, the plurality of touch pads, and the plurality of shielding vertical lines arranged on the substrate. The plurality of first vertical signal lines and the plurality of second vertical signal lines intersect with the plurality of horizontal signal lines, and the plurality of second vertical signal lines are respectively connected to one of the plurality of horizontal signal lines one. Each of the plurality of pixel structures is connected to one of the plurality of horizontal signal lines, is electrically connected to one of the plurality of first vertical signal lines, and includes a pixel electrode. One of the shielding vertical lines is electrically connected to one of the plurality of touch pads, the plurality of shielding vertical lines, the plurality of first vertical signals and the plurality of second vertical signals For the same film layer, the plurality of shielding vertical lines are respectively located between two adjacent pixel electrodes and are selected from at least two of the plurality of first vertical signal lines and the plurality of second vertical signal line groups. between the bars. Each pixel structure is surrounded by two adjacent horizontal signal lines and two first vertical signal lines and includes two horizontally arranged sub-pixels, and one of the second vertical signal lines is located in the same Between the two sub-pixels of the pixel structure, the shielding vertical line is located between the second vertical signal line and a pixel electrode of one of the two sub-pixels.

Based on the above, in the electronic device according to an embodiment of the present invention, shielding vertical lines are arranged between the adjacent first vertical signal lines and the second vertical signal lines, so as to reduce the adverse effects caused by the coupling between the lines, instead provide improved quality.

Based on the above, in the electronic device according to another embodiment of the present invention, by separating the first vertical signal line and the second vertical signal line with pixel electrodes, the adverse effects caused by the coupling between the lines are reduced, and Provides improved quality with a larger and uniform aperture ratio.

In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, the following embodiments are given and described in detail with the accompanying drawings as follows.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. The same reference numerals refer to the same elements throughout the specification. It will be understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or Intermediate elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, "connected" may refer to a physical and/or electrical connection. Furthermore, "electrically connected" or "coupled" may refer to the existence of other elements between the two elements.

It will be understood that, although the terms "first", "second", etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, and/or sections should not be limited by limitations of these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, "a first element," "component," "region," "layer" or "section" discussed below could be termed a second element, component, region, layer or section without departing from the teachings herein.

Furthermore, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe one element's relationship to another element, as shown in the figures. It should be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation shown in the figures. For example, if the device in one of the figures is turned over, elements described as being on the "lower" side of other elements would then be oriented on "upper" sides of the other elements. Thus, the exemplary term "lower" may include an orientation of "lower" and "upper", depending on the particular orientation of the figures. Similarly, if the device in one of the figures is turned over, elements described as "below" or "beneath" other elements would then be oriented "above" the other elements. Thus, the exemplary terms "below" or "below" can include an orientation of above and below.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be construed as having meanings consistent with their meanings in the context of the related art and the present invention, and are not to be construed as idealized or excessive Formal meaning, unless expressly defined as such herein.

Exemplary embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments. Thus, variations in the shapes of the illustrations as a result of, for example, manufacturing techniques and/or tolerances, are to be expected. Accordingly, the embodiments described herein should not be construed as limited to the particular shapes of regions as shown herein, but rather include deviations in shapes resulting from, for example, manufacturing. For example, regions illustrated or described as flat may typically have rough and/or nonlinear features. Additionally, the acute angles shown may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the claims.

FIG. 1 is a schematic diagram of a partial circuit of an electronic device according to an embodiment of the present invention. In FIG. 1 , the electronic device 100A includes a substrate 110 , a plurality of horizontal signal lines 120 , a plurality of vertical lines 130 , and a plurality of pixel structures 150 . The plurality of lateral signal lines 120 extend toward the x direction and are arranged on the substrate 110 along the y direction. The plurality of longitudinal lines 130 extend in the y direction, are arranged on the substrate 110 along the x direction, and intersect with the plurality of transverse signal lines 120 , where the x direction may be understood as the transverse direction, and the y direction may be understood as the longitudinal direction. Therefore, the horizontal and vertical directions described in the following embodiments can be regarded as the x-direction and the y-direction in FIG. 1 , respectively. The lateral signal line 120 is, for example, a gate line. The plurality of vertical lines 130 include a plurality of first vertical signal lines V1 and a plurality of second vertical signal lines V2. As shown in FIG. 1 , the vertical signal lines extending along the y direction can be divided into a first vertical signal line V1 directly connected to the pixel structure 150 and a second vertical signal line V2 not directly connected to the pixel structure 150 . The first vertical signal line V1 and the second vertical signal line V2 are, for example, data lines and gate signal transfer lines, respectively. A plurality of pixel structures 150 are arranged on the substrate 110 in an array manner. In other words, the pixel structure 150 presents an array arrangement along the x-direction and the y-direction. Each pixel structure 150 includes at least one sub-pixel, and is respectively connected to one of the plurality of horizontal signal lines 120 and one of the plurality of first vertical signal lines V1 . Each of the second vertical signal lines V2 is connected to one of the plurality of horizontal signal lines 120 through the corresponding conduction structure VIA1. The arrangement of the pixel structure 150, the horizontal signal line 120, the first vertical signal line V1 and the second vertical signal line V2 can be based on 1D1G (1 Data 1 Gate Driving), 2DHG (2 Data Half Gate Driving), HSD (Half Source Driving) Driving) or other possible driving design.

In the embodiment of FIG. 1 , the electronic device 100A is designed in a 1D1G driving manner. Specifically, each pixel structure 150 of the electronic device 100A includes a sub-pixel 150 a, wherein the sub-pixel 150 a includes a pixel electrode 152 and an active element 154 . Each pixel structure 150 is located between two adjacent different lateral signal lines 120 . Different pixel structures 150 arranged in the same row along the x-direction are electrically connected to the same lateral signal line 120 . In order to clearly illustrate the relative positional relationship between the pixel structure and each signal line, the right side in FIG. 1 is taken as the first side, and the left side in FIG. 1 is taken as the second side. In this embodiment, the right side of each pixel structure 150 , that is, the right side of each pixel electrode 152 includes a first vertical signal line V1 electrically connected to the pixel electrode 152 and a first vertical signal line V1 located on the The second vertical signal line V2 on the first side of the first vertical signal line V1. That is to say, in this embodiment, a first vertical signal line V1 and a second vertical signal line V2 are disposed between two adjacent pixel structures 150, and the second vertical signal line V2 is located in the first vertical signal line V2. The first side of a vertical signal line V1.

In the embodiment of FIG. 1 , the longitudinal wire 130 further includes a plurality of shielding longitudinal wires V3. The plurality of shielding vertical lines V3 are respectively located between the two adjacent first vertical signal lines V1 and the second vertical signal lines V2 , in other words, between every two adjacent rows of the plurality of pixel structures 150 . One of the first longitudinal signal lines V1 and one of the plurality of second longitudinal signal lines V2 are provided, and the shielding longitudinal line V3 is located between the first longitudinal signal line V1 and the first longitudinal signal line V1. between the two vertical signal lines V2. Since the shielding vertical line V3 is provided between the adjacent first vertical signal line V1 and the second vertical signal line V2, the adverse effect caused by the coupling between the first vertical signal line V1 and the second vertical signal line V2 can be avoided. .

FIG. 2 is a schematic diagram of one embodiment of the cross section of the electronic device 100A of FIG. 1 along the line A-A'.

Please refer to Figure 1 and Figure 2 at the same time. The electronic device 100A further includes a plurality of touch pads 140 . The plurality of touch pads 140 are arranged on the substrate 110 in an array arrangement, that is, the touch pads 140 are arranged in an array along the x-direction and the y-direction. In the top view direction of the electronic device 100A, the coverage area of each touch pad 140 can cover a plurality of pixel structures 150 , and each shielding vertical line V3 passes through the corresponding conduction structure VIA2 and one of the plurality of touch pads 140 Electrical connection. For example, as shown at the dotted frame in FIG. 1 , the shielding vertical line V3 passing through the dotted frame is electrically connected to the touch pad 140 through the shown conductive structure VIA2 .

The film-layer relationship of each component in the electronic device in FIG. 1 will be described in more detail with reference to FIG. 2 . Referring to FIGS. 1 and 2 , the horizontal signal lines 120 , the insulating layer I0 , the vertical lines 130 , the insulating layer I1 , the touch pads 140 , the insulating layer I2 and the pixel electrodes 152 are sequentially stacked on the substrate 110 . Specifically, the lateral signal line 120 and the gate electrode of the active element 154 have the same film layer, for example. The first vertical signal line V1 , the second vertical signal line V2 and the shielding vertical line V3 are located in the same film layer, for example, the same film layer as the source electrode and the drain electrode of the active element 154 . The insulating layer I0 has a through hole, and the conductive structure VIA1 is embedded in the through hole of the insulating layer I0 to electrically connect the lateral signal line 120 and the first vertical signal line V1. The insulating layer I0 is, for example, a gate dielectric layer. In addition, as shown in FIG. 2 , the touch pad 140 covers the first vertical signal line V1 and the second vertical signal line V2, and the projection range of the touch pad 140 on the substrate 110 covers the first vertical signal line V1 on the substrate 110 and the projection range of the second vertical signal line V2 on the substrate 110 , but the projection of the touch pad 140 on the substrate 110 and the projection of the shielding vertical line V3 on the substrate 110 do not overlap.

FIG. 3 is a schematic partial circuit diagram of an electronic device according to another embodiment of the present invention. In FIG. 3 , a plurality of contact pads 140 are omitted, and only one contact pad 140 is shown as a representative. The electronic device 100B of FIG. 3 is substantially similar to the electronic device 100A of FIG. 1 , so the same components described in the two embodiments may refer to the foregoing contents, and the same configurations in the two embodiments will not be repeated here.

Referring to FIG. 3 , the electronic device 100B of this embodiment is different from the embodiment of FIG. 1 in that the pixel structure 150A of the electronic device 100B includes three sub-pixels 150 a , 150 b and 150 c arranged horizontally, and in this embodiment Among the three sub-pixels of the pixel structure 150A, only one second vertical signal line V2 is set in one of the three sub-pixels.

Specifically, in the single-pixel structure 150A of this embodiment, the three sub-pixels 150a, 150b, 150c are electrically connected to the same horizontal signal line 120, and the three sub-pixels 150a, 150b, 150c A first vertical signal line V1 is respectively provided on the first side (eg, the right side) of the , so as to transmit respective signals to the corresponding sub-pixels 150a, 150b, 150c through each of the first vertical signal lines V1. The second vertical signal line V2 in this embodiment is located on the first side of the first vertical signal line V1 electrically connected to the sub-pixel 150c, and the shielding vertical line V3 is located on the second vertical signal line V2 and the sub-pixel 150c. Between the first vertical signal lines V1 that are electrically connected. In other words, in the single-pixel structure 150A of this embodiment, the first vertical signal line V1 electrically connected to the first side of each sub-pixel 150a, 150b, 150c is provided, but the second vertical signal line V2 and the shielding vertical line V3 are only located on the first side of the first vertical signal line V1 of the sub-pixel 150c, and the shielding vertical line V3 is located on the second vertical signal line V2 and the first vertical signal line V1 of the sub-pixel 150c between. Based on the above configuration, the shielded vertical line V3 can help reduce the signal coupling between the first vertical signal line V1 and the second vertical signal line V2, and reduce the distance between the first vertical signal line V1 and the second vertical signal line V2 Signal transmission interference and increase aperture ratio, while providing improved quality.

FIG. 4 is a schematic diagram of a partial circuit of an electronic device according to another embodiment of the present invention. In FIG. 4 , a plurality of contact pads 140 are omitted, and only one contact pad 140 is shown as a representative, and in this embodiment, some of the contact pads 140 in the substrate projection direction that do not cover the shielding vertical line V3 are omitted. Relevant marking of open lines to make the diagram more clear. The electronic device 100C of FIG. 4 is substantially similar to the electronic device 100B of FIG. 2 , so the same components described in the two embodiments may refer to the foregoing contents, and the same configurations in the two embodiments will not be repeated here.

Referring to FIG. 4 , the electronic device 100C of this embodiment is different from the embodiment of FIG. 3 in that the electronic device 100C further sets shielding vertical lines on the right sides of the other two sub-pixels 150a and 150b in the pixel structure 150A, respectively. Line V3. That is, in the single pixel structure 150A of this embodiment, a first vertical signal is included between two adjacent sub-pixels (that is, between the sub-pixels 150a and 150b and between the sub-pixels 150b and 150c). Line V1 and a shielded vertical line V3.

Specifically, in the single-pixel structure 150A, a shielding vertical line V3 is respectively provided on the first side of the first vertical signal line V1 on the first side of the sub-pixels 150a and 150b. That is to say, in the single pixel structure 150A, each sub-pixel 150a, 150b, 150c is provided with a first vertical signal line V1 and a shielding vertical line V3 on the first side, and the second vertical signal line V2 is only The first side of the shield vertical line V3 on the first side of the sub-pixel 150c. Based on the above configuration, adverse effects caused by coupling between the first vertical signal line V1 and the second vertical signal line V2 can be avoided, more touch pads 140 can be supported, and improved quality can be provided.

FIG. 5 is a schematic diagram of a partial circuit of an electronic device according to another embodiment of the present invention. In FIG. 5 , a plurality of contact pads 140 are omitted, and only one contact pad 140 is shown as a representative, and in this embodiment, some of the contact pads 140 in the projection direction of the substrate do not cover the cutoff of the shielding vertical line V3 is omitted. Relevant marking of open lines to make the diagram more clear. The electronic device 100D of FIG. 5 is substantially similar to the electronic device 100C of FIG. 4 , so the same components described in the two embodiments can refer to the above-mentioned contents, and the same configurations in the two embodiments are not repeated here.

Referring to FIG. 5 , the electronic device 100D of this embodiment is different from the embodiment of FIG. 4 in that, in the single pixel structure 150A, between two adjacent sub-pixels (that is, between the sub-pixels 150a and 150b ) and the sub-pixels 150b, 150c) includes a first vertical signal line V1 and two shielding vertical lines V3.

Specifically, in the single-pixel structure 150A, two shielding vertical lines V3 are respectively provided on the right side of the first vertical signal line V1 to which the sub-pixels 150a and 150b are electrically connected. In other words, in the single-pixel structure 150A, the first sides of the sub-pixels 150a and 150b are both provided with a first vertical signal line V1 and two shielding vertical lines V3, and the first side of the sub-pixel 150c is provided with a first vertical signal line V1 and two shielding vertical lines V3 according to A first vertical signal line V1, a shielding vertical line V3 and a second vertical signal line V2 are arranged in sequence. In this way, the adverse effect caused by the coupling between the first vertical signal line V1 and the second vertical signal line V2 can be avoided, the aperture ratio can be made uniform, and the resistance value of the shielding vertical line V3 can be reduced.

FIG. 6 is a schematic partial circuit diagram of an electronic device according to another embodiment of the present invention. In FIG. 6 , a plurality of contact pads 140 are omitted, and only one contact pad 140 is shown as a representative. In the projection direction of the substrate, the contact pads 140 do not cover the relevant marks of the disconnected lines of the shielding vertical line V3, so as to make the drawing clearer. The relative positional relationship between the contact pad 140 and the shielding vertical line V3 in the projection direction of the substrate in this embodiment can be understood by referring to the cross-sectional view of FIG. 7 or FIG. 8 described later. The electronic device 100E of FIG. 6 is substantially similar to the electronic device 100A of FIG. 1 , so the same components described in the two embodiments may refer to the foregoing contents, and the same configurations in the two embodiments will not be repeated here.

In the embodiment of FIG. 6 , the electronic device 100E includes a substrate 110 , a plurality of horizontal signal lines 120 , a plurality of vertical lines 130 , a plurality of touch pads 140 , and a plurality of pixel structures 150B. The plurality of lateral signal lines 120 extend toward the x direction and are arranged on the substrate 110 along the y direction, and two adjacent rows of the plurality of lateral signal lines 120 are electrically connected to each other. The plurality of longitudinal lines 130 extend toward the y direction, are arranged on the substrate 110 along the x direction, and intersect with the plurality of lateral signal lines 120 . The plurality of vertical lines 130 include a plurality of first vertical signal lines V1, a plurality of second vertical signal lines V2 and a plurality of shielding vertical lines V3.

In the embodiment of FIG. 6 , the electronic device 100E is designed in a 2DHG driving manner. A plurality of pixel structures 150B are arranged on the substrate 110 in an array, and each pixel structure 150B is located between two adjacent rows of lateral signal lines 120 that are electrically connected, wherein each pixel structure 150B includes The two sub-pixels 150a, 150b arranged vertically, the two sub-pixels 150a, 150b are respectively electrically connected to the horizontal signal lines 120 in two adjacent rows that are electrically connected, in other words, the two The sub-pixels 150a and 150b are substantially electrically connected to the same horizontal signal line 120 .

As shown in FIG. 6 , in the single pixel structure 150B, the first vertical signal lines V1 are located on opposite sides of the pixel structure 150B, and are respectively connected with the two sub-pixels 150a and 150b of the pixel structure 150B. Electrical connection. The second vertical signal line V2 is located between two adjacent first vertical signal lines V1 electrically connected to the two adjacent pixel structures 150B, and the second vertical signal line V2 is connected to a plurality of electrical circuits through the corresponding conductive structure VIA1 One of the horizontal signal lines 120 in the adjacent two rows that are sexually connected is connected.

The shielding vertical lines V3 are located between each of the first vertical signal lines V1 and the second vertical signal lines V2 between two adjacent pixel structures 150B. That is to say, two first vertical signal lines V1, two shielding vertical lines V3 and one second vertical signal line V2 are disposed between two adjacent pixel structures 150B, wherein the two first vertical signal lines V1 The second vertical signal line V2 is located between the two first vertical signal lines V1 on the two sides between the adjacent two pixel structures 150B and is electrically connected to the two pixel structures 150B, respectively. And the two shielding vertical lines V3 are respectively located between each of the first vertical signal lines V1 and the second vertical signal lines V2. Since the shielding vertical line V3 is provided between the adjacent first vertical signal line V1 and the second vertical signal line V2, the adverse effect caused by the coupling between the first vertical signal line V1 and the second vertical signal line V2 can be avoided. .

FIG. 7 is a schematic diagram of one embodiment of the cross section of the electronic device 100E of FIG. 6 along the line A-A'.

Please refer to FIG. 6 and FIG. 7 at the same time, the electronic device 100E1 further includes a plurality of touch pads 140 . A plurality of touch pads 140 are arranged on the substrate 110 in an array. The coverage of each touch pad 140 can cover a plurality of pixel structures 150B. One of the touch pads 140 is electrically connected (details will be described later in FIGS. 9 and 10 ).

In FIG. 7 , the horizontal signal line 120 , the insulating layer I0 , the vertical line 130 , the insulating layer I1 , the touch pad 140 , the insulating layer I2 and the pixel electrode 152 are sequentially stacked on the substrate 110 . The longitudinal line 130 includes a first longitudinal signal line V1, a second longitudinal signal line V2 and a shielding longitudinal line V3 located in the same film layer. The insulating layer I0 has a through hole, and the conductive structure VIA1 is embedded in the through hole of the insulating layer I0, so that the lateral signal line 120 is electrically connected to the first vertical signal line V1. In addition, as shown in FIG. 7 , the touch pad 140 covers the first vertical signal line V1, and the projection range of the touch pad 140 on the substrate 110 covers the projection range of the first vertical signal line V1 on the substrate 110, but The projection of the touch pad 140 on the substrate 110 does not overlap with the projection of the shielding vertical line V3 on the substrate 110 and the projection of the second vertical signal line V2 on the substrate 110 .

FIG. 8 is a schematic diagram of another embodiment of the cross section along the line A-A' in the electronic device 100E of FIG. 6 . The cross-sectional schematic diagram of FIG. 8 is substantially similar to the cross-sectional schematic diagram of FIG. 7 , except that in FIG. 8 , the touch pad 140 not only covers the first vertical signal line V1 but also covers the second vertical signal line V2 , and the touch pad 140 is in the The projection range on the substrate 110 covers the projection range of the first longitudinal signal line V1 on the substrate 110 and the projection range of the second longitudinal signal line V2 on the substrate 110 , but the projection range of the touch pad 140 on the substrate 110 and the shielding longitudinal The projection ranges of the line V3 on the substrate 110 do not overlap, so that the adverse effects caused by line coupling can be reduced.

FIG. 9 is a schematic diagram of an embodiment of the active element in the R region of FIG. 1 and a cross section along the section line BB' according to the present invention. In this embodiment, the active element is, for example, a bottom gate type amorphous silicon thin film battery. crystal.

1 and FIG. 9 , the gate electrode 1542 and the lateral signal line 120 are located on the substrate 110 , and the insulating layer I0 covers the substrate 110 and covers the gate electrode 1542 and the lateral signal line 120 . The semiconductor layer 1541 is located on the insulating layer I0 and overlaps with the gate electrode 1542 , wherein the material of the semiconductor layer 1541 is, for example, amorphous silicon (a-Si). The source electrode 1543 and the drain electrode 1544 are respectively located on both sides of the semiconductor layer 1541 on the insulating layer I0, and the source electrode 1543 and the drain electrode 1544 partially cover the semiconductor layer 1541, that is to say, the semiconductor layer 1541 is not completely covered by the source electrode 1543, Drain 1544 overlay. The film layers of the shielding vertical line V3 and the second vertical signal line V2 are the same as the film layers of the source electrode 1543 and the drain electrode 1544, which are both located on the source electrode 1543 and the drain electrode 1544 on the insulating layer I0. The insulating layer I0 between the second vertical signal line V2 and the horizontal signal line 120 has a through hole, and the conduction structure VIA1 is embedded in the through hole of the insulating layer I0, so that the second vertical signal line V2 and the horizontal signal line 120 are electrically connected connect. The insulating layer I1 covers the source electrode 1543, the drain electrode 1544, the insulating layer I0, the semiconductor layer 1541, the shielding vertical line V3 and the second vertical signal line V2. The touch pad 140 is located on the insulating layer I1, wherein the insulating layer I1 has a through hole on the shielding vertical line V3, and the conductive structure VIA2 is embedded in the through hole of the insulating layer I1, so that the touch pad disposed on the insulating layer I1 140 is electrically connected to the shielding vertical wire V3. The insulating layer I2 is located on the insulating layer I1 and covers the touch pad 140 , and the pixel electrodes 152 are located on the insulating layer I2 to be insulated from the touch pad 140 . Above the drain electrode 1544 , there is a conduction structure VIA3 penetrating the insulating layers I1 and I2 to electrically connect the pixel electrode 152 and the active element 154 .

FIG. 10 is a schematic diagram of another embodiment of the active element in the R region of FIG. 1 and the cross section along the section line BB' of the present invention. In this embodiment, the active element is, for example, a top-gate type polysilicon thin film transistor. .

1 and FIG. 10 , the substrate 110 has a shielding metal layer (Shielding Metal), and the buffer layer 114 is located on the shielding metal layer SM 112 and covers the shielding metal layer SM 112 . The semiconductor layer 1541 is located on the buffer layer 114 , wherein the material of the semiconductor layer 1541 is, for example, Low Temperature Poly-Silicon (LTPS). The gate dielectric layer 116 is located on the buffer layer 114 and covers the semiconductor layer 1541 . The gate 1542 is located on the gate dielectric layer 116 and overlaps the semiconductor layer 1541 . The lateral signal line 120 is located on the gate dielectric layer 116 , and the lateral signal line 120 and the gate electrode 1542 are in the same film layer and are connected to each other. The insulating layer I0 is located on the gate dielectric layer 116 and covers the lateral signal line 120 and the gate electrode 1542 . The source electrode 1543, the drain electrode 1544, the shielding vertical line V3 and the second vertical signal line V2 are located on the insulating layer I0, wherein the insulating layer I0 has a through hole, and the conduction structure VIA1 is embedded in the through hole of the insulating layer I0, so that the second The vertical signal line V2 is electrically connected to the horizontal signal line 120 . Between the source electrode 1543 and the semiconductor layer 1541, and between the drain electrode 1544 and the semiconductor layer 1541, there are also conductive structures VIA4 and VIA5 penetrating the insulating layer I0 and the gate dielectric layer 116, respectively, so that the semiconductor layer 1541 and the source electrode are connected 1543 and the drain electrode 1544 are electrically connected. The insulating layer I1 is located on the insulating layer I0, and covers the source electrode 1543 and the drain electrode 1544, the shielding vertical line V3 and the second vertical signal line V2. The touch pad 140 is located on the insulating layer I1 , wherein the insulating layer I1 has a through hole, and the conductive structure VIA2 is embedded in the through hole of the insulating layer I1 , so that the shielding vertical line V3 is electrically connected to the touch pad 140 . The insulating layer I2 is located on the insulating layer I1 and covers the touch pad 140 , and the pixel electrodes 152 are located on the insulating layer I2 to be insulated from the touch pad 140 . Between the pixel electrode 152 and the drain electrode 1544 , there is a conduction structure VIA3 penetrating the insulating layers I1 and I2 , so that the pixel electrode 152 and the active element 154 are electrically connected.

FIG. 11 is a schematic partial circuit diagram of an electronic device according to another embodiment of the present invention. In FIG. 11 , a plurality of contact pads 140 are omitted, and only one contact pad 140 is shown as a representative. The electronic device 100F of FIG. 11 is substantially similar to the electronic device 100A of FIG. 1 , so the same components described in the two embodiments may refer to the foregoing contents, and the same configurations in the two embodiments will not be repeated here.

In the embodiment of FIG. 11 , the electronic device 100F includes a substrate 110 , a plurality of horizontal signal lines 120 , a plurality of vertical lines 130 , a plurality of touch pads 140 , and a plurality of pixel structures 150C. The plurality of lateral signal lines 120 extend toward the x direction and are arranged on the substrate 110 along the y direction. The plurality of longitudinal lines 130 extend toward the y direction, are arranged on the substrate 110 along the x direction, and intersect with the plurality of lateral signal lines 120 . The plurality of longitudinal lines 130 include a plurality of first longitudinal signal lines V1, a plurality of second longitudinal signal lines V2 and a plurality of shielding longitudinal lines V3.

In the embodiment of FIG. 11 , a plurality of pixel structures 150C are disposed on the substrate 110 in an array arrangement, and each pixel structure 150C is located between two adjacent different lateral signal lines 120 , wherein each pixel structure 150C includes two sub-pixels 150a and 150b arranged in a horizontal direction, and the two sub-pixels 150a and 150b are electrically connected to the same horizontal signal line 120 . In the single pixel structure 150C, the two first vertical signal lines V1 electrically connected to the two sub-pixels 150a and 150b are located on opposite sides of the pixel structure 150C, respectively. The second vertical signal line V2 is located between the two sub-pixels 150a and 150b, and the second vertical signal line V2 is connected to one of the plurality of horizontal signal lines 120 through the corresponding conduction structure VIA1. The shielding vertical line V3 is located between the two adjacent first vertical signal lines V1 electrically connected to the two adjacent pixel structures 150C. In other words, as shown in FIG. 11 , two first vertical signal lines V1 are disposed between two adjacent pixel structures 150C and one shielding vertical line V3 is disposed between the two first vertical signal lines. The first vertical signal line V1 on the second side (left side) of the shielded vertical line V3 is electrically connected to the pixel structure 150C on the left side, and the first vertical signal line V1 on the first side (right side) of the shielded vertical line V3 is electrically connected with the right side of the pixel structure 150C. The pixel structure 150C is electrically connected. In addition, as shown in FIG. 11 , in the single pixel structure 150C, a second vertical signal line V2 is provided between two adjacent sub-pixels 150a and 150b. Since the first vertical signal line V1 and the second vertical signal line V2 are separated by a sub-pixel 150a or 150b, the coupling between the first vertical signal line V1 and the second vertical signal line V2 can be avoided. adverse effects.

FIG. 12 is a schematic diagram of one embodiment of a cross-section along the line A-A' in the electronic device 100F of FIG. 11 .

Please refer to FIG. 11 and FIG. 12 at the same time, the electronic device 100F further includes a plurality of touch pads 140 . A plurality of touch pads 140 are arranged on the substrate 110 in an array. The coverage of each touch pad 140 can cover a plurality of pixel structures 150C, and each shielding vertical line V3 passes through the corresponding conduction structure VIA2 and the plurality of pixel structures 150C. One of the touch pads 140 is electrically connected. In addition, as shown in FIG. 12, the touch pad 140 covers the first vertical signal line V1 and the second vertical signal line V2, and the projection range of the touch pad 140 on the substrate 110 covers the first vertical signal line V1 on the substrate 110 and the projection range of the second vertical signal line V2 on the substrate 110 , but the projection range of the touch pad 140 on the substrate 110 and the projection range of the shielding vertical line V3 on the substrate 110 do not overlap. In this way, adverse effects caused by line coupling can be reduced.

FIG. 13 is a schematic diagram of a partial circuit of an electronic device according to another embodiment of the present invention. In FIG. 13 , a plurality of contact pads 140 are omitted, only one contact pad 140 is shown as a representative, and in this embodiment, the disconnection of the contact pad 140 not covering the shielding vertical line V3 in the substrate projection direction is omitted Lines are marked for clarity. The relative positional relationship between the contact pad 140 and the shielding longitudinal line V3 in the projection direction of the substrate can be understood by referring to other cross-sectional views in the specification. FIG. 14 is a schematic diagram of one embodiment of the cross section of the electronic device 100G of FIG. 13 along the line A-A'. The electronic device 100G of FIG. 13 is substantially similar to the electronic device 100F of FIG. 11 , so the same components described in the two embodiments may refer to the foregoing content, and the same configurations in the two embodiments will not be repeated here.

13 and 14 at the same time, the electronic device 100G of this embodiment is different from the embodiment of FIG. 11 in that, in the single pixel structure 150C, there is only one second longitudinal direction between two adjacent sub-pixels 150a and 150b. In addition to the signal line V2, a vertical shielding line V3 may be provided between the second vertical signal line V2 and each of the sub-pixels 150a and 150b. That is to say, in the single-pixel structure 150C, adjacent two A second vertical signal line V2 and two shielding vertical lines V3 are disposed between the sub-pixels 150a and 150b, and the second vertical signal line V2 is located between the two shielding vertical lines V3. In this way, more touch pads 140 can be supported, and the resistance value of the shielding vertical line V3 can be reduced.

FIG. 15 is a schematic diagram of a partial circuit of an electronic device according to another embodiment of the present invention. In FIG. 15 , a plurality of contact pads 140 are omitted, only one contact pad 140 is shown as a representative, and in this embodiment, the disconnection of the contact pad 140 not covering the shielding vertical line V3 in the substrate projection direction is omitted Lines are marked for clarity. The relative positional relationship between the contact pad 140 and the shielding longitudinal line V3 in the projection direction of the substrate can be understood by referring to other cross-sectional views in the specification. FIG. 16 is a schematic diagram of one embodiment of the cross section of the electronic device 100H of FIG. 15 along the line A-A'. The electronic device 100H of FIG. 15 is substantially similar to the electronic device 100F of FIG. 11 , so the same components described in the two embodiments may refer to the foregoing contents, and the same configurations in the two embodiments will not be repeated here.

15 and 16 at the same time, the electronic device 100H of this embodiment is different from the embodiment of FIG. 11 in that in the single pixel structure 150C, two adjacent sub-pixels 150a and 150b may include two first pixels. Two longitudinal signal lines V2 and one shielding longitudinal line V3, wherein the shielding longitudinal line V3 is located between the two second longitudinal signal lines V2. In this way, more horizontal signal lines 120 can be supported, thereby increasing the resolution.

FIG. 17 is a schematic partial circuit diagram of an electronic device according to another embodiment of the present invention. In FIG. 17 , a plurality of contact pads 140 are omitted, and only one contact pad 140 is shown as a representative, and in this embodiment, omitted In the projection direction of the substrate, the contact pads 140 do not cover the relevant marks of the disconnected lines of the shielding vertical line V3, so as to make the drawing clearer. The relative positional relationship between the contact pad 140 and the shielding longitudinal line V3 in the projection direction of the substrate can be understood by referring to other cross-sectional views in the specification.

In the embodiment of FIG. 17 , the electronic device 100I includes a substrate 110 , a plurality of horizontal signal lines 120 , a plurality of vertical lines 130 , a plurality of touch pads 140 , and a plurality of pixel structures 150C. The plurality of lateral signal lines 120 extend toward the x direction and are arranged on the substrate 110 along the y direction. The plurality of longitudinal lines 130 extend toward the y direction, are arranged on the substrate 110 along the x direction, and intersect with the plurality of lateral signal lines 120 . The plurality of longitudinal lines 130 include a plurality of first longitudinal signal lines V1, a plurality of second longitudinal signal lines V2 and a plurality of shielding longitudinal lines V3.

In the embodiment of FIG. 17 , a plurality of pixel structures 150C are disposed on the substrate 110 in an array arrangement, and each pixel structure 150C is located between two adjacent different lateral signal lines 120 , wherein each pixel structure 150C includes two sub-pixels 150a and 150b arranged in a horizontal direction, and the two sub-pixels 150a and 150b are electrically connected to the same horizontal signal line 120 . In the single pixel structure 150C, the first vertical signal lines V1 are located on opposite sides of the pixel structure 150C, and are respectively electrically connected to the two sub-pixels 150a and 150b of the pixel structure 150C. The second vertical signal line V2 is located between the two sub-pixels 150a and 150b, and the second vertical signal line V2 is connected to one of the plurality of horizontal signal lines 120 through the corresponding conduction structure VIA1. The shielding vertical line V3 is located on the first side of the second vertical signal line V2. That is to say, each pixel structure 150C is surrounded by two adjacent horizontal signal lines 120 and two first vertical signal lines V1, and in the single pixel structure 150C, a single pixel structure 150C includes one between the two sub-pixels 150a, 150b The second longitudinal signal line V2 and a shielding longitudinal line V3, wherein the shielding longitudinal line V3 is located on the first side of the second longitudinal signal line V2. Based on the above configuration, the adverse effect caused by the coupling between the first vertical signal line V1 and the second vertical signal line V2 can be avoided, and the aperture ratio is large and uniform.

FIG. 18 is a schematic diagram of an embodiment of the cross section of the electronic device 100I of FIG. 17 along the line A-A'.

Please refer to FIG. 17 and FIG. 18 at the same time, the electronic device 100I further includes a plurality of touch pads 140 . A plurality of touch pads 140 are arranged on the substrate 110 in an array. The coverage of each touch pad 140 can cover a plurality of pixel structures 150C, and each shielding vertical line V3 passes through the corresponding conduction structure VIA2 and the plurality of pixel structures 150C. One of the touch pads 140 is electrically connected. In addition, as shown in FIG. 18 , the touch pad 140 covers the first vertical signal line V1 and the second vertical signal line V2, and the projection range of the touch pad 140 on the substrate 110 covers the first vertical signal line V1 on the substrate 110 and the projection range of the second vertical signal line V2 on the substrate 110 , but the projection range of the touch pad 140 on the substrate 110 and the projection range of the shielding vertical line V3 on the substrate 110 do not overlap. In this way, adverse effects caused by line coupling can be reduced.

To sum up, the present invention provides improved quality by arranging shielded longitudinal lines between the adjacent first longitudinal signal lines and the second longitudinal signal lines to reduce the adverse effects caused by the coupling between the lines. In the present invention, the first vertical signal line and the second vertical signal line can also be separated by pixel electrodes, so as to reduce the adverse effect caused by the coupling between the lines, and have a large and uniform aperture ratio, and Provides improved quality.

Although the present invention has been disclosed above by the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, The protection scope of the present invention shall be determined by the scope of the appended patent application.

100A~100I: Electronic device 110: Substrate 112: shading metal layer 114: buffer layer 116: gate dielectric layer 120: Horizontal signal line 130: Longitudinal line 140: Touch pad 150, 150A~150C: pixel structure 150a, 150b, 150c: Subpixels 152: Pixel electrode 154: Active Components 1541: Semiconductor layer 1542: Gate 1543: Source 1544: Drain A-A', B-B': section line I0~I2: insulating layer R: area VIA1~VIA5: Conduction structure V1: The first vertical signal line V2: The second vertical signal line V3: Shielded vertical wire

FIG. 1 is a schematic diagram of a partial circuit of an electronic device according to an embodiment of the present invention. FIG. 2 is a schematic diagram of one embodiment of a cross-section along the line A-A' in the electronic device of FIG. 1 . FIG. 3 is a schematic partial circuit diagram of an electronic device according to another embodiment of the present invention. FIG. 4 is a schematic partial circuit diagram of an electronic device according to another embodiment of the present invention. FIG. 5 is a schematic partial circuit diagram of an electronic device according to another embodiment of the present invention. FIG. 6 is a schematic partial circuit diagram of an electronic device according to another embodiment of the present invention. FIG. 7 is a schematic diagram of one embodiment of a cross-section along the line A-A' in the electronic device of FIG. 6 . FIG. 8 is a schematic diagram of another embodiment of the cross section along the line A-A' in the electronic device of FIG. 6 . FIG. 9 is a schematic diagram of an embodiment of the active element in the R region of FIG. 1 and a cross section along the section line B-B'. FIG. 10 is a schematic diagram of another embodiment of the active element in the R region of FIG. 1 and a cross section along the section line B-B'. FIG. 11 is a schematic partial circuit diagram of an electronic device according to another embodiment of the present invention. FIG. 12 is a schematic diagram of one embodiment of a cross-section along the line A-A' in the electronic device of FIG. 11 . FIG. 13 is a schematic partial circuit diagram of an electronic device according to another embodiment of the present invention. FIG. 14 is a schematic diagram of one embodiment of a cross-section along line A-A' in the electronic device of FIG. 13 . FIG. 15 is a schematic partial circuit diagram of an electronic device according to another embodiment of the present invention. FIG. 16 is a schematic diagram of one embodiment of a cross-section along line A-A' in the electronic device of FIG. 15 . FIG. 17 is a schematic partial circuit diagram of an electronic device according to another embodiment of the present invention. FIG. 18 is a schematic diagram of one embodiment of a cross-section along line A-A' in the electronic device of FIG. 17 .

100A: Electronics

110: Substrate

120: Horizontal signal line

130: Longitudinal line

140: Touch pad

150: pixel structure

150a: Subpixels

152: Pixel electrode

154: Active Components

A-A', B-B': section line

R: region

VIA1, VIA2: Conduction structure

V1: The first vertical signal line

V2: The second vertical signal line

V3: Shielded vertical wire

Claims (18)

An electronic device comprising: substrate; a plurality of horizontal signal lines, disposed on the substrate; a plurality of first vertical signal lines disposed on the substrate and intersecting with the plurality of horizontal signal lines; a plurality of second vertical signal lines disposed on the substrate, intersecting with the plurality of horizontal signal lines, and each of the plurality of second vertical signal lines is connected to one of the plurality of horizontal signal lines; and a plurality of pixel structures disposed on the substrate, each of the plurality of pixel structures is electrically connected to one of the plurality of horizontal signal lines and one of the plurality of first vertical signal lines and includes pixel electrodes, a plurality of touch pads, disposed on the substrate, A plurality of shielding vertical lines are arranged on the substrate, one of the shielding vertical lines is electrically connected to one of the plurality of touch pads, the plurality of shielding vertical lines, the plurality of The first longitudinal signal and the plurality of second longitudinal signals are the same film layer, and the plurality of shielding longitudinal lines are respectively located between two adjacent pixel electrodes and are selected from the plurality of first longitudinal signal lines and the between at least two of the plurality of second vertical signal line groups. The electronic device of claim 1, wherein the plurality of shielding vertical lines are respectively located between the first vertical signal line and the second vertical signal line between two adjacent pixel electrodes. The electronic device of claim 2, wherein one of the first vertical signal lines and the plurality of second vertical signal lines are arranged between every two adjacent rows of the plurality of pixel structures One of them, and the shielding longitudinal line is located between the first longitudinal signal line and the second longitudinal signal line. The electronic device of claim 3, wherein in a plan view of the electronic device, the touch pad overlaps with the first vertical signal line and the second vertical signal line, and the touch pad and the shielding The vertical lines do not overlap. The electronic device according to claim 2, wherein each of the pixel structures includes three sub-pixels arranged horizontally, the three sub-pixels are electrically connected to the same horizontal signal line, and the three sub-pixels are electrically connected to the same horizontal signal line. are respectively electrically connected with the different first vertical signal lines located on the first side of the sub-pixel, the second vertical signal line is located on the first side of the first vertical signal line of the outermost sub-pixel, And the shielding vertical line is located between the second vertical signal line and the first vertical signal line of the outermost sub-pixel. The electronic device according to claim 5, further comprising disposing the shielding vertical lines on the first sides of the other two sub-pixels of each of the pixel structures, respectively. The electronic device according to claim 6, wherein in each of the pixel structures, the number of the shielding vertical lines between two adjacent sub-pixels is two. The electronic device of claim 2, wherein two adjacent rows of the plurality of horizontal signal lines are electrically connected, and each of the pixel structures includes two sub-pixels arranged vertically, wherein the two sub-pixels The pixels are respectively electrically connected to the horizontal signal lines of two adjacent rows that are electrically connected, and the first vertical signal lines respectively connected to the two sub-pixels are located on opposite sides of the pixel structure. , the second vertical signal line is located between two adjacent first vertical signal lines electrically connected to two adjacent pixel structures, and the shielding vertical line is located between the second vertical signal line and each between the first longitudinal signal lines. The electronic device of claim 8, wherein in a plan view of the electronic device, the touch pad overlaps with the first vertical signal line, and the second vertical signal line does not overlap with the touch pad. The electronic device of claim 8, wherein in a plan view of the electronic device, the touch pad overlaps the first vertical signal line, and the second vertical signal line overlaps the touch pad. The electronic device as claimed in claim 1, further comprising an insulating layer and a conduction structure penetrating the insulating layer, wherein the insulating layer is located between the film layer of the first vertical signal line and the touch pad. Between the film layers, the shielding vertical line is connected to one of the plurality of touch pads through the conducting structure. The electronic device of claim 1, wherein each of the plurality of shielding vertical lines is located between the two first vertical signal lines between two adjacent pixel electrodes. The electronic device of claim 12, wherein each of the pixel structures is surrounded by two adjacent horizontal signal lines and two first vertical signal lines disposed on two opposite sides of the pixel structure, Each of the pixel structures includes two sub-pixels arranged horizontally, the second vertical signal line is located between the two sub-pixels in each of the pixel structures, and the shielding vertical line is disposed on the two sub-pixels. between two adjacent first vertical signal lines electrically connected to adjacent pixel structures. The electronic device of claim 13, wherein in each of the pixel structures, the shielding vertical line is further arranged between the second vertical signal line and each of the sub-pixels. The electronic device according to claim 14, wherein two of the shielding vertical lines and the two shielding vertical lines located between the two adjacent sub-pixels of each pixel structure are included. The second vertical signal line. The electronic device of claim 13, wherein two of the second vertical signal lines and two of the second vertical signal lines are included between two adjacent sub-pixels of each of the pixel structures between the shielded longitudinal wires. The electronic device of claim 16, wherein in a top view of the electronic device, the first vertical signal line overlaps the touch pad, the second vertical signal line overlaps the touch pad, and all The shielding vertical line does not overlap with the touch pad. An electronic device comprising: substrate; a plurality of horizontal signal lines, disposed on the substrate; a plurality of first vertical signal lines disposed on the substrate and intersecting with the plurality of horizontal signal lines; a plurality of second vertical signal lines disposed on the substrate, intersecting with the plurality of horizontal signal lines, and each of the plurality of second vertical signal lines is connected to one of the plurality of horizontal signal lines; and a plurality of pixel structures disposed on the substrate, each of the plurality of pixel structures is electrically connected to one of the plurality of horizontal signal lines and one of the plurality of first vertical signal lines and includes pixel electrodes, a plurality of touch pads, disposed on the substrate, A plurality of shielding vertical lines are arranged on the substrate, one of the shielding vertical lines is electrically connected to one of the plurality of touch pads, the plurality of shielding vertical lines, the plurality of The first longitudinal signal and the plurality of second longitudinal signals are the same film layer, Each pixel structure is surrounded by two adjacent horizontal signal lines and two first vertical signal lines and includes two horizontally arranged sub-pixels, and one of the second vertical signal lines is located in the same Between the two sub-pixels of the pixel structure, the shielding vertical line is located between the second vertical signal line and a pixel electrode of one of the two sub-pixels.

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