MX171836B - Proceso de desbloque en un sistema multiprocesador de ductos multiples - Google Patents
Proceso de desbloque en un sistema multiprocesador de ductos multiplesInfo
- Publication number
- MX171836B MX171836B MX018980A MX1898089A MX171836B MX 171836 B MX171836 B MX 171836B MX 018980 A MX018980 A MX 018980A MX 1898089 A MX1898089 A MX 1898089A MX 171836 B MX171836 B MX 171836B
- Authority
- MX
- Mexico
- Prior art keywords
- bus
- module
- function
- deblocking
- freeing
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Bus Control (AREA)
- Hardware Redundancy (AREA)
- Exchange Systems With Centralized Control (AREA)
- Debugging And Monitoring (AREA)
- Time-Division Multiplex Systems (AREA)
- Small-Scale Networks (AREA)
- Lock And Its Accessories (AREA)
Abstract
La presente invención se refiere a un método para bloquear un sistema multiprocesador, cuyo sistema es del tipo que incluye cuando menos un módulo de procesamiento, cada uno de los cuales está constituído por procesadores conectados a un solo ducto principal, cada uno de cuyos procesadores incluye una celda para manejo de acceso de ducto principal, que emplea dos fases, las cuales comprenden, primero un sistema para asignación de ducto que suministra, durante una primera fase, una señal de resultado (negativo o positivo) para el procesador, del arbitraje de solicitante de acceso expresadas el mismo ciclo por los procesadores de módulo y en segundo un circuito para adoptación o posición de ducto, que proporcioan durante una segunda fase, acceso al ducto de procesador, enviando unaseñal de propiedad de ducto, cuando el resultado es positivo del sistema de asignación durante la primera fase, el método está caracterizado porque comprende asignar a un tablero de desbloque específico, una detencción de bloqueo de módulo y una función de liberación de ducto para el módulo, y en que dicha función de liberación de ducto consisteen enviar una señal de descongestión sencilla, que tiene el efecto de provocar en todos los procesadores del módulo, primero un forzamiento a negativo del resultado de la signación y segundo un forzamiento a la ituación cancelada de la señal de propiedad del ducto.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8817506A FR2642246B1 (fr) | 1988-12-30 | 1988-12-30 | Procede de deblocage d'un systeme multiprocesseurs multibus |
Publications (1)
Publication Number | Publication Date |
---|---|
MX171836B true MX171836B (es) | 1993-11-18 |
Family
ID=9373643
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX018980A MX171836B (es) | 1988-12-30 | 1989-12-29 | Proceso de desbloque en un sistema multiprocesador de ductos multiples |
Country Status (12)
Country | Link |
---|---|
US (1) | US5553247A (es) |
EP (1) | EP0376249B1 (es) |
JP (1) | JP2724226B2 (es) |
KR (1) | KR0137020B1 (es) |
CN (1) | CN1020814C (es) |
AT (1) | ATE142803T1 (es) |
AU (1) | AU630647B2 (es) |
CA (1) | CA2006936C (es) |
DE (1) | DE68927157T2 (es) |
ES (1) | ES2091760T3 (es) |
FR (1) | FR2642246B1 (es) |
MX (1) | MX171836B (es) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1048344C (zh) * | 1994-05-24 | 2000-01-12 | 禹成海 | 一种适度耦合多处理机系统的体系结构 |
US6324622B1 (en) | 1998-08-24 | 2001-11-27 | International Business Machines Corporation | 6XX bus with exclusive intervention |
US6311255B1 (en) | 1999-04-29 | 2001-10-30 | International Business Machines Corporation | System and method for selectively restricting access to memory for bus attached unit IDs |
JP4140764B2 (ja) * | 2001-03-19 | 2008-08-27 | 株式会社ルネサステクノロジ | 半導体装置及びそのテスト方法 |
DE10136151C2 (de) * | 2001-07-25 | 2003-06-05 | Infineon Technologies Ag | Multiprozessor-System mit zumindest zwei Mikroprozessoren mit optimaler Ausnutzung der zur Verfügung stehenden Ressourcen |
US7130943B2 (en) * | 2004-09-30 | 2006-10-31 | Freescale Semiconductor, Inc. | Data processing system with bus access retraction |
US10470995B2 (en) | 2018-02-21 | 2019-11-12 | L'oreal | Mascara compositions comprising a bimodal acrylic polymer and anionic, water-dispersible polyester and an aliphatic tackifier |
CN109582626B (zh) * | 2018-12-03 | 2021-10-29 | 郑州云海信息技术有限公司 | 一种访问总线的方法、装置、设备及可读存储介质 |
CN112948294B (zh) * | 2021-03-19 | 2024-02-09 | 北京控制工程研究所 | 面向SOC的全域并行收发数据的双通道SpaceWire控制器及控制方法 |
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US3641505A (en) * | 1969-06-25 | 1972-02-08 | Bell Telephone Labor Inc | Multiprocessor computer adapted for partitioning into a plurality of independently operating systems |
JPS535098B2 (es) * | 1972-11-22 | 1978-02-23 | ||
US4281380A (en) * | 1978-12-27 | 1981-07-28 | Harris Corporation | Bus collision avoidance system for distributed network data processing communications system |
US4488151A (en) * | 1981-12-10 | 1984-12-11 | Burroughs Corporation | Arbiter switch for a concurrent network of processors |
US4633392A (en) * | 1982-04-05 | 1986-12-30 | Texas Instruments Incorporated | Self-configuring digital processor system with logical arbiter |
US4527271A (en) * | 1982-08-17 | 1985-07-02 | The Foxboro Company | Process control system with improved fault isolation |
DE3246301A1 (de) * | 1982-12-14 | 1984-06-14 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur erkennung von datenkollisionen in einem optischen datenbus |
JPS59202753A (ja) * | 1983-05-02 | 1984-11-16 | Toshiba Corp | デ−タ通信システム |
US4620278A (en) * | 1983-08-29 | 1986-10-28 | Sperry Corporation | Distributed bus arbitration according each bus user the ability to inhibit all new requests to arbitrate the bus, or to cancel its own pending request, and according the highest priority user the ability to stop the bus |
JPS60183668A (ja) * | 1984-03-01 | 1985-09-19 | Canon Inc | マルチプロセツサシステム |
US4766536A (en) * | 1984-04-19 | 1988-08-23 | Rational | Computer bus apparatus with distributed arbitration |
JPS619747A (ja) * | 1984-06-26 | 1986-01-17 | Matsushita Electric Ind Co Ltd | バス制御装置 |
JPH07104826B2 (ja) * | 1984-12-07 | 1995-11-13 | 日本電気株式会社 | 転送制御装置 |
JPS621051A (ja) * | 1985-06-26 | 1987-01-07 | Oki Electric Ind Co Ltd | バス制御装置 |
US4751701A (en) * | 1985-11-14 | 1988-06-14 | Hughes Network Systems, Inc. | TDM collision detector |
US4858112A (en) * | 1985-12-17 | 1989-08-15 | General Electric Company | Interface comprising message and protocol processors for interfacing digital data with a bus network |
GB2187367B (en) * | 1986-01-09 | 1990-03-28 | Ricoh Kk | Control system for local area network |
US4719458A (en) * | 1986-02-24 | 1988-01-12 | Chrysler Motors Corporation | Method of data arbitration and collision detection in a data bus |
US4835737A (en) * | 1986-07-21 | 1989-05-30 | American Telephone And Telegraph Company, At&T Bell Laboratories | Method and apparatus for controlled removal and insertion of circuit modules |
DE3631086C2 (de) * | 1986-09-12 | 1994-04-14 | Telefonbau & Normalzeit Gmbh | Schaltungsanordnung zur Fehlerbearbeitung in Mikroprozessorsystemen |
US4707829A (en) * | 1986-09-25 | 1987-11-17 | Racal Data Communications Inc. | CSMA-CD with channel capture |
JPS63132365A (ja) * | 1986-11-22 | 1988-06-04 | Nec Corp | バス調停制御方式 |
US4974153A (en) * | 1987-09-04 | 1990-11-27 | Digital Equipment Corporation | Repeater interlock scheme for transactions between two buses including transaction and interlock buffers |
CA1317667C (en) * | 1987-11-02 | 1993-05-11 | Michel Dufresne | Catv subscriber terminal transmission control |
US5140586A (en) * | 1988-01-26 | 1992-08-18 | E-Systems, Inc. | Token associated data network communications protocol |
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US5129090A (en) * | 1988-05-26 | 1992-07-07 | Ibm Corporation | System bus preempt for 80386 when running in an 80386/82385 microcomputer system with arbitration |
US4939510A (en) * | 1988-08-22 | 1990-07-03 | E-Systems, Inc. | Broadband communications RF packet collision detection |
US5167022A (en) * | 1988-10-25 | 1992-11-24 | Hewlett-Packard Company | Multiprocessor bus locking system with a winning processor broadcasting an ownership signal causing all processors to halt their requests |
US5175829A (en) * | 1988-10-25 | 1992-12-29 | Hewlett-Packard Company | Method and apparatus for bus lock during atomic computer operations |
US4929940A (en) * | 1988-11-18 | 1990-05-29 | International Business Machines Corporation | Collision crossbar switch |
US5058101A (en) * | 1988-12-15 | 1991-10-15 | Bell Communications Research, Inc. | Coherent detection loop distribution system |
US5168568A (en) * | 1989-02-06 | 1992-12-01 | Compaq Computer Corporation | Delaying arbitration of bus access in digital computers |
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-
1988
- 1988-12-30 FR FR8817506A patent/FR2642246B1/fr not_active Expired - Lifetime
-
1989
- 1989-12-27 ES ES89123954T patent/ES2091760T3/es not_active Expired - Lifetime
- 1989-12-27 AT AT89123954T patent/ATE142803T1/de not_active IP Right Cessation
- 1989-12-27 EP EP89123954A patent/EP0376249B1/fr not_active Expired - Lifetime
- 1989-12-27 DE DE68927157T patent/DE68927157T2/de not_active Expired - Fee Related
- 1989-12-28 JP JP1345123A patent/JP2724226B2/ja not_active Expired - Fee Related
- 1989-12-29 AU AU47359/89A patent/AU630647B2/en not_active Ceased
- 1989-12-29 CA CA002006936A patent/CA2006936C/fr not_active Expired - Fee Related
- 1989-12-29 MX MX018980A patent/MX171836B/es unknown
- 1989-12-30 KR KR1019890020320A patent/KR0137020B1/ko not_active IP Right Cessation
- 1989-12-30 CN CN89109646A patent/CN1020814C/zh not_active Expired - Fee Related
-
1994
- 1994-12-12 US US08/355,280 patent/US5553247A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
AU630647B2 (en) | 1992-11-05 |
JP2724226B2 (ja) | 1998-03-09 |
FR2642246A1 (fr) | 1990-07-27 |
AU4735989A (en) | 1990-07-05 |
CN1044196A (zh) | 1990-07-25 |
FR2642246B1 (fr) | 1991-04-05 |
EP0376249A1 (fr) | 1990-07-04 |
CA2006936C (fr) | 1999-10-19 |
CN1020814C (zh) | 1993-05-19 |
DE68927157T2 (de) | 1997-02-06 |
KR0137020B1 (ko) | 1998-06-15 |
KR900010537A (ko) | 1990-07-07 |
ATE142803T1 (de) | 1996-09-15 |
US5553247A (en) | 1996-09-03 |
ES2091760T3 (es) | 1996-11-16 |
JPH02226356A (ja) | 1990-09-07 |
DE68927157D1 (de) | 1996-10-17 |
CA2006936A1 (fr) | 1990-06-30 |
EP0376249B1 (fr) | 1996-09-11 |
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