KR960002823A - - Google Patents
Info
- Publication number
- KR960002823A KR960002823A KR19950016333A KR19950016333A KR960002823A KR 960002823 A KR960002823 A KR 960002823A KR 19950016333 A KR19950016333 A KR 19950016333A KR 19950016333 A KR19950016333 A KR 19950016333A KR 960002823 A KR960002823 A KR 960002823A
- Authority
- KR
- South Korea
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4094—Bit-line management or control circuits
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/50—Peripheral circuit region structures
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16905094A JP4037470B2 (ja) | 1994-06-28 | 1994-06-28 | 半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR960002823A true KR960002823A (ko) | 1996-01-26 |
Family
ID=15879406
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR19950016333A KR960002823A (ko) | 1994-06-28 | 1995-06-20 |
Country Status (5)
Country | Link |
---|---|
US (4) | US5654577A (ko) |
JP (1) | JP4037470B2 (ko) |
KR (1) | KR960002823A (ko) |
CN (1) | CN1051644C (ko) |
TW (1) | TW377510B (ko) |
Families Citing this family (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4037470B2 (ja) * | 1994-06-28 | 2008-01-23 | エルピーダメモリ株式会社 | 半導体装置 |
US6292424B1 (en) | 1995-01-20 | 2001-09-18 | Kabushiki Kaisha Toshiba | DRAM having a power supply voltage lowering circuit |
JP3274306B2 (ja) * | 1995-01-20 | 2002-04-15 | 株式会社東芝 | 半導体集積回路装置 |
US7705383B2 (en) * | 1995-09-20 | 2010-04-27 | Micron Technology, Inc. | Integrated circuitry for semiconductor memory |
US6967369B1 (en) * | 1995-09-20 | 2005-11-22 | Micron Technology, Inc. | Semiconductor memory circuitry |
US5753956A (en) * | 1996-01-11 | 1998-05-19 | Micron Technology, Inc. | Semiconductor processing methods of forming complementary metal oxide semiconductor memory and other circuitry, and memory and other circuitry |
US6750527B1 (en) | 1996-05-30 | 2004-06-15 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit device having a plurality of wells, test method of testing the semiconductor integrated circuit device, and test device which executes the test method |
JP4041156B2 (ja) * | 1996-05-30 | 2008-01-30 | 株式会社東芝 | 半導体集積回路装置の検査方法 |
JP3600393B2 (ja) * | 1997-02-10 | 2004-12-15 | 株式会社東芝 | 半導体装置及びその製造方法 |
WO1998058382A1 (en) * | 1997-06-16 | 1998-12-23 | Hitachi, Ltd. | Semiconductor integrated circuit device |
US6040605A (en) * | 1998-01-28 | 2000-03-21 | Hitachi, Ltd. | Semiconductor memory device |
JPH11214640A (ja) | 1998-01-28 | 1999-08-06 | Hitachi Ltd | 半導体記憶素子、半導体記憶装置とその制御方法 |
US6284316B1 (en) * | 1998-02-25 | 2001-09-04 | Micron Technology, Inc. | Chemical vapor deposition of titanium |
JP3733252B2 (ja) * | 1998-11-02 | 2006-01-11 | セイコーエプソン株式会社 | 半導体記憶装置及びその製造方法 |
US6522587B1 (en) | 1999-06-23 | 2003-02-18 | Seiko Epson Corporation | Non-volatile semiconductor memory devices |
JP2001007227A (ja) | 1999-06-23 | 2001-01-12 | Seiko Epson Corp | 不揮発性半導体記憶装置 |
JP3743486B2 (ja) | 1999-06-23 | 2006-02-08 | セイコーエプソン株式会社 | 不揮発性メモリトランジスタを含む半導体装置の製造方法 |
JP2001060674A (ja) * | 1999-08-20 | 2001-03-06 | Seiko Epson Corp | 不揮発性メモリトランジスタを含む半導体装置 |
JP3587100B2 (ja) | 1999-09-17 | 2004-11-10 | セイコーエプソン株式会社 | 不揮発性メモリトランジスタを含む半導体装置の製造方法 |
US7941675B2 (en) * | 2002-12-31 | 2011-05-10 | Burr James B | Adaptive power control |
US7112978B1 (en) | 2002-04-16 | 2006-09-26 | Transmeta Corporation | Frequency specific closed loop feedback control of integrated circuits |
JP4489345B2 (ja) | 2002-12-13 | 2010-06-23 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
US7953990B2 (en) | 2002-12-31 | 2011-05-31 | Stewart Thomas E | Adaptive power control based on post package characterization of integrated circuits |
US7228242B2 (en) | 2002-12-31 | 2007-06-05 | Transmeta Corporation | Adaptive power control based on pre package characterization of integrated circuits |
WO2004112145A1 (ja) * | 2003-06-10 | 2004-12-23 | Fujitsu Limited | パンチスルー耐性を向上させた半導体集積回路装置およびその製造方法、低電圧トランジスタと高電圧トランジスタとを含む半導体集積回路装置 |
JP2005092963A (ja) * | 2003-09-16 | 2005-04-07 | Renesas Technology Corp | 不揮発性記憶装置 |
US7129771B1 (en) | 2003-12-23 | 2006-10-31 | Transmeta Corporation | Servo loop for well bias voltage source |
US7012461B1 (en) | 2003-12-23 | 2006-03-14 | Transmeta Corporation | Stabilization component for a substrate potential regulation circuit |
US7692477B1 (en) | 2003-12-23 | 2010-04-06 | Tien-Min Chen | Precise control component for a substrate potential regulation circuit |
US7649402B1 (en) * | 2003-12-23 | 2010-01-19 | Tien-Min Chen | Feedback-controlled body-bias voltage source |
TWI237402B (en) * | 2004-03-24 | 2005-08-01 | Epistar Corp | High luminant device |
US7774625B1 (en) | 2004-06-22 | 2010-08-10 | Eric Chien-Li Sheng | Adaptive voltage control by accessing information stored within and specific to a microprocessor |
US7562233B1 (en) | 2004-06-22 | 2009-07-14 | Transmeta Corporation | Adaptive control of operating and body bias voltages |
US20060104101A1 (en) * | 2004-11-17 | 2006-05-18 | Wen-Lin Chen | Memory and related manufacturing method thereof |
US7141998B1 (en) * | 2005-05-19 | 2006-11-28 | International Business Machines Corporation | Method and apparatus for burn-in optimization |
JP4803756B2 (ja) * | 2008-02-18 | 2011-10-26 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置 |
US8421438B2 (en) * | 2010-06-07 | 2013-04-16 | Skyworks Solutions, Inc. | Apparatus and method for diffusion sensing |
JP2021149659A (ja) * | 2020-03-19 | 2021-09-27 | キオクシア株式会社 | 半導体集積回路、メモリコントローラ、およびメモリシステム |
Family Cites Families (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60249584A (ja) * | 1984-05-25 | 1985-12-10 | アイシン精機株式会社 | ロボツトハンドの芯出し装置 |
JPS61231740A (ja) * | 1985-04-05 | 1986-10-16 | Sumitomo Metal Mining Co Ltd | ハーメチックシールカバーの製造方法 |
US5148255A (en) * | 1985-09-25 | 1992-09-15 | Hitachi, Ltd. | Semiconductor memory device |
US5324982A (en) * | 1985-09-25 | 1994-06-28 | Hitachi, Ltd. | Semiconductor memory device having bipolar transistor and structure to avoid soft error |
JPH0671067B2 (ja) | 1985-11-20 | 1994-09-07 | 株式会社日立製作所 | 半導体装置 |
JPH0685422B2 (ja) | 1985-11-07 | 1994-10-26 | 三菱電機株式会社 | 半導体集積回路 |
JPS6386559A (ja) | 1986-09-30 | 1988-04-16 | Toshiba Corp | 半導体記憶装置 |
US4751679A (en) * | 1986-12-22 | 1988-06-14 | Motorola, Inc. | Gate stress test of a MOS memory |
JPH0830028B2 (ja) * | 1987-06-15 | 1996-03-27 | ダイキン工業株式会社 | 含フッ素脂環式化合物及びその製造法 |
DE3855945T2 (de) * | 1987-07-10 | 1997-11-13 | Toshiba Kawasaki Kk | Halbleiterbauelement mit Bereichen unterschiedlicher Störstellenkonzentration |
JPH01193507A (ja) * | 1988-01-27 | 1989-08-03 | Hitachi Ltd | 負荷急減時の脱気器の圧力および水位制御装置 |
JPH0229140A (ja) * | 1988-07-19 | 1990-01-31 | Toshiba Corp | 受信データ復調方式 |
JPH01231740A (ja) * | 1988-12-28 | 1989-09-18 | Toshiba Corp | 画像形成装置 |
JPH02264462A (ja) | 1989-04-05 | 1990-10-29 | Mitsubishi Electric Corp | 半導体集積回路装置 |
JPH0358475A (ja) | 1989-07-26 | 1991-03-13 | Sony Corp | 半導体メモリ |
JPH0383289A (ja) | 1989-08-25 | 1991-04-09 | Nec Corp | Mos型半導体記憶装置 |
JP2503707B2 (ja) | 1990-02-07 | 1996-06-05 | 三菱電機株式会社 | 半導体記憶装置 |
JPH03276673A (ja) | 1990-03-26 | 1991-12-06 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
JP2523409B2 (ja) | 1990-05-02 | 1996-08-07 | 三菱電機株式会社 | 半導体記憶装置およびその製造方法 |
JPH0427394A (ja) * | 1990-05-21 | 1992-01-30 | Uop Inc | 醗酵中モナスカスから結晶性色素を直接製造する方法 |
JPH04317372A (ja) | 1991-04-17 | 1992-11-09 | Nec Corp | 半導体記憶装置 |
JPH0535615A (ja) * | 1991-08-01 | 1993-02-12 | Toshiba Corp | 計算機システムのデータ保存復元装置 |
JPH05189968A (ja) | 1992-01-16 | 1993-07-30 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP3047605B2 (ja) | 1992-03-18 | 2000-05-29 | 富士通株式会社 | ダイナミックram |
US5212442A (en) * | 1992-03-20 | 1993-05-18 | Micron Technology, Inc. | Forced substrate test mode for packaged integrated circuits |
JPH05292179A (ja) * | 1992-04-10 | 1993-11-05 | Ricoh Co Ltd | 電話装置 |
KR940003026A (ko) | 1992-07-13 | 1994-02-19 | 김광호 | 트리플웰을 이용한 반도체장치 |
JPH07142314A (ja) * | 1993-11-12 | 1995-06-02 | Sony Corp | 処理完了時間予測装置 |
JP3002371B2 (ja) | 1993-11-22 | 2000-01-24 | 富士通株式会社 | 半導体装置とその製造方法 |
US5595925A (en) | 1994-04-29 | 1997-01-21 | Texas Instruments Incorporated | Method for fabricating a multiple well structure for providing multiple substrate bias for DRAM device formed therein |
JP4037470B2 (ja) * | 1994-06-28 | 2008-01-23 | エルピーダメモリ株式会社 | 半導体装置 |
US5619459A (en) * | 1995-05-31 | 1997-04-08 | Micron Technology, Inc. | On-chip mobile ion contamination test circuit |
US5905682A (en) * | 1997-08-22 | 1999-05-18 | Micron Technology, Inc. | Method and apparatus for biasing the substrate of an integrated circuit to an externally adjustable voltage |
US6185139B1 (en) * | 2000-01-12 | 2001-02-06 | Motorola, Inc. | Circuit and method for enabling semiconductor device burn-in |
-
1994
- 1994-06-28 JP JP16905094A patent/JP4037470B2/ja not_active Expired - Lifetime
-
1995
- 1995-05-23 TW TW084105145A patent/TW377510B/zh not_active IP Right Cessation
- 1995-06-07 US US08/476,761 patent/US5654577A/en not_active Expired - Lifetime
- 1995-06-20 KR KR19950016333A patent/KR960002823A/ko not_active Application Discontinuation
- 1995-06-27 CN CN95107632A patent/CN1051644C/zh not_active Expired - Lifetime
-
1997
- 1997-03-25 US US08/823,167 patent/US6078084A/en not_active Expired - Lifetime
-
2002
- 2002-03-06 US US10/091,064 patent/US20020080669A1/en not_active Abandoned
-
2004
- 2004-01-30 US US10/767,078 patent/US6906971B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6078084A (en) | 2000-06-20 |
TW377510B (en) | 1999-12-21 |
JP4037470B2 (ja) | 2008-01-23 |
US5654577A (en) | 1997-08-05 |
JPH0817941A (ja) | 1996-01-19 |
US20020080669A1 (en) | 2002-06-27 |
US20040184330A1 (en) | 2004-09-23 |
CN1128902A (zh) | 1996-08-14 |
US6906971B2 (en) | 2005-06-14 |
CN1051644C (zh) | 2000-04-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E801 | Decision on dismissal of amendment | ||
J301 | Trial decision |
Free format text: TRIAL DECISION FOR APPEAL AGAINST DECISION TO DECLINE AMENDMENT REQUESTED 20020729 Effective date: 20021218 |
|
E902 | Notification of reason for refusal | ||
E601 | Decision to refuse application |