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KR940004802A - Npn 바이폴라 트랜지스터를 사용한 정전방전(esd) 보호 - Google Patents

Npn 바이폴라 트랜지스터를 사용한 정전방전(esd) 보호 Download PDF

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Publication number
KR940004802A
KR940004802A KR1019930015555A KR930015555A KR940004802A KR 940004802 A KR940004802 A KR 940004802A KR 1019930015555 A KR1019930015555 A KR 1019930015555A KR 930015555 A KR930015555 A KR 930015555A KR 940004802 A KR940004802 A KR 940004802A
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KR
South Korea
Prior art keywords
interconnect
pad
electrostatic discharge
esd
protection
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Application number
KR1019930015555A
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English (en)
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KR100297014B1 (ko
Inventor
비. 메릴 리챠드
씨. 레이놀드즈 데이비드
패렌코프 도그
Original Assignee
존 엠. 클락 3세
내쇼날 세미컨덕터 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 존 엠. 클락 3세, 내쇼날 세미컨덕터 코포레이션 filed Critical 존 엠. 클락 3세
Publication of KR940004802A publication Critical patent/KR940004802A/ko
Application granted granted Critical
Publication of KR100297014B1 publication Critical patent/KR100297014B1/ko

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/711—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using bipolar transistors as protective elements
    • H10D89/713—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using bipolar transistors as protective elements including a PNP transistor and a NPN transistor, wherein each of said transistors has its base region coupled to the collector region of the other transistor, e.g. silicon controlled rectifier [SCR] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/611—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using diodes as protective elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/711—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using bipolar transistors as protective elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/911—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using passive elements as protective elements

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  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

정전 방전에 대한 IC를 보호하는 회로는 제 1 I/O패드에 접속된 콜렉터 및 Vss에 접속된 에미터를 갖는 NPN 트랜지스터를 포함한다. 제너 다이오드는 제 1 I/O 패드에 접속된 캐소드, NPN 트랜지스터의 베이스 및 제1레지스터에 모두 접속된 애노드를 갖는다. 레지스터의 타단부는 Vss에 접속되어 있다.

Description

NPN 바이폴라 트랜지스터를 사용한 정전방전(ESD) 보호
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3a도는 본 발명에 따라 구성된 ESD 보호회로에 대한 개략적인 회로도,
제3b도는 제너 다이오드를 실현하기 위한 NPN 바이폴라 트랜지스터의 사용에 대한 예시도,
제4a도는 본 발명에 따라 구성된 ESD 보호 회로의 바람직한 실시예에 대한 개략적인 회로도,
제4도는 ESD 이벤트동안 제4a도의 회로 동작에 대한 예시도.

Claims (1)

  1. 정전 방전(ESD) 펄스로 부터 집적회로 특징부를 보호하는 집적회로(IC)와 함께 사용될 수 있는 보호 회로로서, IC를 포함하는 패키지는 상호 접속부를 거 쳐 IC의 각각의 특징부를 전기적으로 포함하는 복수개의 패드를 포함하고, 상기 패드는 최소한 제1상호 접속부를 거쳐 제1의 IC 특징부를 포함하는 제1패드, 제2상호 접속부를 거쳐 제2의 IC특징부를 포함하는 제2패드, 제3상호 접속부를 거쳐 IC에 제1기준 전압을 제공하는 제3패드, 및 제4상호 접속부를 거쳐 IC에 제2기준 전압을 제공하는 제4패드를 포함하는 보호 회로에 있어서, 애노드 및 캐소드를 갖는 제너 다이오드, 베이스, 콜렉터, 및 에미터를 갖는 제1바이폴라 트랜지스터, 및 제1및 제2단자를 갖는 레지스터를 포함하고, 제너 다이오드의 캐소드는 제1상호 접속부에 접속되어 있으며, 제1트랜지스터의 콜렉터는 제1상호 접속부에 접속되어 있고, 제너 다이오드의 애노드 및 제1트랜지스터의 베이스는 레지스터의 제1단자에 접속되어 있으며, 제1트랜지스터의 에미터 및 레지스터의 제2단자는 제4상호 접속부에 접속되어 있는 보호회로.
KR1019930015555A 1992-08-12 1993-08-11 Npn 바이폴라 트랜지스터를 사용하는 정전방전(esd)보호 KR100297014B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/928,902 US5276582A (en) 1992-08-12 1992-08-12 ESD protection using npn bipolar transistor
US92-07/928,902 1992-08-12

Publications (2)

Publication Number Publication Date
KR940004802A true KR940004802A (ko) 1994-03-16
KR100297014B1 KR100297014B1 (ko) 2001-10-24

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KR1019930015555A KR100297014B1 (ko) 1992-08-12 1993-08-11 Npn 바이폴라 트랜지스터를 사용하는 정전방전(esd)보호

Country Status (4)

Country Link
US (1) US5276582A (ko)
EP (1) EP0583105A1 (ko)
JP (1) JPH06163841A (ko)
KR (1) KR100297014B1 (ko)

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JPH06163841A (ja) 1994-06-10
KR100297014B1 (ko) 2001-10-24
US5276582A (en) 1994-01-04
EP0583105A1 (en) 1994-02-16

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