KR910016005A - 반도체 집적회로 - Google Patents
반도체 집적회로 Download PDFInfo
- Publication number
- KR910016005A KR910016005A KR1019910002226A KR910002226A KR910016005A KR 910016005 A KR910016005 A KR 910016005A KR 1019910002226 A KR1019910002226 A KR 1019910002226A KR 910002226 A KR910002226 A KR 910002226A KR 910016005 A KR910016005 A KR 910016005A
- Authority
- KR
- South Korea
- Prior art keywords
- integrated circuit
- semiconductor integrated
- mosfets
- mosfet
- gates
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 7
- 239000003990 capacitor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
- H03K17/223—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Read Only Memory (AREA)
- Static Random-Access Memory (AREA)
Abstract
Description
Claims (4)
- 소오스가 제1전원에 접속되고, 게이트·드레인상호가 접속된 제1MOSFET(P1,N1)와, 이 제1MOSFET(P1,N1)와 동일도전형으로서 상호의 게이트가 공통으로 접속되고, 소오스가 상기 제1전원에 접속되며, 드레인이 소망하는 전위로 설정될 소정의 노드에 접속된 제2MOSFET(P2,N2) 및, 상기 제1MOSFET(P1,N1)의 드레인과 제2전원사이에 접속된 용량(C)을 구비하여 구성된 것을 특징으로 하는 반도체 집적회로.
- 제1항에 있어서, 상기 노드에 불휘발성에 메모리셀이 접속되고, 이 불휘발성 메모리셀에는 용장관계의 정보가 저장되어 있는 것을 특징으로 하는 반도체 집적회로.
- 제1항에 있어서, 1개의 제1MOSFET의 게이트에 대해 복수개의 제2MOSFET의 게이트가 공통으로 접속되어 있는 것을 특징으로 하는 반도체 집적회로.
- 제1항에 있어서, 제1MOSFET(P1,N1)보다도 제2MOSFET(P2,N2)의 컨덕턴스가 큰 것을 특징으로 하는 반도체 집적회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2029685A JP2533213B2 (ja) | 1990-02-13 | 1990-02-13 | 半導体集積回路 |
JP02-29685 | 1990-02-13 | ||
JP02-029685 | 1990-02-13 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910016005A true KR910016005A (ko) | 1991-09-30 |
KR950007452B1 KR950007452B1 (ko) | 1995-07-11 |
Family
ID=12282966
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910002226A KR950007452B1 (ko) | 1990-02-13 | 1991-02-09 | 프리세트 회로 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5239207A (ko) |
JP (1) | JP2533213B2 (ko) |
KR (1) | KR950007452B1 (ko) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5296801A (en) * | 1991-07-29 | 1994-03-22 | Kabushiki Kaisha Toshiba | Bias voltage generating circuit |
JP3080830B2 (ja) * | 1994-02-28 | 2000-08-28 | 株式会社東芝 | 半導体集積回路 |
EP0730299B1 (en) * | 1995-02-28 | 2000-07-12 | Co.Ri.M.Me. | Circuit for biasing epitaxial regions |
KR100298444B1 (ko) * | 1998-08-26 | 2001-08-07 | 김영환 | 입력 버퍼 회로 |
US6496427B2 (en) * | 2000-08-28 | 2002-12-17 | Matsushita Electric Industrial Co., Ltd. | Nonvolatile semiconductor memory device |
JP2014116729A (ja) * | 2012-12-07 | 2014-06-26 | Toyota Central R&D Labs Inc | パワーオンリセット回路 |
US9577639B1 (en) * | 2015-09-24 | 2017-02-21 | Qualcomm Incorporated | Source separated cell |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58105497A (ja) * | 1981-12-17 | 1983-06-23 | Toshiba Corp | 半導体集積回路 |
JPS58211399A (ja) * | 1982-06-01 | 1983-12-08 | Nec Corp | 半導体装置 |
FR2558659B1 (fr) * | 1984-01-20 | 1986-04-25 | Thomson Csf | Circuit de polarisation d'un transistor a effet de champ |
JPS61158093A (ja) * | 1984-12-28 | 1986-07-17 | Pioneer Electronic Corp | メモリ装置 |
GB2176959B (en) * | 1985-06-18 | 1989-07-19 | Motorola Inc | Cmos power-on detection circuit |
JPS6445157A (en) * | 1987-08-13 | 1989-02-17 | Toshiba Corp | Semiconductor integrated circuit |
JPH0758599B2 (ja) * | 1987-09-08 | 1995-06-21 | 日本電気株式会社 | 冗長セルを有する半導体記憶装置 |
US4954769A (en) * | 1989-02-08 | 1990-09-04 | Burr-Brown Corporation | CMOS voltage reference and buffer circuit |
-
1990
- 1990-02-13 JP JP2029685A patent/JP2533213B2/ja not_active Expired - Fee Related
-
1991
- 1991-02-09 KR KR1019910002226A patent/KR950007452B1/ko not_active IP Right Cessation
- 1991-02-11 US US07/653,369 patent/US5239207A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH03235297A (ja) | 1991-10-21 |
KR950007452B1 (ko) | 1995-07-11 |
JP2533213B2 (ja) | 1996-09-11 |
US5239207A (en) | 1993-08-24 |
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