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KR910010706A - 집적회로의 동적 분리용회로 - Google Patents

집적회로의 동적 분리용회로 Download PDF

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Publication number
KR910010706A
KR910010706A KR1019900018739A KR900018739A KR910010706A KR 910010706 A KR910010706 A KR 910010706A KR 1019900018739 A KR1019900018739 A KR 1019900018739A KR 900018739 A KR900018739 A KR 900018739A KR 910010706 A KR910010706 A KR 910010706A
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KR
South Korea
Prior art keywords
potential
transistor
voltage
rear surface
lateral
Prior art date
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Application number
KR1019900018739A
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English (en)
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KR100192006B1 (ko
Inventor
빠브랭 앙뜨란
시까르 띠애리
시몽 마르끄
Original Assignee
원본미기재
에스지에스-톰손 마이크로일렉트로닉스 에스.에이.
지멘스 오토모티브 에스.에이.
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Publication of KR910010706A publication Critical patent/KR910010706A/ko
Application granted granted Critical
Publication of KR100192006B1 publication Critical patent/KR100192006B1/ko
Anticipated expiration legal-status Critical
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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
    • H03K17/08104—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit in field-effect transistor switches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/211—Design considerations for internal polarisation
    • H10D89/213—Design considerations for internal polarisation in field-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)

Abstract

내용 없음

Description

집적회로의 동적 분리용회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4도는 본 발명에 따른 회로에 의해서 수행되는 기능을 예시한 도면.
제5도는 극성 검출기의 도식적인 예를 보인 도면.
제6도는 극성 검출기의 일실시예를 보인 도면.

Claims (8)

  1. 기준전압(GND)에 관련된 첫번째 극성의 전압에 접속되고, 분리전위(Viso)로 칭하는 전위에 접속된 분리 영역(26;36)에 의해 하나하나씩 또는 그룹으로 분리되며, 회로의 전면으로부터 근접하기 쉬운 단자를 지닌 래터럴 트랜지스터와 버티컬 트랜지스터 및 후미에 대응하고, 기준전압에 관하여 첫번째 극성의 전위 (Vout)에 있는 후면(3)에 접속되는 전력단자를 포함하는 집적회로에 있어서, 상기 기준전압에 관련하여 후면의 전위의 신호를 검출하기 위한 수단(D), 후면의 전위가 상기 기준전위에 관련하여 첫번째 극성에 있을때 상기 기준전위에 상기 분리전위를 접속하는 적어도 하나의 래터럴 트랜지스터로 이루어진 첫번째 스위칭 수단 (S1); 후면의 전위가 상기 기준전위에 관련하여 두번째 극성에 있을때 후면의 전위에 상기 분리전위를 접속하는 적어도 하나의 버티컬 트랜지스터로 이루어진 두번째 스위칭 수단(S2)으로 구성됨을 특징으로 하는 동적분리회로.
  2. 제1항에 있어서, 상기 기준전위가 접지이고, 집적회로의 후면이 n+형층에 대응하고, 상기 분리영역이 P형이고, 상기 첫번째 극성이 양극(+)인 동적 분리회로.
  3. 제2항에 있어서,접지에 관련하여 후면의 전위의 신호를 검출하기 위한 상기수단(D)이 후면에 접속된 콜렉터, npn트랜지스터의 온 상태에서 베이스-에미터 전압 (VBE)보다 적은 특정한 양(+)의 전압(Vb)으로 바이어스되는 베이스, 부하소자(Rc)//대신 래터럴 트랜지스터의 양 (+)의 전원전압 (Vcc)에 접속된 에미터를 갖는 버티컬 npn트랜지스터 (Q1)를 포함하는동적 분리회로.
  4. 제2항에 있어서, 접지에 관하여 후면의 전위의 신호를 검출하기 위한 수단 (D)이 부하소자 대신 래터럴 트랜지스터 (M13)의 양(+)의 전원전압에 접속된 래터럴 NMOS트랜지스터(M14)의 다른 주요단자를 지닌 래터럴 NMOS트랜지스터(M14)에 접속된 (n)채널 VDMOS트랜지스터(M15)와 래터럴 트랜지스터의 양(+)의 전원전압(Vcc)으로 바이어스되는 n채널 VDMOS트랜지스터의 게이트 및 드레쉬홀드 전압 (VT)보다 조금 큰 값으로 바이어스되는 래터럴 NMOS트랜지스터 (M14)의 게이트를 포함하는 동적 분리회로.
  5. 제2항에 있어서, 상기 첫번째 스위칭 수단 (S1)이 기준전위에 접속된 소오스, 분리영역에 접속된 드레인, 신호검출수단(D)으로 제어되는 게이트를 갖는 증가형 n채널 MOS트랜지스터를 포함하는 동적 분리회로
  6. 제5항에 있어서, 상기 MOS트랜지스터의 기판이 기준전위(GND) 에 접속되는 동적 분리회로.
  7. 제2항에 있어서, 상기 두번째 스위칭 수단(S2)이 기판의 후면에 접속된 에미터, 분리영역에 접속된 콜렉터, 상기 신호검출 수단(D)으로 인버터를 통해 제어되는 베이스를 지닌 버티컬 npn바이폴라 트랜지스터를 포함하는 동적 분리회로.
  8. 제2항에 있어서, 상기 두번째 스위칭 수단 (S2)이 후면에 접속된 드레인, 분리전위에 접속된 소오스, 상기 신호검출수단(D)으로 인버터를 통해 제어되는 게이트를 지닌 버티컬 n채널 MOS트랜지스터를 포함하는 동적 분리회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900018739A 1989-11-29 1990-11-19 집적회로의 동적분리용회로 Expired - Fee Related KR100192006B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8916144A FR2655196B1 (fr) 1989-11-29 1989-11-29 Circuit d'isolation dynamique de circuits integres.
FR89/16144 1989-11-29

Publications (2)

Publication Number Publication Date
KR910010706A true KR910010706A (ko) 1991-06-29
KR100192006B1 KR100192006B1 (ko) 1999-06-15

Family

ID=9388221

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900018739A Expired - Fee Related KR100192006B1 (ko) 1989-11-29 1990-11-19 집적회로의 동적분리용회로

Country Status (6)

Country Link
US (1) US5159207A (ko)
EP (1) EP0432058B1 (ko)
JP (1) JP3120447B2 (ko)
KR (1) KR100192006B1 (ko)
DE (1) DE69016962T2 (ko)
FR (1) FR2655196B1 (ko)

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EP0520125B1 (en) * 1991-06-27 1997-08-20 Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe Switching circuit for connecting a first circuit node to a second or to a third circuit node according to the latter's potential, for controlling the potential of an insulation region of an integrated circuit according to the substrate's potential
IT1252623B (it) * 1991-12-05 1995-06-19 Sgs Thomson Microelectronics Dispositivo a semiconduttore comprendente almeno un transistor di potenza e almeno un circuito di comando, con circuito di isolamento dinamico,integrati in maniera monolitica nella stessa piastrina
DE69518064T2 (de) * 1995-03-22 2000-12-21 Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno, Catania Verfahren und Anordnung zum dynamischen automatischen Vorspannen von Gebieten in integrierte Schaltungen
US5834820A (en) * 1995-10-13 1998-11-10 Micron Technology, Inc. Circuit for providing isolation of integrated circuit active areas
JP3036423B2 (ja) * 1996-02-06 2000-04-24 日本電気株式会社 半導体装置
US6023186A (en) * 1996-04-30 2000-02-08 Kabushiki Kaisha Toshiba CMOS integrated circuit device and inspection method thereof
WO1998033274A1 (en) * 1997-01-24 1998-07-30 Hitachi, Ltd. Power switch circuit
US6169309B1 (en) * 1997-09-30 2001-01-02 Texas Instruments Incorporated High breakdown-voltage transistor with transient protection
EP1028468A1 (en) 1999-02-09 2000-08-16 STMicroelectronics S.r.l. Biasing circuit for isolation region in integrated power circuit
US6165868A (en) * 1999-06-04 2000-12-26 Industrial Technology Research Institute Monolithic device isolation by buried conducting walls
US6525394B1 (en) * 2000-08-03 2003-02-25 Ray E. Kuhn Substrate isolation for analog/digital IC chips
US6627970B2 (en) * 2000-12-20 2003-09-30 Infineon Technologies Ag Integrated semiconductor circuit, in particular a semiconductor memory circuit, having at least one integrated electrical antifuse structure, and a method of producing the structure
SE520306C2 (sv) * 2001-01-31 2003-06-24 Ericsson Telefon Ab L M Regulator för en halvledarkrets
US6573562B2 (en) * 2001-10-31 2003-06-03 Motorola, Inc. Semiconductor component and method of operation
JP4166103B2 (ja) * 2003-02-27 2008-10-15 ローム株式会社 半導体集積回路装置
US6998921B2 (en) * 2003-10-14 2006-02-14 Broadcom Corporation Method for avoiding avalanche breakdown caused by a lateral parasitic bipolar transistor in an MOS process
DE102004062135B4 (de) * 2004-12-23 2010-09-23 Atmel Automotive Gmbh Verstärkerschaltung
FR2948828B1 (fr) * 2009-07-28 2011-09-30 St Microelectronics Rousset Dispositif electronique de protection contre une inversion de polarite d'une tension d'alimentation continue, et application au domaine de l'automobile
US9142951B2 (en) 2009-07-28 2015-09-22 Stmicroelectronics (Rousset) Sas Electronic device for protecting against a polarity reversal of a DC power supply voltage, and its application to motor vehicles
CN103594491B (zh) * 2012-08-14 2016-07-06 北大方正集团有限公司 一种cdmos制作方法
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Also Published As

Publication number Publication date
FR2655196A1 (fr) 1991-05-31
KR100192006B1 (ko) 1999-06-15
EP0432058A1 (fr) 1991-06-12
DE69016962T2 (de) 1995-09-21
FR2655196B1 (fr) 1992-04-10
DE69016962D1 (de) 1995-03-23
JPH03188666A (ja) 1991-08-16
US5159207A (en) 1992-10-27
JP3120447B2 (ja) 2000-12-25
EP0432058B1 (fr) 1995-02-15

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