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KR910003669A - 반도체기억장치의 데이터독출회로 - Google Patents

반도체기억장치의 데이터독출회로 Download PDF

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Publication number
KR910003669A
KR910003669A KR1019900010473A KR900010473A KR910003669A KR 910003669 A KR910003669 A KR 910003669A KR 1019900010473 A KR1019900010473 A KR 1019900010473A KR 900010473 A KR900010473 A KR 900010473A KR 910003669 A KR910003669 A KR 910003669A
Authority
KR
South Korea
Prior art keywords
equalizing
pair
memory device
semiconductor memory
øeq
Prior art date
Application number
KR1019900010473A
Other languages
English (en)
Other versions
KR930008578B1 (ko
Inventor
사토루 호시
마사미 마스다
다카유키 가와구치
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
다케다이 마사다카
도시바 마이크로 이렉트로닉스 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 아오이 죠이치, 가부시키가이샤 도시바, 다케다이 마사다카, 도시바 마이크로 이렉트로닉스 가부시키가이샤 filed Critical 아오이 죠이치
Publication of KR910003669A publication Critical patent/KR910003669A/ko
Application granted granted Critical
Publication of KR930008578B1 publication Critical patent/KR930008578B1/ko

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)

Abstract

내용 없음.

Description

반도체기억장치의 데이터독출회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 1실시예에 따른 데이터출력장치의 블록도.
제2도는 제1도에 도시된 구성의 동작을 설명하기 위한 타이밍 차트.
제3도는 본 발명의 다른 실시예에 따른 데이터출력 장치의 블록도.

Claims (1)

1쌍의 상보형 데이터선을 입력에 갖춘 감지증폭기(22)의 입력이퀼라이즈용 제1스위치수단 (Tr3)과, 상기 감지증폭기(22)의 1쌍의 상보형 출력선을 이퀼라이즈 하는 제2스위치수단 (Tr4), 상기 1쌍의 상보형 데이터선과 상기 1쌍의 상보형 출력선 사이를 각각 이퀼라이즈하는 제3스위치 수단(Tr5,Tr6), 상기 제2 및 제3스위치수단에 이 제2 및 제3스위치수단을 온 시키 위한 제1이퀼라이즈펄스를 공급하는 제1이퀼라이즈펄스발생수단(41), 상기 제1수위치 수단에 이 제1스위치를 온시키는 상기 제1퀼라이즈펄스보다도 빠르게 성립되는 제2이퀼라이 즈퍼스를 공급하는 제2이퀼라이즈펄스발생수단(42)이 구비되고, 상기 제1 및 제2 및 이퀼라 이즈펄가 인가되는 신호계의 부하용량을 각각 C(øeq), C(øeq′)로 할때 C(øwq)＞C(øeq′)로 되는 관계가 만족되도록 구 성된 것을 특징으로 하는 반도체기억장치의 데이터독출회로.
※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900010473A 1989-07-12 1990-07-11 반도체기억장치의 데이터독출회로 KR930008578B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1179816A JPH0646513B2 (ja) 1989-07-12 1989-07-12 半導体記憶装置のデータ読出回路
JP1-179816 1989-07-12

Publications (2)

Publication Number Publication Date
KR910003669A true KR910003669A (ko) 1991-02-28
KR930008578B1 KR930008578B1 (ko) 1993-09-09

Family

ID=16072394

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900010473A KR930008578B1 (ko) 1989-07-12 1990-07-11 반도체기억장치의 데이터독출회로

Country Status (5)

Country Link
US (1) US5068831A (ko)
EP (1) EP0408031B1 (ko)
JP (1) JPH0646513B2 (ko)
KR (1) KR930008578B1 (ko)
DE (1) DE69013250T2 (ko)

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US5345420A (en) * 1986-10-27 1994-09-06 Seiko Epson Corporation Semiconductor memory device
US5237534A (en) * 1989-04-27 1993-08-17 Kabushiki Kaisha Toshiba Data sense circuit for a semiconductor nonvolatile memory device
US5793667A (en) * 1990-09-19 1998-08-11 The United States Of America As Represented By The Secretary Of The Navy Sense amplifier control system for ferroelectric memories
US5305268A (en) * 1990-12-13 1994-04-19 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with column equilibrate on change of data during a write cycle
US5151879A (en) * 1990-12-27 1992-09-29 Motorola, Inc. Sense amplifier with latch
JP3319610B2 (ja) * 1991-11-22 2002-09-03 日本テキサス・インスツルメンツ株式会社 信号伝達回路
JP2680936B2 (ja) * 1991-02-13 1997-11-19 シャープ株式会社 半導体記憶装置
JP2509004B2 (ja) * 1991-03-04 1996-06-19 株式会社東芝 半導体記憶装置
JP2745251B2 (ja) * 1991-06-12 1998-04-28 三菱電機株式会社 半導体メモリ装置
KR940010838B1 (ko) * 1991-10-28 1994-11-17 삼성전자 주식회사 데이타 출력 콘트롤 회로
JPH05159575A (ja) * 1991-12-04 1993-06-25 Oki Electric Ind Co Ltd ダイナミックランダムアクセスメモリ
JPH05166365A (ja) * 1991-12-12 1993-07-02 Toshiba Corp ダイナミック型半導体記憶装置
DE69228919T2 (de) * 1991-12-17 1999-08-26 Stmicroelectronics Tristate-Treiberschaltung für interne Datenbusleitungen
US5295104A (en) * 1991-12-17 1994-03-15 Sgs-Thomson Microelectronics, Inc. Integrated circuit with precharged internal data bus
JPH05217365A (ja) * 1992-02-03 1993-08-27 Mitsubishi Electric Corp 半導体記憶装置
JPH05217367A (ja) * 1992-02-03 1993-08-27 Mitsubishi Electric Corp 半導体記憶装置
KR950009234B1 (ko) * 1992-02-19 1995-08-18 삼성전자주식회사 반도체 메모리장치의 비트라인 분리클럭 발생장치
JP2667946B2 (ja) * 1992-09-21 1997-10-27 三菱電機株式会社 半導体記憶装置
US5347183A (en) * 1992-10-05 1994-09-13 Cypress Semiconductor Corporation Sense amplifier with limited output voltage swing and cross-coupled tail device feedback
US5381364A (en) * 1993-06-24 1995-01-10 Ramtron International Corporation Ferroelectric-based RAM sensing scheme including bit-line capacitance isolation
US5402379A (en) * 1993-08-31 1995-03-28 Sgs-Thomson Microelectronics, Inc. Precharge device for an integrated circuit internal bus
JPH07326192A (ja) * 1994-05-31 1995-12-12 Toshiba Micro Comput Eng Corp 半導体記憶装置
US5508644A (en) * 1994-09-28 1996-04-16 Motorola, Inc. Sense amplifier for differential voltage detection with low input capacitance
KR0158112B1 (ko) * 1995-04-25 1999-02-01 김광호 다수개의 뱅크들을 가지는 반도체 메모리 장치
JP3202559B2 (ja) * 1995-10-13 2001-08-27 日本電気株式会社 半導体メモリ
JPH10302472A (ja) * 1997-04-24 1998-11-13 Texas Instr Japan Ltd 半導体メモリ装置
US5835433A (en) * 1997-06-09 1998-11-10 Micron Technology, Inc. Floating isolation gate from DRAM sensing
US6426656B1 (en) * 2000-04-19 2002-07-30 Velio Communications, Inc. High speed, low-power inter-chip transmission system
US7134034B1 (en) * 2003-10-15 2006-11-07 Integrated Device Technology, Inc. Data paths with receiver timing fixable to a downstream stage and methods of operation thereof
JP4028840B2 (ja) * 2003-12-17 2007-12-26 シャープ株式会社 半導体読み出し回路
US7888962B1 (en) 2004-07-07 2011-02-15 Cypress Semiconductor Corporation Impedance matching circuit
US8036846B1 (en) 2005-10-20 2011-10-11 Cypress Semiconductor Corporation Variable impedance sense architecture and method

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Also Published As

Publication number Publication date
JPH0344891A (ja) 1991-02-26
KR930008578B1 (ko) 1993-09-09
DE69013250D1 (de) 1994-11-17
JPH0646513B2 (ja) 1994-06-15
US5068831A (en) 1991-11-26
DE69013250T2 (de) 1995-03-16
EP0408031A2 (en) 1991-01-16
EP0408031A3 (en) 1992-08-05
EP0408031B1 (en) 1994-10-12

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