KR910006994A - 센스 앰프회로 - Google Patents
센스 앰프회로 Download PDFInfo
- Publication number
- KR910006994A KR910006994A KR1019900015172A KR900015172A KR910006994A KR 910006994 A KR910006994 A KR 910006994A KR 1019900015172 A KR1019900015172 A KR 1019900015172A KR 900015172 A KR900015172 A KR 900015172A KR 910006994 A KR910006994 A KR 910006994A
- Authority
- KR
- South Korea
- Prior art keywords
- sense amplifier
- amplifier circuit
- bit line
- potential
- mos transistor
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Dram (AREA)
- Read Only Memory (AREA)
Abstract
Description
Claims (4)
- 반도체메모리에서의 독출억세스개시전에 센스앰프회로(SA)의 동작이 나쁜 경로로 되는 경우의 데이터출력 상태로 되도록 출력전위가 설정되는 것을 특징으로 하는 센스앰프회로.
- 제1항에 있어서, 상기 센스앰프회로(SA)의 출력노드(1)와 소정전위간에 접속된 비트선프리챠지신호(PR)에 의해 게이트제어되는 비트선전위입력용 MOS트랜지스터(N3)를 구비한 것을 특징으로 하는 센스앰프회로.
- 제1항 또는 제2항에 있어서, 상기 비트선전위입력용 MOS트랜지스터가 N챈널형이고, 독출억세스개시전에 출력전위가 저레벨로 설정되는 것을 특징으로 하는 센스앰프회로.
- 제1항 또는 제2항에 있어서, 상기 비트선전위입력용 MOS트랜지스터가 P챈널형이고, 독출억세스개시전에 출력전위가 고레벨로 설정되는 것을 특징으로 하는 센스앰프회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1253569A JPH03116493A (ja) | 1989-09-28 | 1989-09-28 | センスアンプ回路 |
JP01-253569 | 1989-09-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR910006994A true KR910006994A (ko) | 1991-04-30 |
Family
ID=17253197
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900015172A KR910006994A (ko) | 1989-09-28 | 1990-09-25 | 센스 앰프회로 |
KR2019950012711U KR960009909Y1 (ko) | 1989-09-28 | 1995-06-05 | 센스앰프회로 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019950012711U KR960009909Y1 (ko) | 1989-09-28 | 1995-06-05 | 센스앰프회로 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5305272A (ko) |
EP (1) | EP0420189B1 (ko) |
JP (1) | JPH03116493A (ko) |
KR (2) | KR910006994A (ko) |
DE (1) | DE69024733T2 (ko) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5481500A (en) * | 1994-07-22 | 1996-01-02 | International Business Machines Corporation | Precharged bit decoder and sense amplifier with integrated latch usable in pipelined memories |
US5608681A (en) * | 1996-01-22 | 1997-03-04 | Lsi Logic Corporation | Fast memory sense system |
EP0827152B1 (en) * | 1996-09-02 | 2003-03-26 | Infineon Technologies AG | Current-mode sense amplifier |
US6032274A (en) * | 1997-06-20 | 2000-02-29 | Micron Technology, Inc. | Method and apparatus for compressed data testing of more than one memory array |
US5935263A (en) * | 1997-07-01 | 1999-08-10 | Micron Technology, Inc. | Method and apparatus for memory array compressed data testing |
US5959921A (en) * | 1997-07-24 | 1999-09-28 | Micron Technology, Inc. | Sense amplifier for complement or no-complementary data signals |
US5809038A (en) * | 1997-07-24 | 1998-09-15 | Micron Technology, Inc. | Method and apparatus for reading compressed test data from memory devices |
US6295618B1 (en) | 1998-08-25 | 2001-09-25 | Micron Technology, Inc. | Method and apparatus for data compression in memory devices |
JP2001028429A (ja) * | 1999-07-15 | 2001-01-30 | Nec Corp | 不揮発性半導体記憶装置およびその製造方法 |
FR2823362B1 (fr) | 2001-04-06 | 2005-03-11 | St Microelectronics Sa | Dispositif de lecture de cellules memoire |
KR100528789B1 (ko) * | 2003-08-01 | 2005-11-15 | 주식회사 하이닉스반도체 | 셀프 리프래쉬 모드 진입을 위한 클럭 인에이블 버퍼 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4239994A (en) * | 1978-08-07 | 1980-12-16 | Rca Corporation | Asymmetrically precharged sense amplifier |
DE2926514A1 (de) * | 1979-06-30 | 1981-01-15 | Ibm Deutschland | Elektrische speicheranordnung und verfahren zu ihrem betrieb |
JPS5755592A (en) * | 1980-09-18 | 1982-04-02 | Nec Corp | Memory device |
JPS5785255A (en) * | 1980-11-17 | 1982-05-27 | Nec Corp | Memory storage for integrated circuit |
US4412143A (en) * | 1981-03-26 | 1983-10-25 | Ncr Corporation | MOS Sense amplifier |
JPS57198594A (en) * | 1981-06-01 | 1982-12-06 | Hitachi Ltd | Semiconductor storage device |
JPS59119589A (ja) * | 1982-12-27 | 1984-07-10 | Toshiba Corp | 差動増幅器 |
JPS60226092A (ja) * | 1984-04-25 | 1985-11-11 | Nec Corp | センスアンプ |
-
1989
- 1989-09-28 JP JP1253569A patent/JPH03116493A/ja active Granted
-
1990
- 1990-09-25 KR KR1019900015172A patent/KR910006994A/ko not_active Application Discontinuation
- 1990-09-26 DE DE69024733T patent/DE69024733T2/de not_active Expired - Fee Related
- 1990-09-26 EP EP90118471A patent/EP0420189B1/en not_active Expired - Lifetime
-
1993
- 1993-08-25 US US08/111,738 patent/US5305272A/en not_active Expired - Lifetime
-
1995
- 1995-06-05 KR KR2019950012711U patent/KR960009909Y1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE69024733D1 (de) | 1996-02-22 |
EP0420189A2 (en) | 1991-04-03 |
US5305272A (en) | 1994-04-19 |
JPH0531238B2 (ko) | 1993-05-12 |
EP0420189A3 (en) | 1992-05-27 |
JPH03116493A (ja) | 1991-05-17 |
DE69024733T2 (de) | 1996-06-27 |
EP0420189B1 (en) | 1996-01-10 |
KR960009909Y1 (ko) | 1996-11-18 |
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Comment text: Notification of reason for refusal Patent event date: 19931129 Patent event code: PE09021S01D |
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