JPS6453461A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To provide a MOS-type transistor micronized in size, which is resistant to a punch through and excellent in a deterioration-resistant property by a method wherein the depth of a high concentrated P-type impurity layer is made to be larger than those of a source region and a drain region, and the source region and the drain region are made to extend inside a gate electrode in a manner that a constriction is made to be formed in a channel region. CONSTITUTION:A P-type impurity layer 103 larger than a P-type silicon substrate 1 in impurity concentration, a low concentrated N-type impurity layer 105, a high concentrated N-type impurity layer 107, a gate oxide film 102, and a gate electrode 104 are laminated on the P-type silicon substrate 1. A MOS-type transistor is constructed through a process as mentioned above, where the current passage through a channel is bent downward at a drain end and the generating point of hot carriers is shifted inside the substrate 1, so that the deterioration of the MOS-type transistor hardly takes place. And, both a source region and a drain region are made to be deep, whereas the high concentrated P-type impurity layer 103 is at deeper level, so that a depletion layer is prevented from extending and a punch-through hardly takes place, and thus the MOS transistor can be micronized.