[go: up one dir, main page]

JPS6079771U - multilayer wiring board - Google Patents

multilayer wiring board

Info

Publication number
JPS6079771U
JPS6079771U JP17255183U JP17255183U JPS6079771U JP S6079771 U JPS6079771 U JP S6079771U JP 17255183 U JP17255183 U JP 17255183U JP 17255183 U JP17255183 U JP 17255183U JP S6079771 U JPS6079771 U JP S6079771U
Authority
JP
Japan
Prior art keywords
wiring board
multilayer wiring
integrated circuit
metal pattern
circuit chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17255183U
Other languages
Japanese (ja)
Inventor
丸井 義美
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP17255183U priority Critical patent/JPS6079771U/en
Publication of JPS6079771U publication Critical patent/JPS6079771U/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の多層プリント配線基板の外観平面図、第
2図は本考案によるTAB型リードの集積回路チップの
実装に適した多層プリント配線基゛板の外観平面図、第
3図は従来の多層プリント配線基板にモールド封止した
集積回路チップを実装−した部分拡大図、第5図はその
断面図である。第4図は本考案の多層プリント配線基板
に一■型リードを有する集積回路チップを実装しれ部分
拡大図であり、第6図はその断面図である。第7図は集
積回路チップの封止を施した場合の断面図である。 各図において、1・・・・・・多層プリント配線基板の
外部接続端子、2・・・・・・スルーホール、3・・・
・・・キャビティ、4・・・・・・アイランド用金属パ
ターン、5・・・・・・接続端子用金属パターン、6・
・・・・・モールド封止の集積回路チップ、7・・・・
・・リード端子、8・・・・・・TAB型リード、9・
・・・・・TAB型リードを有する集積回路チップ、1
0・・・・・・シリコン樹脂、11・・・・・・従来の
多層プリント配線基板、12・・・・・・本考案による
多層プリント配線基板。
Fig. 1 is an external plan view of a conventional multilayer printed wiring board, Fig. 2 is an external plan view of a multilayer printed wiring board suitable for mounting an integrated circuit chip with TAB type leads according to the present invention, and Fig. 3 is a conventional multilayer printed wiring board. FIG. 5 is a partially enlarged view of a multilayer printed wiring board with a mold-sealed integrated circuit chip mounted thereon, and FIG. 5 is a sectional view thereof. FIG. 4 is a partially enlarged view of an integrated circuit chip having one square lead mounted on a multilayer printed wiring board of the present invention, and FIG. 6 is a sectional view thereof. FIG. 7 is a cross-sectional view of the integrated circuit chip after it is sealed. In each figure, 1... External connection terminal of multilayer printed wiring board, 2... Through hole, 3...
...Cavity, 4...Metal pattern for island, 5...Metal pattern for connection terminal, 6...
...Mold-sealed integrated circuit chip, 7...
...Lead terminal, 8...TAB type lead, 9.
...Integrated circuit chip with TAB type leads, 1
0...Silicone resin, 11...Conventional multilayer printed wiring board, 12...Multilayer printed wiring board according to the present invention.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] TAB型リードを有する集積回路チップを収容し、直接
実装することに適した多数のキャビティと、該キャビ5
ティ周辺の表面に一$型リードを接続する金属パターン
と、該キャビティ内に集積回路チップを、マウント接着
するアイランド用金属パターンを有することを特徴とす
る多層配線基板。
a number of cavities suitable for accommodating and directly mounting integrated circuit chips with TAB type leads;
1. A multilayer wiring board comprising: a metal pattern for connecting a $1 lead on the surface around the tee; and a metal pattern for an island for mounting and bonding an integrated circuit chip in the cavity.
JP17255183U 1983-11-08 1983-11-08 multilayer wiring board Pending JPS6079771U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17255183U JPS6079771U (en) 1983-11-08 1983-11-08 multilayer wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17255183U JPS6079771U (en) 1983-11-08 1983-11-08 multilayer wiring board

Publications (1)

Publication Number Publication Date
JPS6079771U true JPS6079771U (en) 1985-06-03

Family

ID=30376107

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17255183U Pending JPS6079771U (en) 1983-11-08 1983-11-08 multilayer wiring board

Country Status (1)

Country Link
JP (1) JPS6079771U (en)

Similar Documents

Publication Publication Date Title
JPS6079771U (en) multilayer wiring board
JPS5936268U (en) printed wiring board
JPS58118774U (en) electronic circuit package
JPS6115746U (en) Packages for integrated circuits
JPS614436U (en) Packages for semiconductor devices
JPS6025170U (en) Arrangement structure of terminal connection pads on printed circuit board
JPS592146U (en) Electronic component package
JPS6127338U (en) Hybrid integrated circuit device
JPS6094861U (en) printed circuit device
JPS6054340U (en) integrated circuit
JPS5829845U (en) Lead pin shape of ceramic multilayer wiring board
JPS6096846U (en) Semiconductor integrated circuit device
JPS5936259U (en) Polygonal Pinch Tupkyaria
JPH01166565U (en)
JPH0231177U (en)
JPS59103449U (en) Mounting structure of semiconductor package
JPS60179065U (en) printed circuit board
JPS59131158U (en) Chippukiyariya
JPS58166072U (en) 3D hybrid integrated circuit
JPH0295247U (en)
JPS58196869U (en) Electrical component mounting structure on printed wiring board
JPH0258333U (en)
JPS5899843U (en) hybrid integrated circuit
JPS5952662U (en) printed wiring board
JPS60130672U (en) printed wiring board