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JPS59103449U - Mounting structure of semiconductor package - Google Patents

Mounting structure of semiconductor package

Info

Publication number
JPS59103449U
JPS59103449U JP19961482U JP19961482U JPS59103449U JP S59103449 U JPS59103449 U JP S59103449U JP 19961482 U JP19961482 U JP 19961482U JP 19961482 U JP19961482 U JP 19961482U JP S59103449 U JPS59103449 U JP S59103449U
Authority
JP
Japan
Prior art keywords
semiconductor package
pin
mounting structure
above connection
connection pin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19961482U
Other languages
Japanese (ja)
Inventor
優 松本
豊 磯田
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP19961482U priority Critical patent/JPS59103449U/en
Publication of JPS59103449U publication Critical patent/JPS59103449U/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は従来の半導体パッケージの実装構造
を示す断面図、第3図は本考案による半導体パッケージ
の実装構造を示す断面図である。 11・・・・・・半導体パッケージ、12・・・・・・
接続ピン、13・・・・・・先端部、14・・・・・・
プリント基板、15・・・・・・プリント基板の表面、
16・・・・・・接続用ヴイア、18・・・・・・接続
孔、20・・・・・・半田。
1 and 2 are cross-sectional views showing a conventional semiconductor package mounting structure, and FIG. 3 is a cross-sectional view showing a semiconductor package mounting structure according to the present invention. 11... Semiconductor package, 12...
Connection pin, 13...Tip, 14...
Printed circuit board, 15...Surface of printed circuit board,
16... Connection via, 18... Connection hole, 20... Solder.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 回路素子が作り込まれたチップを内部に封入した半導体
パッケージの裏面側に短寸で先端部が先細とされた接続
ピンを突出し、一方プリント基板の表面の上記接続ピン
と対応する箇所には上記接続ピンの外径よりやや小さい
孔径を有する接続用ヴイアを設け、上記接続ピンの先端
先細部を接続用ヴイアの上端部に嵌合して半田付は固定
してなる半導体パッケージの実装構造。
A short connecting pin with a tapered tip protrudes from the back side of a semiconductor package in which a chip in which a circuit element is built is sealed, while the above connection pin is placed on the surface of the printed circuit board at a location corresponding to the above connection pin. A mounting structure for a semiconductor package, in which a connecting via having a hole diameter slightly smaller than the outer diameter of a pin is provided, and a tapered part of the tip of the connecting pin is fitted into an upper end of the connecting via to fix soldering.
JP19961482U 1982-12-28 1982-12-28 Mounting structure of semiconductor package Pending JPS59103449U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19961482U JPS59103449U (en) 1982-12-28 1982-12-28 Mounting structure of semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19961482U JPS59103449U (en) 1982-12-28 1982-12-28 Mounting structure of semiconductor package

Publications (1)

Publication Number Publication Date
JPS59103449U true JPS59103449U (en) 1984-07-12

Family

ID=30425140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19961482U Pending JPS59103449U (en) 1982-12-28 1982-12-28 Mounting structure of semiconductor package

Country Status (1)

Country Link
JP (1) JPS59103449U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5120731B2 (en) * 1972-12-27 1976-06-28
JPS56104489A (en) * 1980-01-23 1981-08-20 Hitachi Ltd Substrate connecting terminal mounting structure
JPS57180155A (en) * 1981-04-30 1982-11-06 Nec Corp Vessel for electronic circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5120731B2 (en) * 1972-12-27 1976-06-28
JPS56104489A (en) * 1980-01-23 1981-08-20 Hitachi Ltd Substrate connecting terminal mounting structure
JPS57180155A (en) * 1981-04-30 1982-11-06 Nec Corp Vessel for electronic circuit

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