JPS5855654B2 - Manufacturing method for semiconductor devices - Google Patents
Manufacturing method for semiconductor devicesInfo
- Publication number
- JPS5855654B2 JPS5855654B2 JP54103051A JP10305179A JPS5855654B2 JP S5855654 B2 JPS5855654 B2 JP S5855654B2 JP 54103051 A JP54103051 A JP 54103051A JP 10305179 A JP10305179 A JP 10305179A JP S5855654 B2 JPS5855654 B2 JP S5855654B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- impurity
- semiconductor substrate
- semiconductor
- silver
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title claims description 38
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000010410 layer Substances 0.000 claims description 74
- 239000012535 impurity Substances 0.000 claims description 47
- 239000000463 material Substances 0.000 claims description 23
- 239000000758 substrate Substances 0.000 claims description 23
- 229920002120 photoresistant polymer Polymers 0.000 claims description 21
- 229910052709 silver Inorganic materials 0.000 claims description 15
- 239000004332 silver Substances 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 11
- 239000011247 coating layer Substances 0.000 claims description 9
- BUGBHKTXTAQXES-UHFFFAOYSA-N Selenium Chemical compound [Se] BUGBHKTXTAQXES-UHFFFAOYSA-N 0.000 claims description 8
- 229910052711 selenium Inorganic materials 0.000 claims description 8
- 239000011669 selenium Substances 0.000 claims description 8
- 238000010438 heat treatment Methods 0.000 claims description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 11
- 239000000243 solution Substances 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- -1 silver ions Chemical class 0.000 description 3
- 238000007738 vacuum evaporation Methods 0.000 description 3
- 239000012670 alkaline solution Substances 0.000 description 2
- 150000004770 chalcogenides Chemical class 0.000 description 2
- 230000018109 developmental process Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 239000002253 acid Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000012790 confirmation Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 238000000859 sublimation Methods 0.000 description 1
- 230000008022 sublimation Effects 0.000 description 1
- 230000008961 swelling Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Description
【発明の詳細な説明】
本発明は、半導体基体内１こその主面側より所要の導電
型を有する不純物の拡散されてなる半導体領域が形成さ
れてなる構成を有する半導体装置の製法に関し、特に半
導体領域を少ない工程数で高精密１こ得ることの出来る
新規な斯種半導体装置の製法を提案せんとするものであ
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device having a structure in which a semiconductor region is formed by diffusing an impurity having a desired conductivity type from the main surface side of a semiconductor substrate 1, and particularly relates to a method for manufacturing a semiconductor device. The purpose of this invention is to propose a novel method for manufacturing such a semiconductor device that can achieve high precision in the semiconductor region with a small number of steps.
本願発明者などは、セレンを主成分とする第１の層（非
晶質カリコゲナイド層）と、銀又は銀を含む第２の層と
よりなる無機フォトレジスト材層がフォトレジストとし
ての高解像特性を有すること、このような高解像特性を
有する無機フォトレジスト材層に、所要の導電型を与え
る不純物を比較的多量含有させても、フォトレジストと
しくの高解像特性が損なわれないこと、従って、その不
純物を含有している無機フォトレジスト材層を、半導体
基体上で、パターン化し、その不純物を含有しているパ
ターン化された無機フォトレジスト材層を不純物含有層
として、その不純物含有層から、不純物を半導体基体内
に熱拡散させれば、半導体基体上に別途不純物拡散用層
を形成して、これから半導体基体内１こ不純物を熱拡散
させる必要なし１こ、半導体基体内１こ、所要の導電型
を有する半導体領域を、高精度１こ形成することができ
ること、この不純物の熱拡散を、不純物含有層が、耐熱
性被覆層１こよって覆われている状態で、なせば、不純
物含有層を構成している無機フォトレジスト材層を不必
要１こ昇華乃至蒸発させることなし１こ、効果的１こ不
純物を半導体基体内１こ熱拡散させることができること
などを発見乃至確認した。The inventors of the present application have discovered that an inorganic photoresist material layer consisting of a first layer containing selenium as a main component (amorphous chalcogenide layer) and a second layer containing silver or silver has a high resolution as a photoresist. Even if an inorganic photoresist material layer with such high-resolution characteristics contains a relatively large amount of impurities that impart the desired conductivity type, the high-resolution characteristics typical of a photoresist will not be impaired. Therefore, an inorganic photoresist material layer containing the impurity is patterned on a semiconductor substrate, and the patterned inorganic photoresist material layer containing the impurity is used as an impurity-containing layer to remove the impurity. If the impurity is thermally diffused from the containing layer into the semiconductor substrate, there is no need to form a separate impurity diffusion layer on the semiconductor substrate and then thermally diffuse the impurity within the semiconductor substrate. This means that it is possible to form a semiconductor region having a desired conductivity type with high precision, and that the impurity can be thermally diffused while the impurity-containing layer is covered with the heat-resistant coating layer 1. We have discovered and confirmed that impurities can be effectively thermally diffused within a semiconductor substrate without unnecessary sublimation or evaporation of the inorganic photoresist material layer constituting the impurity-containing layer. did.
本発明は、このような発見乃至確認１こ基き提案された
ものである。The present invention was proposed based on such discovery or confirmation.
以下図面を伴なづて本発明の一例を述べるトこ、第１図
１こ示す如き例えばＮ型の半導体基体１が予め用意され
、而してその主面２上１こ第２図１こ示す如く例えばＰ
型不純物を含むセレンを主成分とせる層３とその層３上
１こ形成された銀又は銀を含む層４とよりなる無機フォ
トレジスト材層５を形成する。An example of the present invention will be described below with reference to the drawings. For example, an N-type semiconductor substrate 1 as shown in FIG. For example, P
An inorganic photoresist material layer 5 consisting of a layer 3 mainly composed of selenium containing type impurities and a layer 4 containing silver or silver formed on the layer 3 is formed.
実際上斯る無機フォトレジスト材層５は、基体１の主面
上１こ、層３を真空蒸着又はスパッタリング１こよりセ
レンを主成分とするもセレンとゲルマニウムとを主成分
とせる、望ましくはＳｅ７゜（３ｅ３０の組成乃至その
近傍の組成を有する非晶質カルコゲナイド層として形成
し、次に層３上１こ、層４を真空蒸着又はスパッタリン
グ若しくは層３の銀イオンを含む溶液への浸漬１こより
銀層、銀のカルコゲナイド層、銀のハライド層等として
形成することによって得られる。In fact, such an inorganic photoresist material layer 5 is formed on the main surface of the substrate 1 by vacuum evaporation or sputtering to form a layer 3 containing selenium as a main component or selenium and germanium as main components, preferably Se7. (Form as an amorphous chalcogenide layer with a composition of 3e30 or a composition close to that, and then apply vacuum evaporation or sputtering to layer 3 and layer 4, or immerse layer 3 in a solution containing silver ions. It can be obtained by forming a silver layer, a silver chalcogenide layer, a silver halide layer, or the like.
次］こ第３図１こ示す如く無機フォトレジスト材層５１
こ対してその層４側より符号６で示す如く光、電子線、
イオン線等Ｅこよる所要のパターンの露光をなさしめ、
層３及び４の露光された領域を層３の露光されざる領域
３ａｌこ比しアルカリ溶液でなる現像液１こ対して高い
不溶解性を有する領域１として得、続いてアルカリ溶液
でなる現像液を用いた現像処理をなして第４図１こ示す
如く領域γは残すも層３及び４の露光されざる領域３ａ
及び４ａを基体１上より除去し、斯くて領域Ｔを露光の
パターン１こ応じたパターンを有するフォトレジスト材
層５１こよるＰ型不純物を含有せる不純物含有層として
得る。[Next] As shown in FIG. 3, an inorganic photoresist material layer 51
On the other hand, from the layer 4 side, light, electron beam,
Expose the desired pattern using an ion beam, etc.
The exposed areas of layers 3 and 4 are compared with the unexposed area 3al of layer 3 to obtain a region 1 which is highly insoluble in a developer solution consisting of an alkaline solution, followed by a developer solution consisting of an alkaline solution. As shown in FIG.
and 4a are removed from the substrate 1, and thus the region T is obtained as an impurity-containing layer containing P-type impurities by the photoresist material layer 51 having a pattern corresponding to the exposure pattern 1.
次１こ基体１上に第５図１こ示す如く領域１従って不純
物含有層を覆って例えばＳ １０２ 、Ｓ Ｉｓ Ｎ４
等の絶縁材、Ｔｉ、Ｐｔ等の金属でなる耐熱性被覆層８
をそれ自体は公知の種々の方法１こよって形成する。Next, on the substrate 1, as shown in FIG.
A heat-resistant coating layer 8 made of an insulating material such as Ti, a metal such as Pt, etc.
are formed by various methods known per se.
次１こ熱処理をなし基体１の不純物含有層γ下の領域に
第６図に示す如く不純物含有層１よりのＰ型不純物の熱
拡散されてなるＰ型半導体領域９を形成し、次１こ必要
１こ応じて第γ図ｆこ示す如く被覆層８及び不純物含有
層１を基体１上より除去し、斯くてＮ型の半導体基体１
内］こその主面２側よりＰ型不純物の拡散されてなる半
導体領域９が形成されてなる構成を有する半導体装置を
得る。Next, a heat treatment is performed to form a P-type semiconductor region 9 in which the P-type impurity from the impurity-containing layer 1 is thermally diffused, as shown in FIG. If necessary, the covering layer 8 and the impurity-containing layer 1 are removed from the substrate 1 as shown in FIG.
A semiconductor device having a structure in which a semiconductor region 9 is formed by diffusing P-type impurities from the main surface 2 side is obtained.
尚第６図１こ示す如く１こ熱処理１こより半導体領域９
を形成する場合、被覆層８の材質１こよっては不純物含
有層γを構成させる材料が被覆層８内１こ全て溶は込む
か一部溶は込み不純物含有層１が全くなくなるか図示の
如く僅かしか残らないものとなるものであり、而して若
し不純物含有層γがなくなれば上述せる不純物含有層Ｉ
の除去は不必要なものである。As shown in FIG. 6, the semiconductor region 9 is heat-treated.
When forming the coating layer 8, the material 1 of the coating layer 8, and therefore the material constituting the impurity-containing layer γ, melts into the coating layer 8 completely or partially, and the impurity-containing layer 1 disappears completely, as shown in the figure. Only a small amount remains, and if the impurity-containing layer γ disappears, the above-mentioned impurity-containing layer I
The removal of is unnecessary.
以上１こて本発明の一例か明らかとなったが、本発明１
こよれば、半導体基体１の主面２上に、所要の導電型を
与える不純物を含むセレンを主成分とせる層３とその３
上１こ形成された銀又は銀を含む層４とよりなる無機フ
ォトレジスト材層５を形成し、次１こその無機フォトレ
ジスト材層５１こ対する所要のパターンの露光、続く現
像処理１こより無機フォトレジスト材層５１こよる露光
のパターン１こ応じたパターンを有する不純物含有層γ
を形成し、次１こ上記半導体基体１の主面２上に不純物
含有層７を覆って耐熱性被覆層８を形成し、次１こ熱処
理をなすということで、半導体基体１の不純物含有層γ
下の領域１こ不純物含有層１よりの不純物の拡散されて
なる半導体領域９を形成することが出来、従って半導体
領域９を簡単な少ない工程を以って得ることが出来、し
かもその半導体領域９は、基体１上１こ形成された無機
フォトレジスト材層５１こ対する露光、続く現像処理を
なして得られる不純物含有層γを半導体領域９を得る為
の不純物源として得られるので、無機フォトレジスト材
層５に対する露光のパターン１こ応じたパターンを以っ
て高精度１こ得ることが出来、又不純物含有層１を不純
物源として半導体基体１内１こ半導体領域９を形成する
場合、被覆層８を有するので、不純物含有層７を不必要
に昇華乃至蒸発させることなし１こ、且つ不純物含有層
γ１こ含まれる不純物が不必要１こ外部１こ拡散される
ことなしに効果的に基体Ｉ ＩＩＩ ｌこ拡散し、依っ
て半導体領域９を所期の不純物濃度を有するものとして
容易１こ得ることが出来、更に無機フォトレジスト材層
５がセレンを主成分とせる層３とその上１こ形成された
銀又は銀を含む層４とよりなること１こより、以下１こ
示す優れた特徴を有する。It has become clear that the first trowel is an example of the present invention, but the present invention 1
According to this, on the main surface 2 of the semiconductor substrate 1, a layer 3 mainly composed of selenium containing an impurity imparting a desired conductivity type is formed.
An inorganic photoresist material layer 5 consisting of silver or silver-containing layer 4 is formed on top, and then the inorganic photoresist material layer 51 is exposed to light in a desired pattern, followed by a development process. An impurity-containing layer γ having a pattern corresponding to the exposure pattern 1 of the photoresist material layer 51
A heat-resistant coating layer 8 is formed on the main surface 2 of the semiconductor substrate 1 to cover the impurity-containing layer 7, and then a heat treatment is performed. γ
The semiconductor region 9 can be formed by diffusing impurities from the impurity-containing layer 1 into the lower region 1, and therefore the semiconductor region 9 can be obtained with a simple and small number of steps. Since the impurity-containing layer γ obtained by exposing the inorganic photoresist material layer 51 formed once on the substrate 1 and subsequent development treatment can be obtained as an impurity source for obtaining the semiconductor region 9, the inorganic photoresist is High accuracy can be obtained by using a pattern corresponding to the exposure pattern 1 for the material layer 5, and when forming the semiconductor region 9 in the semiconductor substrate 1 using the impurity-containing layer 1 as an impurity source, the covering layer 8, the impurity-containing layer 7 is not unnecessarily sublimed or evaporated, and the impurities contained in the impurity-containing layer γ1 are not unnecessarily diffused to the outside of the substrate I. Therefore, the semiconductor region 9 can be easily obtained with the desired impurity concentration, and furthermore, the inorganic photoresist material layer 5 has a layer 3 mainly composed of selenium and a layer 3 above it. Due to the fact that it is composed of the formed silver or layer 4 containing silver, it has the following excellent characteristics.
（イ）レジスＩ−１こ添加する不純物元素の選択の自由
度が大きく、かつアモルファス材料であるがゆえ１こ、
レジスト材料の優れた特性を制約することなく、添加不
純物の成分濃度を大きな自由度で変えることができると
いう他１こ例のない優れた特徴を有するため、半導体基
体内への拡散不純物の濃度制御が容易である。(a) Resist I-1 has a large degree of freedom in selecting the impurity element to be added, and since it is an amorphous material,
It has an unprecedented feature of being able to change the concentration of added impurities with a large degree of freedom without restricting the excellent properties of the resist material, making it possible to control the concentration of diffused impurities within the semiconductor substrate. is easy.
（０）レジスト中への不純物元素の添加は、真空蒸着や
スパッタリング等の公知の方法１こより、容易１こ行う
ことができる。(0) Impurity elements can be easily added into the resist using one of the known methods such as vacuum evaporation and sputtering.
（／→ 高分子有機フォトレジストのよう１こ、分子の
大きさで分解能が限定されることがないので、原理的１
こは１００Å以下の高分解能であり、従って、解像度が
高い。(/→ Like polymeric organic photoresists, the resolution is not limited by the size of the molecules, so in principle
This has a high resolution of 100 Å or less, so the resolution is high.
に）現体処理工程１こおける溶液中での膨潤変形がない
ので、解像度が高い。ii) There is no swelling deformation in the solution during the first physical treatment step, so the resolution is high.
（ホ）耐酸性が強いので、エツチング処理工程を含むフ
ォトエツチング工程１こおいても、膜厚を薄くすること
かり能で、このため解像度の高いパターン形成が可能と
なる。(e) Since the film has strong acid resistance, it is possible to reduce the film thickness even in the first photo-etching process including the etching process, making it possible to form a pattern with high resolution.
（へ）半導体基体面上へのレジスト材層の塗布が、スパ
ッタリング等の乾式１程１こよりなされるため、膜厚の
均一性が良く、また、大面積で均一な膜厚で塗布するこ
とが可能となる。(f) Since the resist material layer is applied onto the semiconductor substrate surface by a dry process such as sputtering, the film thickness is highly uniform, and it is possible to coat a large area with a uniform film thickness. It becomes possible.
（ト）レジスト形成層の表面が非粘着性であるがゆえ１
こ、ゴミの付着が少なく、またパターン形成時１こおけ
るガラスマスクとの接着の心配がない。(G) Because the surface of the resist forming layer is non-adhesive, 1
In addition, there is little dust adhesion, and there is no need to worry about adhesion to the glass mask during pattern formation.
従ってフォト工程の歩留りが高いという利点を有する。Therefore, it has the advantage of high yield in the photo process.
尚上述１こ於ては本発明の一例を示した１こ留り、上述
せる「Ｎ型」を「Ｐ型」と読替えることも出来、又半導
体領域を半導体基体と同じ導電型に形成する様１こなす
ことも出来、又無機フォトレジスト材層１こ対する現像
処理をプラズマエツチング処理とすることも出来、その
側木発明の精神を脱することなし１こ種々の変型変更を
なし得るであろう。Note that the above-mentioned example shows only one example of the present invention, and the above-mentioned "N type" can also be read as "P type", and the semiconductor region may be formed to have the same conductivity type as the semiconductor substrate. 1, and the developing treatment for the inorganic photoresist material layer 1 can be plasma etching treatment, and various modifications and changes can be made without departing from the spirit of the invention. .
第１図〜第７図は本発明【こ似る半導体装置の製法の一
例を示す順次の工程１こ於ける路線的断面図である。
図中１は半導体基体、２は主面、３はセレンを主成分と
せる層、４は銀又は銀を含む層、５は無機フォトレジス
ト材層、γは領域、８は耐熱は被覆層、９は半導体領域
を夫々示す。FIGS. 1 to 7 are cross-sectional views of one sequential step showing an example of a method for manufacturing a semiconductor device similar to the present invention. In the figure, 1 is a semiconductor substrate, 2 is a main surface, 3 is a layer mainly composed of selenium, 4 is a layer containing silver or silver, 5 is an inorganic photoresist material layer, γ is a region, 8 is a heat-resistant coating layer, Reference numerals 9 indicate semiconductor regions, respectively.
Claims (1)
純物を含むセレンを主成分とせる第１の層と、該第１の
層上１こ形成された銀又は□を含む第２の層とよりなる
無機フォトレジスト材層を形成する工程と、 上記無機フォトレジスト材層１こ対する所要のパターン
の露光、続く現体処理１こより、上記無機フォトレジス
ト材層による、上記露光のパターンに応じたパターンを
有する不純物含有層を形成する工程と、 上記半導体基体の主面上１こ、上記不純物含有層を覆っ
て、耐熱性被膜層を形成する工程と、上記不純物含有層
を上記耐熱性被膜層で覆っている状態での熱処理１こよ
り、上記半導体基体の上記不純物含有層下の領域に、上
記不純物含有層よりの不純物の拡散されてなる半導体領
域を形成する工程とを含む事を特徴とする半導体装置の
製法。[Scope of Claims] 1. A first layer mainly composed of selenium containing an impurity that imparts a desired conductivity type, formed on the main surface of a semiconductor substrate, and a layer formed on the first layer of silver or A step of forming an inorganic photoresist material layer consisting of a second layer containing , a step of forming an impurity-containing layer having a pattern according to the exposure pattern; a step of forming a heat-resistant coating layer on the main surface of the semiconductor substrate, covering the impurity-containing layer; A step of forming a semiconductor region in which impurities from the impurity-containing layer are diffused in a region under the impurity-containing layer of the semiconductor substrate through heat treatment 1 while the containing layer is covered with the heat-resistant coating layer. A method for manufacturing a semiconductor device characterized by comprising the steps of:
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54103051A JPS5855654B2 (en) | 1979-08-13 | 1979-08-13 | Manufacturing method for semiconductor devices |
| US06/174,275 US4350541A (en) | 1979-08-13 | 1980-07-31 | Doping from a photoresist layer |
| FR8017774A FR2463509B1 (en) | 1979-08-13 | 1980-08-12 | PROCESS FOR MANUFACTURING SEMICONDUCTOR DEVICES AND DEVICES OBTAINED THEREBY |
| DE3030660A DE3030660C2 (en) | 1979-08-13 | 1980-08-13 | Method for the selective diffusion of a dopant into a semiconductor substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54103051A JPS5855654B2 (en) | 1979-08-13 | 1979-08-13 | Manufacturing method for semiconductor devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5626432A JPS5626432A (en) | 1981-03-14 |
| JPS5855654B2 true JPS5855654B2 (en) | 1983-12-10 |
Family
ID=14343865
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP54103051A Expired JPS5855654B2 (en) | 1979-08-13 | 1979-08-13 | Manufacturing method for semiconductor devices |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5855654B2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4934018A (en) * | 1972-07-31 | 1974-03-29 | ||
| JPS4952967A (en) * | 1972-09-25 | 1974-05-23 |
-
1979
- 1979-08-13 JP JP54103051A patent/JPS5855654B2/en not_active Expired
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4934018A (en) * | 1972-07-31 | 1974-03-29 | ||
| JPS4952967A (en) * | 1972-09-25 | 1974-05-23 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5626432A (en) | 1981-03-14 |
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