JPS5639650A - Code generating circuit - Google Patents
Code generating circuitInfo
- Publication number
- JPS5639650A JPS5639650A JP11480679A JP11480679A JPS5639650A JP S5639650 A JPS5639650 A JP S5639650A JP 11480679 A JP11480679 A JP 11480679A JP 11480679 A JP11480679 A JP 11480679A JP S5639650 A JPS5639650 A JP S5639650A
- Authority
- JP
- Japan
- Prior art keywords
- data
- bits
- input
- inputs
- same
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Detection And Correction Of Errors (AREA)
- Error Detection And Correction (AREA)
Abstract
PURPOSE:To equalize the output timing of data bits to that of a check bit, by providing ROM that remembers the same data bits as input data and its check bit at address positions assigned by the input data. CONSTITUTION:Code generator 5, composed of ROM, stores the same data bits as input data of address inputs A0-A3 and its parity bit at respective address positions assigned by the input data. As the data are inputted to inputs A0-A3 of generator 5 from input converter 1 via buffer 2, the contents of addresses assigned by the data are read out by strobe signal S. Consequently, the readout data consists of data supplied to inputs A0-A3 and an additional parity bit and all bits are outputted to bus 3a at the same timing by way of data outputs D00-DOP. Thus, supplying erroneous data to the data process can be prevented.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11480679A JPS5639650A (en) | 1979-09-06 | 1979-09-06 | Code generating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11480679A JPS5639650A (en) | 1979-09-06 | 1979-09-06 | Code generating circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5639650A true JPS5639650A (en) | 1981-04-15 |
Family
ID=14647148
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11480679A Pending JPS5639650A (en) | 1979-09-06 | 1979-09-06 | Code generating circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5639650A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5999837A (en) * | 1982-11-29 | 1984-06-08 | Mitsubishi Electric Corp | Decoder |
-
1979
- 1979-09-06 JP JP11480679A patent/JPS5639650A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5999837A (en) * | 1982-11-29 | 1984-06-08 | Mitsubishi Electric Corp | Decoder |
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