JPS5636164A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5636164A JPS5636164A JP11186879A JP11186879A JPS5636164A JP S5636164 A JPS5636164 A JP S5636164A JP 11186879 A JP11186879 A JP 11186879A JP 11186879 A JP11186879 A JP 11186879A JP S5636164 A JPS5636164 A JP S5636164A
- Authority
- JP
- Japan
- Prior art keywords
- recess
- manufacture
- impurity region
- film
- oxide film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
- H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
- H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
- H10D64/519—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their top-view geometrical layouts
Landscapes
- Electrodes Of Semiconductors (AREA)
Abstract
PURPOSE:To manufacture a high-reliability V-MOS or the like, by making a recess on a substrate and producing an electrode wiring layer on a prescribed insulating film on the recess. CONSTITUTION:An impurity region is produced on one main side of a semiconductor substrate 1. An oxide film 6' is used as a mask to perform aniotropic etching to make a recess 9. The impurity region is divided into two regions 3, 4. After that, the oxide film 6' overhanging the periphery of the recess 9 is removed. A thin foxide film 10 is coated on the surface of the recess 9 followed by the manufacturing of electrodes for a source, a drain and a gate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11186879A JPS5636164A (en) | 1979-08-31 | 1979-08-31 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11186879A JPS5636164A (en) | 1979-08-31 | 1979-08-31 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5636164A true JPS5636164A (en) | 1981-04-09 |
Family
ID=14572172
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11186879A Pending JPS5636164A (en) | 1979-08-31 | 1979-08-31 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5636164A (en) |
-
1979
- 1979-08-31 JP JP11186879A patent/JPS5636164A/en active Pending
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