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JPS5571058A - Substrate biasing circuit - Google Patents

Substrate biasing circuit

Info

Publication number
JPS5571058A
JPS5571058A JP14507478A JP14507478A JPS5571058A JP S5571058 A JPS5571058 A JP S5571058A JP 14507478 A JP14507478 A JP 14507478A JP 14507478 A JP14507478 A JP 14507478A JP S5571058 A JPS5571058 A JP S5571058A
Authority
JP
Japan
Prior art keywords
node
potential
output
diode
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14507478A
Other languages
Japanese (ja)
Other versions
JPS5951750B2 (en
Inventor
Seiji Emoto
Shigeki Nozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP53145074A priority Critical patent/JPS5951750B2/en
Publication of JPS5571058A publication Critical patent/JPS5571058A/en
Publication of JPS5951750B2 publication Critical patent/JPS5951750B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is DC
    • G05F3/10Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205Substrate bias-voltage generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Amplifiers (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To minimize voltage drop of a diode and thus to prevent electron injection by controlling a transistor provided in parallel with a diode to output a negative potential in a substrate biasing circuit in MOS IC. CONSTITUTION:Transistors Q1, Q2 are driven by an oscillator 1 to output to the first node N2 by way of a capacitor C1. Then, transistors Q6, Q7 are driven on external signals VA, VB to supply output opposite phase to the output to the first node N2 to the second node N3 by way of a capacitor C2. There are provided the first transistor Q3 conducting when the first node N2 is at high potential and clamping to a grounding potential and a diode D1 conducting when the first node N2 is at low potential and making the output bias negative in potential, and the second transistor Q4 controlled by potential of the second node N3 is connected to the diode D1 in parallel.
JP53145074A 1978-11-24 1978-11-24 Substrate bias generation circuit Expired JPS5951750B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53145074A JPS5951750B2 (en) 1978-11-24 1978-11-24 Substrate bias generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53145074A JPS5951750B2 (en) 1978-11-24 1978-11-24 Substrate bias generation circuit

Publications (2)

Publication Number Publication Date
JPS5571058A true JPS5571058A (en) 1980-05-28
JPS5951750B2 JPS5951750B2 (en) 1984-12-15

Family

ID=15376770

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53145074A Expired JPS5951750B2 (en) 1978-11-24 1978-11-24 Substrate bias generation circuit

Country Status (1)

Country Link
JP (1) JPS5951750B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4454431A (en) * 1980-03-11 1984-06-12 Siemens Aktiengesellschaft Semiconductor circuit with a circuit part controlled by a substrate bias
US5043597A (en) * 1989-06-19 1991-08-27 Kabushiki Kaisha Toshiba Substrate bias generation circuit used in semiconductor integrated circuit
US7307464B2 (en) * 2005-10-12 2007-12-11 Semiconductor Manufacturing International (Shanghai) Corporation System and method for switching between high voltage and low voltage

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4454431A (en) * 1980-03-11 1984-06-12 Siemens Aktiengesellschaft Semiconductor circuit with a circuit part controlled by a substrate bias
US5043597A (en) * 1989-06-19 1991-08-27 Kabushiki Kaisha Toshiba Substrate bias generation circuit used in semiconductor integrated circuit
US7307464B2 (en) * 2005-10-12 2007-12-11 Semiconductor Manufacturing International (Shanghai) Corporation System and method for switching between high voltage and low voltage

Also Published As

Publication number Publication date
JPS5951750B2 (en) 1984-12-15

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