JPS5544771A - Manufacture of semiconductor - Google Patents
Manufacture of semiconductorInfo
- Publication number
- JPS5544771A JPS5544771A JP11848978A JP11848978A JPS5544771A JP S5544771 A JPS5544771 A JP S5544771A JP 11848978 A JP11848978 A JP 11848978A JP 11848978 A JP11848978 A JP 11848978A JP S5544771 A JPS5544771 A JP S5544771A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- growth
- layer
- polycrystalline
- monocrystalline
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
- H10D30/0278—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline channels on wafers after forming insulating device isolations
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
PURPOSE: To simultaneously form high-quality vapour phase growth layers on an Si monocrystalline substrate in special condition by forming insulating layer at a portion for polycrystalline growth of the substrate.
CONSTITUTION: SiO2-layer 22 is formed at a portion for the growth of the polycrystalline layer of Si monocrystalline substrate 21. Simultaneous vapour phase growth is made of monocrystalline epitaxial layer 23 and polycrystalline epitaxial layer 24 on the substrate 21 by spplying the monosilane diluted by carrier gas at a higher rate than the values forming a straight line interconnecting the crystal temperature v. crystal growth speed characteristic points of 0.50 and 1.25μm/min. at 950 and 1,100°C respectively with the supply rate of monosilane as parameter while keeping the substrate 21 at 950W1,100°C. No polycrystalline Si grows or many defects occur to the monocrystalline Si-layer if growth temperature comes above 1,100°C and below 950°C.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11848978A JPS5544771A (en) | 1978-09-26 | 1978-09-26 | Manufacture of semiconductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11848978A JPS5544771A (en) | 1978-09-26 | 1978-09-26 | Manufacture of semiconductor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5544771A true JPS5544771A (en) | 1980-03-29 |
Family
ID=14737932
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11848978A Pending JPS5544771A (en) | 1978-09-26 | 1978-09-26 | Manufacture of semiconductor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5544771A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4919028A (en) * | 1972-06-12 | 1974-02-20 |
-
1978
- 1978-09-26 JP JP11848978A patent/JPS5544771A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4919028A (en) * | 1972-06-12 | 1974-02-20 |
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