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JPH01251748A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPH01251748A
JPH01251748A JP7884988A JP7884988A JPH01251748A JP H01251748 A JPH01251748 A JP H01251748A JP 7884988 A JP7884988 A JP 7884988A JP 7884988 A JP7884988 A JP 7884988A JP H01251748 A JPH01251748 A JP H01251748A
Authority
JP
Japan
Prior art keywords
mounting part
lead frame
mounting
semiconductor device
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7884988A
Other languages
Japanese (ja)
Inventor
Mitsuharu Kobayashi
光春 小林
Masaaki Minagawa
正明 皆川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toppan Inc
Original Assignee
Toppan Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toppan Printing Co Ltd filed Critical Toppan Printing Co Ltd
Priority to JP7884988A priority Critical patent/JPH01251748A/en
Publication of JPH01251748A publication Critical patent/JPH01251748A/en
Pending legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To make a mounting part nearly completely flat irrespective of a size of the mounting part of a lead frame by a method wherein the mounting part has more than one narrow groove extended in the direction nearly perpendicular to the initial curvature direction on its rear and a curvature of the mounting part is corrected as required. CONSTITUTION:In a lead frame 1, a mounting part 3 for mounting a semiconductor chip is formed in the center; its both ends are supported individually by a metal sheet 2 via support leads 4. Two or more narrow grooves 15 in the direction nearly perpendicular to the width direction of a metal sheet 12 are made on the rear of the mounting part 13 over its whole width so as to be separated from each other. Then, the lead frame where the narrow grooves 15 have been made on the rear of the mounting part 13 is plated in a required part during a plating process; during a DP working operation, a curvature of the mounting part 13 is corrected completely by using a whole-face punching metal mold. As a result, it is possible to obtain the lead frame, for semiconductor device use, where the surface of the mounting part 13 for mounting the semiconductor chip is nearly completely flat.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は半導体チップ載置部の平坦度のすぐれた半導体
装置用リードフレームに関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a lead frame for a semiconductor device in which a semiconductor chip mounting portion has excellent flatness.

(従来の技術) 半導体装置、例えばIC、LS I等の半導体チップを
リードフレームの載置部表面に載置する場合、載置部表
面に反りがあると、半導体チップとの接着不良を起す原
因となる。そのため載置部表面は可能な限シ平坦でなけ
ればならない。特に、LSI等の半導体素子の高集積化
に伴うチップサイズの大型化、及びこれにともなうリー
ドフレームの載置部の大型化により、載置部の平坦性は
ますます重要となっている。第2図および第3図は半導
体装置用リードフレームと、その載置部の反りを例示す
るものであって、各リードフレームlは図示の如く一定
幅の長尺の金属シート2に連続的に形成される。このリ
ードフレーム2は中央に半導体チップを載置するための
載置部3があって、その両端がそれぞれ支持リード4を
介して金属シ−ト2に支持されている。また、載置部3
の両側にも多数の外部リード5が形成されている。とこ
ろで、との載置部3は第3図に示す如く一般に金属シー
ト2の幅方向に大きな反り”a”が形成され易い。
(Prior art) When placing a semiconductor device, such as a semiconductor chip such as an IC or LSI, on the surface of a mounting portion of a lead frame, if the surface of the mounting portion is warped, it may cause poor adhesion to the semiconductor chip. becomes. Therefore, the surface of the receiver must be as flat as possible. In particular, the flatness of the mounting part is becoming more and more important as the chip size increases with the high integration of semiconductor devices such as LSIs and the lead frame mounting part becomes larger accordingly. FIGS. 2 and 3 illustrate lead frames for semiconductor devices and the warping of their mounting parts. Each lead frame l is continuously attached to a long metal sheet 2 of a constant width as shown in the figure. It is formed. This lead frame 2 has a mounting section 3 in the center for mounting a semiconductor chip, and both ends of the mounting section 3 are supported by the metal sheet 2 via support leads 4, respectively. In addition, the mounting section 3
A large number of external leads 5 are also formed on both sides. By the way, as shown in FIG. 3, the mounting portion 3 of the metal sheet 2 generally tends to have a large warpage "a" in the width direction of the metal sheet 2.

このリードフレームの載置部の反りの原因はリードフレ
ーム材料自体にもともと備っていたもの、又はメツキ工
程等の後の処理工程で発生する場合が考えられる。
The cause of the warping of the mounting portion of the lead frame may be something that is originally present in the lead frame material itself, or may occur during a subsequent processing step such as a plating step.

そのため、従来、このリードフレームの載置部の反りを
防止又は矯正する手段として、メツキ時、即ちリードフ
レームにマスクを押し当てて部分メツキをおこなう際の
マスクへのプレス圧力をできるだけ小さくすること、又
は載置部支持リードに対する曲げ加工(以下、DP加工
と呼ぶ)を載置部全面打ち金型(即ち、載置部全面に均
等なプレス圧が加かるもの)を使用する方法などが考え
られているが、載置部の寸法が大きい場合には反ルを充
分に防止、矯正することができない。
Therefore, conventionally, as a means to prevent or correct the warpage of the mounting portion of the lead frame, it is necessary to reduce the press pressure on the mask as much as possible when plating, that is, when partial plating is performed by pressing the mask against the lead frame. Alternatively, the bending process (hereinafter referred to as DP processing) for the support lead of the support lead may be performed using a mold for stamping the entire surface of the support lead (i.e., one that applies even press pressure to the entire surface of the support lead). However, if the dimensions of the mounting portion are large, curling cannot be sufficiently prevented or corrected.

(発明が解決しようとする課題) し^がって、本発明はリードフレームの載置部の寸法の
大きさの如何を問わず、載置部のほぼ完全な平坦化を図
シ得る半導体装置用リードフレームを提供することを目
的とする。
(Problem to be Solved by the Invention) Therefore, the present invention provides a semiconductor device that can achieve almost complete flattening of the mounting portion of a lead frame, regardless of the size of the mounting portion. The purpose is to provide lead frames for

(課題を解決するための手段) 本発明は上記課題を解決するための手段として、半導体
チップを表面に載置するための載置部と、該載置部を支
持する載置部支持リードと、該載置部の周囲に配設され
た多数の外部リードとを具備してなる#P導体装置用リ
ードフレームにおいて、該載置部がその裏面に当初の反
夕方向とほぼ直交する方向に延びた1以上の細溝を有し
、必要に応じて、載置部全面打ち金型により載置部の反
りの矯正がなされていることを特徴とする半導体装置用
リードフレームを提供するものである。
(Means for Solving the Problems) As a means for solving the above problems, the present invention provides a mounting section for mounting a semiconductor chip on a surface, and a mounting section support lead for supporting the mounting section. , in a lead frame for a #P conductor device comprising a large number of external leads arranged around the mounting part, the mounting part is arranged on the back surface thereof in a direction substantially perpendicular to the original anti-reverse direction. The present invention provides a lead frame for a semiconductor device, which has one or more elongated narrow grooves, and, if necessary, the warpage of the mounting portion is corrected by a mold for stamping the entire surface of the mounting portion. be.

(実施例) 以下、本発明を図示の実施例を参照して説明する。(Example) Hereinafter, the present invention will be explained with reference to the illustrated embodiments.

第1図は本発明に係わる半導体装置用リードフレームを
その載置部を中心として示したものでありて、本図にお
いては載置部z3が裏面を上向きζこして示されている
。この載置部13は第2図の場合と同様に両端が1対の
支持リード14を介して金属シート12暴こ支持されて
いる。その他の構成についても従来のものと同様であシ
任意の構成をとシ得る。この載置部Z3の裏面にはその
全幅に亘って図示の如く、載置部13における当初の反
ル方向(即ち、金属シートZ2の幅方向)とほぼ直交す
る方向に向って複数の細溝I5が互いに離間して穿設さ
れている。この細溝I5の幅は一般iこ130〜220
μm1深さは一般に100〜170μmとすることが好
ましい。々お、細溝の本数については特に制限はないが
一般に5以上とすることが好ましい。
FIG. 1 shows a lead frame for a semiconductor device according to the present invention with its mounting portion as the center, and in this figure, the mounting portion z3 is shown with its back surface facing upward. This mounting portion 13 is supported at both ends by a metal sheet 12 via a pair of support leads 14, as in the case of FIG. The other configurations are the same as those of the conventional one, and any configuration can be used. As shown in the figure, a plurality of narrow grooves are formed on the back surface of the placing part Z3 in a direction substantially perpendicular to the original curling direction of the placing part 13 (i.e., the width direction of the metal sheet Z2) as shown in the figure. I5 are bored apart from each other. The width of this narrow groove I5 is generally 130 to 220 mm.
The μm1 depth is generally preferably 100 to 170 μm. Although there is no particular restriction on the number of narrow grooves, it is generally preferred that the number be 5 or more.

との載置部13の裏面への細f/1j15の形成方法と
しては特に制限はないが、載置部13および外部リード
等を形成するための金属シートのエツチング工程におい
て、これらと同時にエツチング(ハーフエツチング)す
ることが望ましい。
There is no particular restriction on the method of forming the thin f/1j 15 on the back surface of the mounting part 13, but in the process of etching the metal sheet for forming the mounting part 13, external leads, etc., etching ( half-etching) is desirable.

このようにして載置部13裏面に細815が形成された
リードフレームは次にメツキ工程で必要部1分へのメツ
キ処理が施されたのち、DP加工時に載置部I3全面打
ち金型を用いて載置部13の反りの完全な矯正がなさ才
し、その結果、半導体チップを装着すべき載置部13の
表面がはtヨ完全をこ平坦な半導体装置用リードフレー
ムが得られる。
The lead frame with the thin strips 815 formed on the back surface of the mounting part 13 is then plated in the required part in a plating process, and then a mold is used to punch the entire surface of the mounting part I3 during DP processing. As a result, a lead frame for a semiconductor device can be obtained in which the surface of the mounting portion 13 on which a semiconductor chip is to be mounted is completely flat.

実施例1 厚さ0.25mのリードフレーム用銅合金の長尺シート
に長で50B1巾IQ、51Bの載置部を有するリード
フレームの形成のためエツチング処理をおこなった。こ
のエツチング処理と同時にその載置部裏面に幅0.22
1B、深さ0.17111の細溝を間隔8族で7本、載
置部の幅方向、全幅に亘って形成した。このエツチング
処理の結果、得たリードフレームの載置部の反り1a”
(第2図参照)は18μm〜30μmであった。
Example 1 A long sheet of copper alloy for a lead frame having a thickness of 0.25 m was etched to form a lead frame having a length of 50B1 width IQ and a mounting portion of 51B. At the same time as this etching process, a width of 0.22
Seven narrow grooves of 1B and a depth of 0.17111 were formed with an interval of group 8 over the entire width in the width direction of the mounting section. As a result of this etching process, the mounting part of the lead frame obtained is warped 1a"
(See FIG. 2) was 18 μm to 30 μm.

ついで、リードプレーム表面の所要部分の金メツキをお
こなったのち、載置部全面打ち金型を用いて、支持リー
ドに対するDP加工をおこなった結果、載置部表面の反
り”a”はほとんど0であつた。
Next, after gold plating the required portions of the lead plate surface, we performed DP processing on the supporting leads using a mold for stamping the entire surface of the mounting section.As a result, the warpage "a" on the surface of the mounting section was almost zero. It was hot.

(発明の効果) 以上詳述した始く、本発明においては、牛導体装置リー
ドフレームの載置部裏面に当初の反り方向とほぼ直交す
る方向に細溝を形成し、ついで、載置部支持リードの曲
は加工と同時に載置部の反りの矯正がなされるから、載
置部の平坦度を著るしく向上させることが可能となった
。さらに本発明のリードフレームの製造においては載置
部裏面の細溝の形成を外部リード等のエツチング工程時
に同時におこなうものであるから、反り修正のための別
工程を必要とせず、したがって製造上も有利となる。
(Effects of the Invention) As described in detail above, in the present invention, a narrow groove is formed on the back surface of the placing part of the lead frame of the conductor device in a direction substantially perpendicular to the original warping direction, and then, the placing part is supported. Since the bending of the lead is corrected at the same time as the warping of the placing part, it has become possible to significantly improve the flatness of the placing part. Furthermore, in the manufacture of the lead frame of the present invention, the formation of the narrow grooves on the back surface of the mounting part is carried out at the same time as the etching process of the external leads, etc., so there is no need for a separate process for correcting warpage, and therefore there is no need for a separate process for warping, and therefore there is no need for manufacturing. It will be advantageous.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に係わる牛導体装置用リードフレームの
斜視図、第2図はリードフレームを形成した金属シート
の平面図、第3図はリードフレームの反りを説明するた
めの第2図の[1−m線に沿う断面図である。 図中、!・・・リードフレーム、2・・・金属シート、
3・・・載置′部、4・・・支持リード、5・・・外部
リード、12・・・金属シート、I3・・・載置部、1
4・・・支持リード、15・・・細綽。 出願人代理人 弁理士  鈴 江 武 彦図面の浄書(
内容に変更なし) 第1図 手続補正書 昭和615゜月9日 特許庁長官 小 川 邦 夫 殿 1、事件の表示 特願昭63−78849号 2、発明の名称 半導体装置用リードフレーム 3、補正をする者 事件との関係 特許出願人 (319)凸版印刷株式会社 4、代理人 東京都千代田区霞が関3丁目7番2号1jBEピル〒1
()G  電話03(502> 3181 (大代表)
S、補正の対象 明細書全文、図面 7、補正の内容
Fig. 1 is a perspective view of a lead frame for a conductor device according to the present invention, Fig. 2 is a plan view of a metal sheet forming the lead frame, and Fig. 3 is a view of Fig. 2 for explaining warping of the lead frame. [It is a cross-sectional view along the 1-m line. In the diagram! ...Lead frame, 2...Metal sheet,
3... Placement part, 4... Support lead, 5... External lead, 12... Metal sheet, I3... Placement part, 1
4...Support lead, 15...Harrow. Applicant's agent Patent attorney Takehiko Suzue Engraving of drawings (
(No change in content) Figure 1 Procedural amendment dated September 9, 1986 Kunio Ogawa, Commissioner of the Patent Office 1, Indication of case Patent application No. 1988-78849 2, Title of invention Lead frame for semiconductor device 3, Amendment Patent applicant (319) Toppan Printing Co., Ltd. 4, Agent 3-7-2 Kasumigaseki, Chiyoda-ku, Tokyo 1j BE Pill 〒1
()G Telephone 03 (502> 3181 (Main)
S. Full text of the specification subject to amendment, Drawing 7, Contents of amendment

Claims (2)

【特許請求の範囲】[Claims] (1)半導体チップを表面に載置するための載置部と、
該載置部を支持する載置部支持リードと、該載置部の周
囲に配設された多数の外部リードとを具備してなる半導
体装置用リードフレームにおいて、該載置部がその裏面
に当初の反り方向とほぼ直交する方向に延びた1以上の
細溝を有し、載置部全面打ち金型により載置部の反りの
矯正がなされていることを特徴とする半導体装置用リー
ドフレーム。
(1) A mounting section for mounting a semiconductor chip on the surface;
In a lead frame for a semiconductor device comprising a mounting part support lead supporting the mounting part and a large number of external leads arranged around the mounting part, the mounting part is located on the back surface of the lead frame. A lead frame for a semiconductor device, characterized in that the lead frame has one or more narrow grooves extending in a direction substantially perpendicular to the original direction of warpage, and the warpage of the mounting part is corrected by a mold for stamping the entire surface of the mounting part. .
(2)半導体チップを表面に載置するための載置部と、
該載置部を支持する載置部支持リードと、該載置部の周
囲に配設された多数の外部リードとを具備してなる半導
体装置用リードフレームにおいて、該載置部がその裏面
に当初の反り方向とほぼ直交する方向に延びた1以上の
細溝を有する半導体装置用リードフレーム。
(2) a mounting section for mounting the semiconductor chip on the surface;
In a lead frame for a semiconductor device comprising a mounting part support lead supporting the mounting part and a large number of external leads arranged around the mounting part, the mounting part is located on the back surface of the lead frame. A lead frame for a semiconductor device having one or more narrow grooves extending in a direction substantially perpendicular to an original warping direction.
JP7884988A 1988-03-31 1988-03-31 Lead frame for semiconductor device Pending JPH01251748A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7884988A JPH01251748A (en) 1988-03-31 1988-03-31 Lead frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7884988A JPH01251748A (en) 1988-03-31 1988-03-31 Lead frame for semiconductor device

Publications (1)

Publication Number Publication Date
JPH01251748A true JPH01251748A (en) 1989-10-06

Family

ID=13673274

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7884988A Pending JPH01251748A (en) 1988-03-31 1988-03-31 Lead frame for semiconductor device

Country Status (1)

Country Link
JP (1) JPH01251748A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5397915A (en) * 1991-02-12 1995-03-14 Matsushita Electronics Corporation Semiconductor element mounting die pad including a plurality of extending portions
US5497032A (en) * 1993-03-17 1996-03-05 Fujitsu Limited Semiconductor device and lead frame therefore
US5920116A (en) * 1995-12-01 1999-07-06 Texas Instruments Incorporated Rigidized lead frame for a semiconductor device
US6303985B1 (en) * 1998-11-12 2001-10-16 Micron Technology, Inc. Semiconductor lead frame and package with stiffened mounting paddle

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58199548A (en) * 1982-05-17 1983-11-19 Hitachi Ltd lead frame

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58199548A (en) * 1982-05-17 1983-11-19 Hitachi Ltd lead frame

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5397915A (en) * 1991-02-12 1995-03-14 Matsushita Electronics Corporation Semiconductor element mounting die pad including a plurality of extending portions
US5497032A (en) * 1993-03-17 1996-03-05 Fujitsu Limited Semiconductor device and lead frame therefore
US5804468A (en) * 1993-03-17 1998-09-08 Fujitsu Limited Process for manufacturing a packaged semiconductor having a divided leadframe stage
US5920116A (en) * 1995-12-01 1999-07-06 Texas Instruments Incorporated Rigidized lead frame for a semiconductor device
US6303985B1 (en) * 1998-11-12 2001-10-16 Micron Technology, Inc. Semiconductor lead frame and package with stiffened mounting paddle

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