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JPH03187252A - Manufacture of lead frame - Google Patents

Manufacture of lead frame

Info

Publication number
JPH03187252A
JPH03187252A JP32679889A JP32679889A JPH03187252A JP H03187252 A JPH03187252 A JP H03187252A JP 32679889 A JP32679889 A JP 32679889A JP 32679889 A JP32679889 A JP 32679889A JP H03187252 A JPH03187252 A JP H03187252A
Authority
JP
Japan
Prior art keywords
lead
lead frame
etching
plate
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP32679889A
Other languages
Japanese (ja)
Inventor
Keiji Ueda
上田 恵二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP32679889A priority Critical patent/JPH03187252A/en
Publication of JPH03187252A publication Critical patent/JPH03187252A/en
Pending legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To make fine the lead pitch without sacrificing bondability by performing press work after isotropic etching thereby increasing the area of flat part of lead in a lead frame. CONSTITUTION:A board material 11 is subjected to isotropic etching and then the end part, i.e., the bonding area, of the entire lead frame or a lead 13 is pressed vertically in the direction of the thickness (t). Since the board material 11 deforms plastically through the press work, the thickness of board (t) decreases with the lead pitch P being maintained and the width W2 at the flat part of lead, i.e., the bonding area, can be increased. By such method, the lead frame can be made fine to cope with the increase of the number of pins and the miniaturization of a semiconductor device.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は、ワイヤボンドエリアとなるリード平坦面の面
積を増大できるリードフレームの製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application The present invention relates to a method for manufacturing a lead frame that can increase the area of a flat lead surface serving as a wire bond area.

(ロ)従来の技術 IC,LSI等の半導体装置の製造にはリードフレーム
が用いられる。リードフレームは1枚の板状材料を所望
形状に打抜き又はエツチング加工することで得られるが
、前記半導体装置の多機能高集積化に伴うリード本数の
増加と微細化の要求から、エツチング加工による製造が
着目されている。
(b) Prior Art Lead frames are used in the manufacture of semiconductor devices such as ICs and LSIs. A lead frame is obtained by punching or etching a sheet of plate-like material into a desired shape, but due to the increased number of leads and the demand for miniaturization due to the increased multi-functionality and high integration of semiconductor devices, manufacturing by etching has become necessary. is attracting attention.

エツチング加工は、先ず第2図Aに示すようにリードフ
レームとなる板状材料〈1)の両面にホトレジスト(2
〉を形成し、ホトレジスト(2〉をマスクとしてウェッ
トエツチング加工することにより第2図Bに示すような
断面形状に形成する。このエツチングは横方向へのエツ
チングが避けられない等方性であり、横方向へのエツチ
ングが無い異方性エツチングは量産性と価格の面からリ
ードフレームの製造には不向きである。
In the etching process, first, as shown in Figure 2A, photoresist (2
) is formed and wet-etched using the photoresist (2) as a mask to form a cross-sectional shape as shown in FIG. Anisotropic etching, which does not involve etching in the lateral direction, is unsuitable for manufacturing lead frames from the standpoint of mass production and cost.

(ハ)発明が解決しようとする課題 しかしながら、等方エツチングにより板状材料(1)を
エツチングするためには、膜厚方向へのエツチングと同
時にそれと同程度の横方向へのエツチングを考慮しなけ
ればならない、リードには、ワイヤボンドするために一
定幅(賀)以上の平坦部分が必要となるから、結局、リ
ードピッチ(P)の最小値は板状材料(1)の板厚(1
)によって左右されてしまい、その以上の微細化はボン
ダビリティを損うので困難である欠点があった。
(c) Problems to be Solved by the Invention However, in order to etch the plate-shaped material (1) by isotropic etching, it is necessary to consider etching in the lateral direction to the same degree as etching in the film thickness direction. In order to perform wire bonding, the lead must have a flat part of a certain width (K) or more, so the minimum value of the lead pitch (P) is determined by the thickness (1) of the plate material (1).
), and further miniaturization is difficult because it impairs bondability.

(ニ)課題を解決するための手段 本発明は上記従来の欠点に鑑み成されたもので、等方エ
ツチングにより板状材料(11)を加工した後、リード
フレーム全体又はリードのボンディングエリアとなる先
端部分を板厚方向に上下からプレス加工することにより
、ポンダビリティを損うことなくリードピッチ(P)の
微細化が可能なリードフレームの製造方法を提供するも
のである。
(d) Means for Solving the Problems The present invention was made in view of the above-mentioned conventional drawbacks, and after processing the plate-shaped material (11) by isotropic etching, the entire lead frame or lead bonding area is formed. The present invention provides a method for manufacturing a lead frame in which the lead pitch (P) can be made finer without impairing pondability by pressing the tip portion from above and below in the thickness direction.

(*)作用 本発明によれば、プレス加工することにより板状材料(
11)が塑性変形を起すので、リードピッチ(P)を保
ったままで板厚(1)が減少すると共に、ボンディング
エリアとなるリード平坦部の幅(臀、〉を増大できる。
(*) Effect According to the present invention, the plate material (
11) causes plastic deformation, the plate thickness (1) can be reduced while maintaining the lead pitch (P), and the width (buttock) of the lead flat portion, which becomes the bonding area, can be increased.

(へ)実施例 以下に本発明の一実施例を図面を参照しながら詳細に説
明する。
(F) Example An example of the present invention will be described below in detail with reference to the drawings.

第1図は本発明の製造方法を示す断面図である。リード
フレーム素材である板状材料〈11)は、ニッケルー鋼
合金や鉄系合金(42アロイ)等から成る板厚0.1〜
1.0關の圧延板であり、この板状材料(11)の両面
にホトレジストを利用して先ず第1図Aに示すようなレ
ジスト層(12〉を形成する。レジスト層は板状材料(
11)の表裏両面に同位置に配置する。
FIG. 1 is a sectional view showing the manufacturing method of the present invention. The plate material (11) that is the lead frame material is made of nickel-steel alloy, iron alloy (42 alloy), etc., and has a thickness of 0.1 to 1.
The plate material (11) is a rolled plate with a diameter of 1.0 mm, and a resist layer (12) as shown in FIG.
11) at the same position on both the front and back sides.

次いで第2図Bに示すように、レジスト層(12)をマ
スクとして板状材料(11)を両面からエツチングする
。板状材料(11)は両面から侵食されるので、エツチ
ングによる開孔が板厚(1)のほぼ中央まで達した時に
表裏両方からの開孔が連結して板状材料(11)がバタ
ーニングされる。工・7チングは等方モードであるから
、リードの断面形状は表裏両方にテーバが付いた形状(
図面参照)となる。
Next, as shown in FIG. 2B, the plate-shaped material (11) is etched from both sides using the resist layer (12) as a mask. The plate-shaped material (11) is eroded from both sides, so when the etched holes reach approximately the center of the plate thickness (1), the holes from both the front and back are connected and the plate-shaped material (11) becomes buttered. be done. Since the 7-ring is in isotropic mode, the cross-sectional shape of the lead is tapered on both the front and back (
(see drawing).

また、横方向へのエツチングが進行した分だけ、各リー
ドク13)の平坦部の幅(賀1)はレジスト層(12〉
の幅より減少する。
In addition, as the etching progresses in the lateral direction, the width of the flat portion of each resist layer (13) is increased by the width of the resist layer (12).
decreases from the width of

次いでレジスト層(12)を除去し、板状材料(11)
をエツチングすることにより得られたリードフレームを
、第1図Cに示すように上下から金型(14)によりプ
レス加工する。リードフレームは、チップ搭載用のアイ
ランドと、アイランドの周囲にその一端を近接して延在
する多数本のリード、そしてこれらを保持する枠体やタ
イバーとで構成されており、プレス加工はリードフレー
ムの全体又はアイランドに近接するリード先端部分を部
分的に加工する。リード先端部分だけを選択するのが困
難であればアイランドをも含めて加工すれば済む。
Next, the resist layer (12) is removed and the plate-shaped material (11) is removed.
The lead frame obtained by etching is pressed from above and below using a mold (14) as shown in FIG. 1C. A lead frame consists of an island for mounting a chip, a large number of leads that extend close to each other at one end around the island, and a frame and tie bars that hold them. Process the entire lead tip or a portion of the lead tip near the island. If it is difficult to select only the lead tip portion, it is sufficient to process the island as well.

前記プレス加工によってリードフレームのり−ド(13
〉は塑性変形を受け、第1図りに示すように板厚(t、
)がエツチング直後の板厚(t、)よりも薄くなる。と
同時に、リード(13)の平坦面の幅(W、〉はプレス
加工を受けることによりエツチング直後の幅(w、)よ
り増大する。従って、エツチング直後で幅(Wl)が狭
くても、プレス加工によってワイヤボンドエリアとして
活用できる幅(w、〉を確保できるので、リードピッチ
(P)を狭めることができる。
The lead frame glue (13
> undergoes plastic deformation, and as shown in the first diagram, the plate thickness (t,
) becomes thinner than the plate thickness (t, ) immediately after etching. At the same time, the width (W, 〉) of the flat surface of the lead (13) becomes larger than the width (w,) immediately after etching due to press processing. Therefore, even if the width (Wl) is narrow immediately after etching, Since the width (w, 〉) that can be used as a wire bond area can be secured through processing, the lead pitch (P) can be narrowed.

以上の工程が終了したリードフレームは、適宜銀めっき
等が処された後前記アイランドに半導体チップが搭載さ
れ、チップの電極と上記プレス加工されたり一層(13
〉先端部分とをワイヤでポールボンディングが成され、
プラスチックモールドされて製品化される。
After the above steps have been completed, the lead frame is subjected to appropriate silver plating, etc., and then a semiconductor chip is mounted on the island, and the electrodes of the chip and the above-mentioned press processing are applied.
〉Pole bonding is done with wire to the tip part,
The product is made into a plastic mold.

(ト)発明の効果 以上に説明した通り、本発明によれば、プレス加工を処
すことによってリード(13〉先端の平坦部の幅(w、
〉をワイヤボンドに要する面積まで増大できるので、リ
ードピッチ(P)を縮小することができる。従って、リ
ードフレームの一層の微細化が可能となり、半導体装置
のピン数増大、小型化に対応できる。
(G) Effects of the Invention As explained above, according to the present invention, the width of the flat part of the lead (13) (w,
) can be increased to the area required for wire bonding, so the lead pitch (P) can be reduced. Therefore, it is possible to further miniaturize the lead frame, and it is possible to cope with an increase in the number of pins and miniaturization of a semiconductor device.

【図面の簡単な説明】[Brief explanation of drawings]

第1図A〜第1図りは本発明を説明するための断面図、
第2図Aと第2図Bは従来例を説明するための断面図で
ある。
1A to 1 are cross-sectional views for explaining the present invention,
FIGS. 2A and 2B are sectional views for explaining a conventional example.

Claims (2)

【特許請求の範囲】[Claims] (1)板状材料を等方エッチングすることにより所望形
状のリードフレームを製造するリードフレームの製造方
法において、 前記等方エッチング後プレス加工を処すことにより前記
リードフレームのリードの平坦部の面積を増大させるこ
とを特徴とするリードフレームの製造方法。
(1) In a lead frame manufacturing method in which a lead frame of a desired shape is manufactured by isotropically etching a plate-shaped material, the area of the flat part of the lead of the lead frame is reduced by press working after the isotropic etching. A method for manufacturing a lead frame, characterized by increasing the lead frame.
(2)前記平坦部の面積を増大させるのは前記リードの
ワイヤボンドが成される先端部であることを特徴とする
請求項第1項に記載のリードフレームの製造方法。
(2) The method of manufacturing a lead frame according to claim 1, wherein the area of the flat portion is increased at a tip portion of the lead where a wire bond is formed.
JP32679889A 1989-12-15 1989-12-15 Manufacture of lead frame Pending JPH03187252A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32679889A JPH03187252A (en) 1989-12-15 1989-12-15 Manufacture of lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32679889A JPH03187252A (en) 1989-12-15 1989-12-15 Manufacture of lead frame

Publications (1)

Publication Number Publication Date
JPH03187252A true JPH03187252A (en) 1991-08-15

Family

ID=18191825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32679889A Pending JPH03187252A (en) 1989-12-15 1989-12-15 Manufacture of lead frame

Country Status (1)

Country Link
JP (1) JPH03187252A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05129493A (en) * 1991-11-05 1993-05-25 Hitachi Cable Ltd Manufacture of lead frame
JP2009302209A (en) * 2008-06-11 2009-12-24 Nec Electronics Corp Lead frame, semiconductor device, manufacturing method of lead frame, and manufacturing method of semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58182858A (en) * 1982-04-21 1983-10-25 Nec Corp Lead frame
JPS62144349A (en) * 1985-12-19 1987-06-27 Fujitsu Ltd Lead frame for semiconductor device and its manufacturing method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58182858A (en) * 1982-04-21 1983-10-25 Nec Corp Lead frame
JPS62144349A (en) * 1985-12-19 1987-06-27 Fujitsu Ltd Lead frame for semiconductor device and its manufacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05129493A (en) * 1991-11-05 1993-05-25 Hitachi Cable Ltd Manufacture of lead frame
JP2009302209A (en) * 2008-06-11 2009-12-24 Nec Electronics Corp Lead frame, semiconductor device, manufacturing method of lead frame, and manufacturing method of semiconductor device

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