JPH08316402A - Lead frame for semiconductor device - Google Patents

Abstract

PURPOSE: To prevent noble metal plating from being demaged by a protruding part generated on the periphery of a dimple by forming a recessed part on the surface of a pad which faces the dimple formed on the back of the pad. CONSTITUTION: A pad 3 is retained by support bars 4. Around a dimple 8 formed on the back of the pad 3, the excess metal forms a protruding part 10. The protruding part 10 is made to break into a recessed part 9 formed on the pad 3 of a lead frame placed on the lower stage. When deviation exists somewhat in the placement, the protruding part 10 developed on the periphery of the dimple 8 moves only in the interior of the recessed part 9, and does not exert adverse influence upon noble metal plating on the surface of the pad 3. Thereby, it can be prevented that the protruding part 10 formed in the formation of the dimple 8 damages the noble metal plating of the lead frame coming into contact with the back in the state of superposition.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame used for assembling a semiconductor device, and more particularly to a lead frame for a semiconductor device having a plurality of dimples on the back side of a pad on which a semiconductor chip is to be mounted.

[0002]

2. Description of the Related Art A lead frame used for a semiconductor device such as an LSI is, for example, as shown in FIG. 2, in a region surrounded by two side rails 1 and a partition frame 2 orthogonal thereto.
The pad 3, the support bar 4 for supporting the pad 3, the inner lead 5 for electrically connecting with the semiconductor chip, the tie bar 6 for connecting the inner lead 5 to each other, and the tie bar 6 extending from the inner lead 5 to electrically connect with an external electronic component The outer lead 7 is connected to.

By the way, as semiconductor devices have become more multifunctional and have larger capacities and the semiconductor chips have become larger, the area of the pads 3 in the lead frame used has tended to become larger, while the package size has become smaller. Is required, and as a result, the area occupied by the pad 3 with respect to the package size is increasing.

Since the coefficient of thermal expansion of, for example, 42 alloy used as the material of the lead frame and the coefficient of thermal expansion of the molding resin are different by about 4 to 6 times, a shift due to thermal expansion occurs at the end of the pad 3. However, the adhesiveness between the pad 3 and the mold resin is deteriorated, which causes problems such as generation of package cracks and deterioration of moisture resistance.

Therefore, as disclosed in JP-A-55-160449, a plurality of dimples 8 are provided on the back surface side of the pad 3.
It is known to use a lead frame formed with.

[0006]

When the dimples 8 are formed by press working, the dimple working punch 1 having a plurality of quadrangular pyramidal projections as shown in FIG.
A progressive die apparatus in which 1 is arranged in 1 station is used.

As described above, when the dimples 8 are formed by press working, as shown in FIG. 4, at the moment when the punch 11 bites into the back surface of the pad 3, the extra thickness in the dimples 8 is formed around the pad. Pushed up, dimple 8
The protrusions 10 are formed around the circumference of.

Usually, in a lead frame maker, Ag or Pd is attached to the tip of the inner lead 5 and the surface of the pad 3.
After plating precious metals such as, etc., and cutting it into several pieces as shown in Fig. 5, the product is inspected, multiple sheets are stacked and placed in a case, and shipped to a semiconductor manufacturer. As shown in FIG. 6, the protrusion 10 formed around the dimple 8 rubs against the surface of the pad 3 of the lead frame laminated thereunder, causing a problem of damaging the noble metal plating surface.

Although it is conceivable to crush the protrusion 10 around the dimple 8 by means such as coin processing, the crushed protrusion 10 escapes inside the dimple 8 and the depth and opening area of the dimple 8 are increased. However, the expected effect could not be obtained.

[0010]

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has been made for the purpose of preventing the noble metal plating from being damaged by the projections 10 formed around the dimples 8. The lead frame is characterized in that a recess 9 is provided on the surface of the pad 3 and at a portion facing the dimple 8.

Preferably, a recess 9 having an opening area larger than that of the dimple 8 is provided on the surface of the pad 3 facing the dimple 8, and more preferably, the opening area is larger than that of the dimple 8 and deep. A recess 9 having a depth smaller than that of the dimple 8 is provided.

[0012]

By providing the concave portion 9 on the surface of the pad 3 facing the dimple 8 provided on the back surface of the pad 3, the protrusion 1 generated around the dimple 8 along with the applying process of the dimple 8 is performed.
It is possible to prevent 0 from damaging the noble metal plating of the lead frame contacting the back surface in the laminated state.

Further, since the concave portion 9 on the surface of the pad 3 is opened larger than the dimple 8, even if the opening area is reduced due to the thickness of the noble metal plating applied to the pad 3, it is generated around the dimple 8. The dimple 8 can be sufficiently accommodated, and the depth of the recess 9 provided on the surface of the pad 3 is set to be shallower than the depth of the dimple 8 so that the dimple 8 has a sufficient depth. be able to.

[0014]

Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is an enlarged view showing a part of a pad 3 in a state in which a plurality of lead frames according to the present invention are laminated. The pad 3 is supported by a support bar 4 as shown in FIG. The extra thickness is raised around the dimples 8 provided on the back surface of the pad 3 and the protrusions 1
0 is formed, and the projection 10 thereof does not enter the recess 9 provided in the pad 3 of the lead frame laminated on the lower side thereof and contact the noble metal plating.

Even if there is some deviation in the stacked state, the protrusions 10 generated around the dimples 8 stay within the recesses 9 provided in the pads 3 of the lead frame below the dimples 8, and the pads 3 It does not adversely affect the precious metal plating on the surface of.

The recess 9 is easily formed on the surface of the pad 3 by pressing a desired portion with a punch for forming the recess 9 provided at one station of the progressive die apparatus after or before the dimple processing. be able to.

Further, the opening shape of the concave portion 9 provided on the surface of the pad 3 can be selected from various shapes such as a circle and a square, and can be changed by the shape of the punch in one station of the progressive die apparatus, and the shape of the dimple 8 can be selected. It can be dealt with as appropriate.

Further, the recess 9 provided on the surface of the pad 3
Does not need to be provided corresponding to all the dimples 8 in a region where the degree of noble metal plating is not required, such as a region where a semiconductor chip is not mounted, and the recess 9 and the dimple 8 are not provided at any place of the pad 3. You may communicate.

After forming the concave portion 9 on the surface of the pad 3,
For example, Ag is attached to the tip of the pad 3 and the inner lead.
Noble metal plating such as Pd and Pd is applied.

[0020]

As described in detail above, according to the lead frame of the present invention, the projections 10 formed around the dimples 8 in contact with the back surface in the laminated state are formed in the periphery thereof. It is possible to prevent the precious metal plating from being damaged.

Further, it is known that the pad 3 is warped due to the work of applying the dimples 8 by the press working. According to the invention of the present application, however, the front surface side of the pad 3 has the same working strain as the back surface side. As a result, the occurrence of warpage is offset and a lead frame with good dimensional accuracy without deformation can be obtained.

The residual strain remaining inside the pad 3 can be easily removed by annealing.

[Brief description of drawings]

FIG. 1 is a diagram showing a pad portion in a laminated state of lead frames according to the present invention.

FIG. 2 is a schematic view of the appearance of a lead frame.

FIG. 3 is a conceptual diagram of a main part of a punch for depressing.

FIG. 4 is a diagram showing a processed state of dimples.

FIG. 5 is a diagram showing a laminated state of lead frames cut into 5 piece units.

FIG. 6 is a diagram showing a pad portion in a laminated state of lead frames according to a conventional technique.

[Explanation of symbols]

 1 side rail 2 partition frame 3 pad 4 support bar 5 inner lead 6 tie bar 7 outer lead 8 ..Dimples 9 ... Recesses 10 ... Protrusions 11 ... Punches for dimple processing

Claims (3)

[Claims] 1. A lead frame for a semiconductor device having a plurality of dimples on a back surface side of a pad on which a semiconductor chip is mounted, wherein a recess is provided on a surface of the pad and a portion facing the dimple. Lead frame for semiconductor devices. 2. In a lead frame for a semiconductor device having a plurality of dimples on the back surface side of a pad on which a semiconductor chip is to be mounted, an opening area larger than that of the dimple is provided on the surface of the pad and facing the dimple. A lead frame for a semiconductor device, which is provided with a large recess. 3. A lead frame for a semiconductor device having a plurality of dimples on the back surface side of a pad on which a semiconductor chip is to be mounted, the opening area of which is larger than that of the dimple on the surface of the pad and facing the dimple. A lead frame for a semiconductor device, which is provided with a large concave portion having a depth smaller than that of the dimple.