JP5350448B2 - Power storage device control system and railway vehicle using the same - Google Patents

Abstract

The invention provides a highly reliable and inexpensive battery control system including several battery units bu1-6 connected in series and in parallel. Each unit bu1-6 has a battery b1-6 and a battery monitoring device m1-6 receiving power feed from the battery b1-6. A series of monitoring devices of battery units bu1-3 having batteries connected in series are connected via isolated series signal lines s12, s23 having separated potential levels. The monitoring devices of battery units bu3, bu6 having the same potential levels are connected via parallel signal lines p. An upper monitoring device ctl for outputting operation instructions to monitoring devices m1-6 and collecting data from monitoring devices m1-6 is connected via signal lines s01, s04 with monitoring devices m1, m4 of the respective series battery units bu1, bu4. Data may therefore be sent via signal line s01 and received via signal line s04 or vice versa. The monitoring devices may have several operation modes having different power consumption levels. The upper monitoring device ctl may feed power to the monitoring devices m1-m6. The system is suitable for powering railway vehicles.

Description

  The present invention relates to a power storage device control system in which a plurality of storage batteries are connected, and a railway vehicle using the same.

  Storage batteries that can be repeatedly charged and discharged are widely used as power supply devices.

  The amount of energy that can be stored appropriately and the appropriate charge / discharge current are determined for the storage battery. Handling beyond these changes the chemical properties and impairs performance. Therefore, it is necessary to appropriately adjust charging / discharging according to the state of the storage battery. For this reason, in the system using a storage battery, the monitoring apparatus which monitors states, such as a voltage of a storage battery, is provided.

  When a storage battery is used in a system with a large output scale, the storage batteries are connected in series and in parallel in order to increase the output capacity and energy capacity. In this case, for convenience of handling, a small series of parallel storage batteries may be used as one unit, and a relatively small monitoring device may be provided for each unit.

  If power is supplied from the storage battery to the monitoring device, it is not necessary to provide another power supply device. In this case, from the viewpoint of energy saving and preventing the storage battery from being discharged too much, the monitoring apparatus is provided with a power saving operation mode, and is switched to the power saving operation mode during system suspension.

  Patent Document 1 includes a main controller (hereinafter referred to as BC) and a plurality of cell monitoring IC chips (hereinafter referred to as CC) that are powered from a battery cell to be monitored, and a sequence (Wake-up) for the BC to start up a dormant CC. ), And a multi-series battery control system that can confirm that all CCs have started up is disclosed. This multi-series battery control system confirms that the CC startup sequence and all CCs have started up normally. It is disclosed that the communication line between the BC and CC for the battery requires an insulating means that can withstand the voltage of the multi-series battery.

JP 2005-318751 A

  When a power storage device is used as a power source of a railway vehicle composed of an inverter or a motor generally used in an electric railway vehicle, a required rated voltage reaches 1500 V corresponding to an overhead wire voltage.

  When the multi-series power storage control system of Patent Document 1 is applied to such a railway vehicle, high-voltage insulation means that can withstand 1500 V is required, which is expensive.

  An object of the present invention is to provide a highly reliable power storage device control system at low cost.

  In order to solve the above-mentioned problem, the present invention has a plurality of series power storage units in which a plurality of power storage units each having a storage battery and a monitoring device for monitoring the storage battery are electrically connected in series, and charging / discharging the storage battery A plurality of series storage units are electrically connected in parallel, the series storage units are connected in series between the storage batteries in the plurality of storage units, and the monitoring devices are insulated from each other. In the power storage device control system in which the low-voltage side monitoring devices of the plurality of serial power storage units are connected to the overall monitoring device via the communication lines, the monitoring device performs monitoring. When the power supply circuit that supplies power from the storage battery to the monitoring device is turned on / off and power is supplied from the power supply circuit of another monitoring device, the power supply circuit of the other monitoring device is turned on. The integrated monitoring device has a switch that is turned off when it is not received, the overall monitoring device turns on / off power supply to the switch of the monitoring device on the low voltage side of the series storage unit, and monitors the low voltage side of the other series storage unit Means for receiving a signal corresponding to the ON / OFF state of the power supply circuit from the device, and the power supply circuit for the monitoring device on the high voltage side of the series storage unit that receives power from the overall monitoring device to the switch of the monitoring device on the low voltage side Is connected to the switch of the monitoring device on the high voltage side of the other series storage unit so that power can be supplied, and the overall monitoring device switches the power supply on / off state to the switch of the monitoring device on the low voltage side of the series storage unit In addition, the overall monitoring device is configured to be able to receive a signal corresponding to the on / off state of the power supply circuit from the monitoring device on the low voltage side of the other series storage unit.

  Further, a railway vehicle that includes the above-described power storage device control system, a plurality of motors that drive the railway vehicle, and an inverter that drives the motor, and that charges and discharges power to the plurality of motors and the inverter by the power storage device control system. The above problems can be solved.

  A highly reliable power storage device control system can be provided at low cost.

It is a figure which shows the structure of Example 1 of the electrical storage apparatus control system which concerns on this invention. It is a figure which shows the motive power part of the railroad train using the electrical storage apparatus control system of Example 1. FIG. FIG. 3 is a diagram illustrating a configuration of a power storage unit according to the first embodiment. It is a figure which shows the wiring between the integrated monitoring apparatus and monitoring apparatus of Example 1. FIG. FIG. 3 is a diagram illustrating connection of signal lines in parallel according to the first embodiment. It is a figure which shows the format of the communication data of Example 1. FIG. It is a figure which shows the control information table which the microcomputer of Example 1 memorize | stores. FIG. 3 is a diagram illustrating a processing flow of the microcomputer according to the first embodiment. It is a figure which shows the processing flow of instruction | command "voltage data transmission" of the microcomputer of Example 1. FIG. FIG. 7 is a diagram illustrating a processing flow of an instruction “operation mode confirmation” of the microcomputer according to the first embodiment. It is a figure which shows the processing flow of instruction | command "power saving instruction | command" of the microcomputer of Example 1. FIG. It is a figure which shows the processing flow of the instruction | indication "response reply" of the microcomputer of Example 1. FIG. It is a figure which shows the mode of the signal at the time of the integrated monitoring apparatus of Example 1 acquiring the voltage data of a storage battery. It is a figure which shows the mode of the signal at the time of performing operation mode switching and confirmation of the monitoring apparatus of Example 1. FIG. It is a figure which shows the mode of the signal at the time of confirming the operation mode of the monitoring apparatus of Example 1. FIG. It is a figure which shows the mode of the signal at the time of confirming that the operation mode of the monitoring apparatus of Example 1 is on. It is a figure which shows the example of 1 structure of the monitoring apparatus of Example 2. FIG. It is a figure which shows the connection of the signal wire | line between the integrated monitoring apparatus and monitoring apparatus of Example 2. FIG. FIG. 10 is a diagram illustrating connection of parallel signal lines according to the second embodiment. It is a figure which shows the mode of the signal at the time of performing operation mode switching and confirmation of the monitoring apparatus of Example 2. FIG. It is a figure which shows the structure of the monitoring apparatus of Example 3. FIG. It is a figure which shows the connection of the signal wire | line between the integrated monitoring apparatus and monitoring apparatus of Example 3. FIG. It is a figure which shows the connection of the signal line between parallel of Example 3. FIG. It is a figure which shows the mode of the signal at the time of performing operation mode switching and confirmation of the monitoring apparatus of Example 3. FIG. It is a figure which shows the mode of the signal at the time of performing operation mode switching and confirmation of the monitoring apparatus of Example 1. FIG.

  A feature of the present invention is that it has a plurality of power storage units bs1 and bs2 in which a plurality of power storage units bu1 having a storage battery b1 and a monitoring device fed from the storage battery b1 are connected in series. Connected to a monitoring device for one storage unit, and has a general monitoring device ctl for controlling charging / discharging of the storage battery, the plurality of series storage units bs1, bs2 are connected in parallel, and the plurality of series storage units bs1, bs2 The storage batteries in the storage units are connected in series, and the monitoring devices are connected by the serial signal lines s12, s23, s45, s56, and one end of the first series storage unit of the plurality of series storage units. The monitoring device m3 is connected to the monitoring device m6 at one end of the last series storage unit in series by a parallel signal line p, and the first series storage unit is connected. The other end monitoring device m1 is connected to the overall monitoring device by the first signal line s01, and the other end monitoring device of the last series storage unit is connected to the overall monitoring device by the second signal line s04. A power storage device control system and a railway vehicle equipped with the same.

  Embodiments will be described below with reference to the drawings.

  FIG. 2 shows an embodiment of the power storage device control system of the present invention. The power storage device control system e is a railway vehicle power system.

  The power storage device control system e can charge and discharge electrical energy (electric power).

  The load ld includes an inverter having a rated DC voltage of 1500 V widely used in railway electric vehicles, a plurality of motors, and wheel axles. The power storage device control system e can control charging and discharging of power to the inverter and the plurality of motors. When 1500 V DC power is applied from the power storage device control system e to the inverter, the motor rotates to accelerate the vehicle. Further, 1500 V DC power is applied from the inverter to the power storage device control system e by a regenerative brake that operates the motor as a generator and converts the kinetic energy of the vehicle into electric energy.

  The power storage device control system e consumes energy even within itself. For this reason, in order to save energy when the vehicle is not moved for a long period of time, a power saving operation mode is provided.

  Note that the present invention can be implemented even in a configuration in which the vehicle is provided with a moving wheel that moves with another power source, or energy can be supplied to the load ld from another power source.

  FIG. 1 is a diagram showing an embodiment of a power storage device control system e of the present invention.

  The power storage device control system e has a plurality of series power storage units (two series power storage units bs1, bs2) in which a plurality of power storage units each having a storage battery and a monitoring device fed from the storage battery are connected in series, and is comprehensively monitored. It has a device ctl.

  The overall monitoring device ctl includes a signal line s01 (first signal line) between the series storage unit bs1 and a signal line s04 (second signal line) between the series storage unit bs2. Further, the series storage unit bs1 and the series storage unit bs2 are connected to each other by the parallel signal line p. The rated voltage of the power storage device is 1500 V, which is the same as the operating voltage of the load ld.

  The series storage unit bs1 is a series storage unit in which storage units bu1 to bu3 having a rated voltage of 500V are electrically connected in series. Further, an inter-series signal line s12 that is a signal line is provided between the power storage unit bu1 and the power storage unit bu2, and an inter-series signal line s23 is provided between the power storage unit bu2 and the power storage unit bu3. The series storage unit bs2 is a series storage unit in which storage units bu4 to bu6 having a rated voltage of 500V are electrically connected in series. Further, an inter-series signal line s45 is provided between the power storage unit bu4 and the power storage unit bu5, and an inter-series signal line s56 is provided between the power storage unit bu5 and the power storage unit bu6.

  The power storage unit bu1 includes a storage battery b1 and a monitoring device m1.

  The storage battery b1 is a battery in which a number of chargeable / dischargeable cells having a rated voltage of V are serially connected in parallel until the rated voltage reaches 500V. The storage batteries b2 to b6 are the same as the storage battery b1. The storage batteries b1 and b4 are grounded to zero potential.

The monitoring device m1 is a device that receives power from the storage battery b1 and detects the voltage of the storage battery b1.
The monitoring device m1 has a plurality of operation modes. In this embodiment, a case where there are two operation modes will be described. One is an operation mode (on) in which energy of the storage battery b1 is consumed by an amount sufficient to enable a monitoring function such as detection and processing of the voltage of the storage battery b1. The other is an operation mode (off) in which the monitoring function is disabled and the energy of the storage battery b1 is hardly consumed. That is, these two operation modes are modes in which the power consumption of the monitoring device is different. This operation mode is detected by the overall monitoring device ctl.

  The monitoring devices m2 to m6 are the same as the monitoring device m1.

  The monitoring device m1 and the monitoring device m2 are connected by an inter-series signal line s12. The inter-series signal line s12 is insulated by the isolating means iso2 that can withstand the rated voltage 500V of the storage batteries b1 to b6 in the monitoring device m2. The monitoring device m2 and the monitoring device m3 are connected by a serial signal line s23. The inter-series signal line s23 is insulated by an insulating means iso3 that can withstand a rated voltage of 500 V in the monitoring device m3. Thus, the monitoring devices m1 to m3 are divided into the potential levels of the storage batteries b1 to b3, respectively. Specifically, the monitoring device m1 is based on a potential of 0V, the monitoring device m2 is 500V, and the monitoring device m3 is based on a potential of 1000V.

  Similarly, the inter-series signal line s45 is insulated by the insulating means iso5 on the monitoring device m5, the inter-series signal line s56 is insulated by the insulating means iso6 on the monitoring device m6, and the monitoring devices m4 to m6 are respectively stored in the storage batteries b4 to b6. Divided into potential levels.

  The overall monitoring device ctl is a device that collects the voltages of the storage batteries b1 to b6 detected from the monitoring devices m1 to m6. The charge / discharge amount is adjusted based on the voltages of the storage batteries b1 to b6 so as to suppress charging when the voltage of the storage battery is too high, for example, in cooperation with the inverter of the load ld. The overall monitoring device ctl is connected to the monitoring device m1 and the signal line s01 through the monitoring device m4 and the signal line s04, and can communicate with the monitoring devices m1 to m6 via this. This communication is used for operation commands to the monitoring devices m1 to m6 in addition to collecting the voltages of the storage batteries b1 to b6. A feature of the present invention is that the overall monitoring device ctl transmits information from the signal line s01, and receives a response to the information from the signal line s04 through the inter-parallel signal line p. The specific state will be described later.

  Similar to the inter-series signal lines s12, s23, s45, s56, the signal line s01 is insulated by the insulating means iso1 on the monitoring device m1, and the signal line 04 is insulated by the insulating means iso4 on the monitoring device m4. However, the overall monitoring device ctl can be placed at the same potential level (zero potential) as the monitoring device m1 and the monitoring device m4. In that case, the insulating means iso1, iso4 are not essential. In the present embodiment, it is assumed that the monitoring devices m1 to m6 are configured in the same manner from the viewpoint of ease of manufacture and handling, and therefore these insulating means are provided.

  The monitoring device m3 and the monitoring device m6 at one end of the series power storage unit are connected by a parallel signal line p. The monitoring device m3 and the monitoring device m6 are in different series storage units bs1 and bs2, respectively, but the potential level is the same 1000 V reference. For this reason, the withstand voltage of 500 V as provided in the inter-series signal lines s12, s23, s45, and s56 is not required for the inter-parallel signal lines.

  In this embodiment, the number of storage batteries in series is set to 3. However, this does not limit the implementation of the present invention, and two series storage units have been described, but a plurality of storage batteries may be provided. When there are three or more series storage units, the monitoring device at one end of the first series storage unit and the monitoring device at the other end of the intermediate series storage unit are connected by a parallel signal line, and the intermediate series storage unit What is necessary is just to connect the monitoring apparatus of the one terminal of this to the monitoring apparatus of the other terminal of the last series electrical storage unit by the signal line in parallel.

  FIG. 3 is a configuration example of the power storage unit bu2.

  The monitoring device m2 includes a microcomputer (microcomputer cpu2), a communication circuit comu2, a communication circuit comd2, an insulating means iso2, and a power supply circuit pw2 having a switch sw2 for switching charge / discharge of the storage battery power, and a voltage sensor v2.

  In addition, although what is demonstrated hereafter is the structure of the monitoring apparatus m2, all the monitoring apparatuses m1-m6 are the same structures. That is, each of the monitoring devices m1 to m6 includes microcomputers cpu1 to cpu6, communication circuits comu1 to comu6, communication circuits comd1 to comd6, insulating means iso1 to iso6, power supply circuits pw1 to pw6, and voltage sensors v1 to v6.

  The insulating means iso2 is a means that insulates 500V equal to the rated voltage of the storage battery b1 and can transmit signals in both directions. In this embodiment, a photocoupler is assumed, but another insulating device may be used. In this embodiment, two photocouplers are arranged in opposite directions to realize bidirectional signal transmission. For this reason, power is supplied to the insulating means iso2 from both sides of the insulation.

  The voltage sensor v2 detects the voltage of the storage battery b2 and outputs it to the microcomputer cpu2.

  The power supply circuit pw2 has a switch sw2, and when the switch sw2 is on, the voltage of the storage battery b2 is converted in accordance with the operating voltage of the power supply destination device and output. Specifically, power is supplied to the microcomputer cpu2, the communication circuit comu2, and the photocoupler iso2. In addition, power is supplied to the communication circuit comd3 and the insulating means iso3 of the monitoring device m3 whose potential level is one step higher. When the switch sw2 is off, the power supply is stopped. That is, on and off of the switch sw2 correspond to the operation modes “on” and “off” of the monitoring device m2, respectively. The switch sw2 is turned on and off by applying a command signal from the outside.

  The microcomputer cpu2, which is a control circuit, operates by supplying power from the power supply circuit pw2, receives the output of the voltage sensor v2, and detects the voltage of the storage battery b2. In addition, communication data is transmitted and received through the communication circuits comu2 and comd2. For example, the detected voltage data is sent to the communication circuit comd2 for transmission to the overall monitoring device ctl. Further, the microcomputer cpu2 applies a command signal to the switch sw2, and can be switched on and off.

  The communication circuit comu2 operates by power supply from the power supply circuit pw2, and serves as an interface for the microcomputer cpu2 to transmit and receive data to and from the microcomputer cpu3 of the monitoring device m3 having a higher potential level.

  The communication circuit comd2 operates by supplying power from the power supply circuit pw1 of the monitoring device m1 whose potential level is one step lower, and the microcomputer cpu2 is connected to the microcomputer cpu1 of the monitoring device m1 whose potential level is one step lower via the insulating means iso2. It is an interface for sending and receiving data.

In the above description, there is no monitoring device whose potential level is one step lower than the monitoring devices m1 and m4. In this regard, the connection between the insulation means iso1 and the communication circuit comd1 of the monitoring device m1 and the connection between the insulation means iso4 and the communication circuit comd4 of the monitoring device m4 are shown in FIG.
Moreover, there is no monitoring device whose potential level is one step higher than the monitoring devices m3 and m6. In this regard, the connection of the communication circuit comu3 and the connection of the communication circuit comu6 are shown in FIG.

  FIG. 4 shows the connection between the insulating means iso1 and the communication circuit comd1 and the overall monitoring device ctl. In addition, the connection between the insulating means iso4 and the communication circuit comd4 and the overall monitoring device ctl is shown.

  The overall monitoring device ctl includes a power supply circuit sply, a microcomputer cpu0, and a communication circuit com0.

  The power feeding circuit sply feeds power to the insulating unit iso1 and the communication circuit comd1 of the monitoring device m1 and to the insulating unit iso4 and the communication circuit comd4 of the monitoring device m4.

  The microcomputer cpu0, which is a control circuit, can transmit and receive data to and from the microcomputer cpu1 using the communication circuit com0 as an interface. In addition, data can be transmitted to and received from the microcomputer cpu4 via the communication circuit comd4.

  The overall monitoring device ctl is supplied with power from an external power source different from the storage batteries b1 to b6.

  FIG. 5 shows an example of the connection between the communication circuit comu3 and the communication circuit comu6 as described above. The communication circuit comu3 and the communication circuit comu6 are connected by a parallel signal line p. The microcomputer cpu3 and the microcomputer cpu6 can communicate via the parallel signal line p.

  The power storage device control system e has the above configuration.

  Next, a processing procedure of the microcomputers cpu1 to cpu6 is shown.

  FIG. 6 shows a format of communication data transmitted and received by the microcomputers cpu1 to cpu6 via the communication circuits comd1 to comd6 and the communication circuits comu1 to comu6, respectively. The microcomputers cpu1 to cpu6 select a process according to the content of the received communication data. The microcomputer cpu0 also transmits / receives data in the same format via the communication circuit com0. In the following, it is assumed that addresses 0 to 6 are assigned to the microcomputers cpu0 to cpu6, and each microcomputer knows its own address. The address assignment can be realized by a method of setting a rotary switch on the overall monitoring device ctl and the monitoring devices m1 to m6.

  The communication data includes a destination part adr, a forward / reverse part ud, a command part cmd, and a data part dat.

  The destination portion adr describes to which microcomputer the data is addressed. For example, if the destination part adr is 3, the data is addressed to the microcomputer cpu3.

  The forward / reverse portion ud is a control that indicates which of the two communication circuits (the communication circuits comu1 to comu6 and the communication circuits comd1 to comd6) each of the monitoring devices m1 to m6 has received or should be transmitted to. Information is written.

  In the command portion cmd, a value indicating any one of “voltage data transmission”, “operation mode confirmation”, “power saving command”, and “response reply”, which is a processing pattern of each microcomputer, is described. A dummy value is set when no processing pattern is specified.

  In the data portion dat, data such as the voltage value of the storage battery is written as necessary. If unnecessary, it is omitted as appropriate.

  In this embodiment, the forward and reverse portions ud are provided in the communication data for use in controlling the direction when the microcomputers cpu0 to cpu6 transmit / receive data to / from each other, but there are two communication circuits (two in each of the monitoring devices m1 to m6). When the transmission source of the data is clear, such as clearly distinguishing the receiving boxes of the communication circuits comu1 to comu6 and the communication circuits comd1 to comd6), the transmission / reception direction is determined using the information instead of the forward / reverse part ud in the following description. Even if it controls, this invention can be implemented.

  FIG. 7 shows a storage table map in which the control information that the microcomputers cpu1 to cpu6 have in the storage device.

  Here, the address of the microcomputer located in the forward direction with respect to itself and a set of communication circuits that can send data to the microcomputer among the two communication circuits are shown. In addition, similar information is written in the reverse direction. Further, two types of waiting times (waiting time 1 and waiting time 2) used in the processing are described, which will be described later. In addition, U described in the column of the communication circuit represents the high potential side among the communication circuits included in the monitoring devices m1 to m6, that is, the communication circuits comu1 to comu6. D shown in the column of the communication circuit represents the low potential side of the communication circuits included in the monitoring devices m1 to m6, that is, the communication circuits comd1 to comd6.

  A method of referring to the storage table map will be described by taking the case of the microcomputer cpu3 as an example. Since the microcomputer cpu3 has its own address 3, it reads the corresponding row. For the forward direction, address 6 and communication circuit U are read. This is because the microcomputer cpu6 is positioned one forward of the microcomputer cpu3, and in order to transmit data to the microcomputer cpu6, the data is sent to the communication circuit on the high potential side of the monitoring device m3, that is, the communication circuit comu3. It means that it should be done. In the reverse direction, address 2 and communication circuit D are read.

  This is because the microcomputer cpu2 is positioned in the opposite direction to the microcomputer cpu3, and in order to transmit data to the microcomputer cpu2, the data is sent to the communication circuit on the low potential side of the monitoring device m3, that is, the communication circuit comd3. It means that it should be done. From the value of the waiting time 1, the waiting time used by the microcomputer cpu3 in the processing described below is tw13. From the value of the waiting time 2, the waiting time used by the microcomputer cpu3 in the processing described below. Is read as tw23.

  In the present embodiment, the forward direction of the data is a direction in which the microcomputer cpu0 → the microcomputer cpu1 → the microcomputer cpu2 → the microcomputer cpu3 → the microcomputer cpu6 → the microcomputer cpu5 → the microcomputer cpu4 → the microcomputer cpu0. The reverse direction is the opposite. The forward address and the backward address of the storage table map are set so as to correspond to them.

  FIG. 8 is a processing flow of the microcomputers cpu1 to cpu6. A series of processes from the start process f1 to the end process f8 is periodically repeated. In the following, the microcomputers cpu1 to cpu6 have a reception box and a transmission box, the reception data is automatically stored in the reception box separately from this processing flow, and the transmission processing sends out the data set in the transmission box. And

  Process f1 is the starting point of the periodic process. Move to processing f2.

  The process f2 is a process for checking whether there is data in the reception box. If there is data, go to process f3, and if not, go to process f8.

  The process f3 is a process of reading the destination part adr of the communication data and checking whether the communication data is addressed to itself. If it is addressed to itself, it moves to process f4, and if it is not addressed to itself, it moves to process f6.

  The process f4 is a process of reading a “forward direction” or “reverse direction” value written in the forward / reverse part ud of the communication data. Hereinafter, for convenience, an area for storing the read value is referred to as a variable d. Move to processing f5.

  The process f5 is a process for reading and executing the command part cmd of the communication data. In this embodiment, there are four commands of “voltage data transmission”, “operation mode confirmation”, “power saving command”, and “response reply”, and details will be described later. After this process is performed, the process proceeds to process f8.

  Process f6 is a process of setting the received communication data as it is in the transmission box. Move to processing f7.

  Process f7 is a transmission process. Send out the contents of the outbox. Which of the two communication circuits each monitoring device has is determined to be sent to the storage table map by the value of the forward / reverse portion ud of the communication data set in the transmission box. For example, if the microcomputer cpu3 sets communication data in which the forward / reverse part ud is “forward” in the transmission box, the column of the forward communication circuit is examined in the row of the address 3 of the storage table map, and the communication of the value U is performed. This is sent to the circuit, that is, the communication circuit comu3 on the high potential side. Move to processing f8.

  Process f8 is the end point of the periodic process. Return to the process f1 again in the next cycle.

  Next, a process flow of four instructions selected and executed in process f5 will be described.

  FIG. 9 is a processing flow of the command “voltage data transmission”. This command consists of processes fa1 to fa4.

  Process fa1 is the starting point of the process. Move to processing fa2.

  The process fa2 sets the destination part adr to 0 representing the microcomputer cpu0 of the overall monitoring device ctl, and sets the forward / reverse part ud in a direction different from the value of the variable d (if the variable d is forward, it is backward, and if the variable d is backward, forward In the direction), the command portion cmd is set to a dummy value, and the communication data created by setting the voltage value of the storage battery to the data portion dat is set in the transmission box. Note that the dummy value of the command portion cmd is a value for matching the format of communication data, and does not represent any of the four commands described above. Move to processing fa3.

  The process fa3 is a transmission process and is the same as the process f7. Move to processing fa4.

  The process fa4 is the end point of the process. The process f5 is exited.

  FIG. 10 is a processing flow of the instruction “operation mode confirmation”. This command consists of processing fb1 to processing fb8.

  The process fb1 is the starting point of the process. Move to processing fb2.

  The process fb2 stores the storage table map in the destination part adr, the destination address obtained by subtracting the address of the storage table map and the value of the variable d as a key, the forward / reverse part ud in the direction of the value of the variable d, and the instruction part cmd in the instruction “response reply”. Is a process for setting communication data (confirmation data) created by omitting the data portion dat to a transmission box. Move to processing fb3.

  The process fb3 is a transmission process and is the same as the process f7. Move to processing fb4.

  The process fb4 is a process that waits for the waiting time 2 drawn by the storage table map. During this period, the presence / absence of data in the inbox is periodically checked. If there is data, the process goes to process fb5. If the waiting time expires without data, the process goes to process fb6.

  The process fb5 sets the destination part adr to 0 representing the microcomputer cpu0, sets the forward / reverse part ud in a direction different from the value of the variable d, sets the instruction part cmd to the dummy value 0, and indicates that the operation mode is on for the data part dat. This is a process for setting communication data set in data indicating that it has been confirmed in a transmission box. Move to processing fb7.

  The process fb6 sets the destination part adr to 0 representing the microcomputer cpu0, sets the forward / reverse part ud in a direction different from the value of the variable d, sets the instruction part cmd to the dummy value 0, and sets the data part dat to be in the operation mode off. This is a process for setting communication data set in data indicating that it has been confirmed in a transmission box. Move to processing fb7.

  The process fb7 is a transmission process and is the same as the process f7. Move to processing fb8.

  The process fb8 is the end point of the process. The process f5 is exited.

  FIG. 11 is a processing flow of the instruction “power saving instruction”. This command consists of processing fc1 to processing fc14.

  The process fc1 is the starting point of the process. Move to processing fc2.

  The process fc2 is a process for checking whether the device itself is at the highest potential level among the monitoring devices m1 to m3 or the monitoring devices m4 to m6. That is, it checks whether its own address is 3 or 6. If the address is 3 or 6, the process proceeds to process fc13. Otherwise, the process proceeds to process fc3.

  The process fc3 stores the storage table map in the destination part adr as an address obtained by subtracting the address of itself and the value of the variable d as a key, the forward / reverse part ud in the direction of the value of the variable d, and the instruction part cmd as the instruction “power saving command”. Is a process of setting communication data created by omitting the data part dat to a transmission box. Move to processing fc4.

  The process fc4 is a transmission process and is the same as the process f7. Move to processing fc5.

  The process fc5 is a process of waiting for the waiting time 1 drawn by the storage table map. During this period, the presence / absence of data in the inbox is periodically checked. If there is data, the process proceeds to process fc6. If the waiting time expires without any data, the process proceeds to process fc8.

  A process fc6 is a process for setting the received data as it is in order to transfer the received data, and is the same as the process f6. Move to processing fc7.

  The process fc7 is a transmission process and is the same as the process f7. Control goes to process fc14.

  The process fc8 is a process for setting data in the transmission box, and is the same as the process fb2. Move to processing fc7.

  The process fc9 is a transmission process and is the same as the process f7. Move to processing fc8.

  The process fc10 is a process that waits for the waiting time 2 drawn by the storage table map. During this period, the presence / absence of data in the inbox is periodically checked. If there is data, the process proceeds to process fc11. If the waiting time expires without any data, the process proceeds to process fc13.

  The process fc11 cannot set the destination part adr to 0 representing the microcomputer cpu0, the forward / reverse part ud in a direction different from the value of the variable d, the instruction part cmd to the dummy value 0, and the operation mode to the data part dat cannot be turned off. This is a process for setting the communication data created by setting the data indicating the fact to the transmission box. Move to processing fc12.

  The process fc12 is a transmission process and is the same as the process f7. Control goes to process fc14.

  The process fc13 is a process for switching its own operation mode to off. For example, in the case of the monitoring device m1, a signal for switching the state off is applied to the switch sw1. Thereby, the power supply to the microcomputer itself is stopped, and the monitoring device is shifted to the power saving operation mode. That is, when the process fc12 is reached, the operation of the microcomputer stops here, and the process ends.

  The process fc14 is the end point of the process. The process f5 is exited.

  FIG. 12 is a processing flow of the command “response reply”. This command consists of processing fd1 to processing fd4.

  The process fd1 is the starting point of the process. Move to processing fd2.

  The process fd2 stores the storage table map in the destination part adr as an address obtained by pulling the direction different from its own address and the value of the variable d as a key, the forward / reverse part ud in a direction different from the value of the variable d, and the instruction part cmd as a dummy value. The communication data (response data) created by omitting the data part dat is set in the transmission box. Move to processing fd3.

  The process fd3 is a transmission process and is the same as the process f7. Move to processing fd4.

  The process fd4 is the end point of the process. The process f5 is exited.

  The above is the processing procedure of the microcomputers cpu1 to cpu6.

  The microcomputer cpu0 generates and transmits communication data corresponding to a desired operation requested to the monitoring devices m1 to m6. Further, the data portion dat of the received communication data is read out, the responses of the monitoring devices m1 to m6 are obtained, and used for control of the power storage device control system e.

  Next, a communication operation between the microcomputer cpu0 of the overall monitoring device ctl and the microcomputers cpu1 to cpu6 of the monitoring devices m1 to m6 will be described.

  First, the case where the microcomputer cpu0 acquires the storage battery voltage data will be described with reference to FIG.

  FIG. 13 shows a state of communication when the microcomputer cpu0 acquires voltage data of the storage battery b3.

  The horizontal axis is time, and the vertical axis is the position of communication data. The position of the communication circuit and the insulation means on the signal line between the microcomputers is also shown.

  The communication data req3 is a request for voltage data of the storage battery b3 addressed from the microcomputer cpu0 to the microcomputer cpu3. The destination portion adr of the communication data req3 is set to 3, the forward / reverse portion ud is set to the forward direction, and the command portion cmd is set to “voltage data transmission”.

  The communication data dat3 is voltage data of the storage battery b3 addressed from the microcomputer cpu3 to the microcomputer cpu0. The destination portion adr is set to 0, the forward / reverse portion ud is set in the reverse direction, the command portion cmd is set to a dummy value, and the voltage value of the storage battery b3 is written in the data portion dat.

  Time dly1 is a processing delay of the microcomputer cpu1, time dly2 is a processing delay of the microcomputer cpu2, and time dly3 is a processing delay of the microcomputer cpu3.

  First, at a certain time t0, the microcomputer cpu0 transmits a request req3 addressed to the microcomputer cpu3 to the microcomputer cpu1 via the communication circuit com0, the insulating means iso1, and the communication circuit comd1.

  The microcomputer cpu1 detects the request req3 that has entered the reception box in the process f2, and checks whether it is addressed to itself, that is, whether the destination part adr is 1 in the process f3. In this case, since the destination part adr is 3, the process proceeds to process f6, the request req3 is set in the transmission box, and the process is transmitted to the microcomputer cpu2 via the communication circuit comu1, the insulation means iso2, and the communication circuit comd2.

  Similarly to the microcomputer cpu1, the microcomputer cpu2 transfers the request req3 to the microcomputer cpu3.

  Next, since the destination part adr of the request req3 is addressed to itself, the microcomputer cpu3 shifts from the process f3 to the process f4 and the process f5, and reads the instruction part cmd. Since “voltage data transmission” is set in the command part cmd of the request req3, the processing shifts to the processing (processing fa1 to fa4) shown in FIG. In process fa2, the communication data dat3 describing the voltage value of the storage battery b3 is set in the transmission box, and in process fa3, it is transmitted to the microcomputer cpu2 to the communication circuit comd3 side.

  Next, the microcomputer cpu2 confirms that the communication data dat3 received from the microcomputer cpu3 in the process f2 is not addressed to itself, and transfers the communication data dat3 to the communication circuit comd2 toward the microcomputer cpu1 in the process f6 and the process f7.

  Next, the microcomputer cpu1 transmits the communication data dat3 to the microcomputer cpu0 to the communication circuit comd1 side in the same manner as the microcomputer cpu2.

  Finally, when the microcomputer cpu0 receives the communication data dat3 via the communication circuit com0, the microcomputer cpu0 reads the data portion dat and acquires the voltage data of the storage battery b3.

  The above is the procedure for the overall monitoring device ctl to acquire the voltage data of the storage battery b3. For example, when acquiring the voltage data of the storage battery b5, the destination part adr is 5, the forward / reverse part ud is the reverse direction, and the command part cmd is the dummy. The communication data set to the value may be sent to the signal line s04 side. The voltage data can be obtained in the same manner for each of the storage batteries b1 to b6.

  Next, an example of a method for confirming that the operation mode of the monitoring devices m1 to m6 is normally turned on will be described.

  FIG. 16 is a signal flow for the overall monitoring device ctl to confirm that the operation mode of the monitoring devices m1 to m6 is on. The horizontal axis represents time, and the vertical axis represents signal position, indicating what kind of signal is at a certain time.

  Times dly1 to dly6 are processing delays of the microcomputers cpu1 to cpu6, respectively.

  Time tw is the waiting time of the microcomputer cpu0.

  Initially, at time t1, the microcomputer cpu0 sends the communication data loop with the destination part set to 0 representing the microcomputer cpu0 itself, the forward / reverse part ud as the forward direction, and the command part cmd as the dummy value to the signal line s01 side.

  When the microcomputer cpu1 receives the communication data loop in the process f2, the microcomputer cpu1 checks the destination in the process f3. In this case, since it is not addressed to itself, the data received in the process f6 is set as it is in the transmission box, and is transmitted to the microcomputer cpu2 side in the process f7.

  Thereafter, the communication data loop is sequentially transferred in the order of the microcomputer cpu2, the microcomputer cpu3, the microcomputer cpu6, the microcomputer cpu5, and the microcomputer cpu4 along the forward direction, and finally delivered to the microcomputer cpu0 via the signal line s04.

  The microcomputer cpu0 checks whether or not the communication data loop is delivered during the time tw. If any of the monitoring devices m1 to m6 is off, the communication data loop does not return to the microcomputer cpu0. Using this, the microcomputer cpu0 determines that any of the monitoring devices m1 to m6 is off when the communication data loop does not return during the time tw. In this embodiment, since the communication data loop is delivered to the microcomputer cpu0, it is determined that all the monitoring devices m1 to m6 are on.

  Next, an example of operation mode control of the monitoring devices m1 to m6 will be described.

  FIG. 14 shows the flow of control signals until the overall monitoring device ctl switches the operation mode of the monitoring devices m4 to m6 from on to off and confirms switching.

  The horizontal axis represents time, and the vertical axis represents signal position, indicating what kind of signal is at a certain time. For each of the switches sw1, sw2, and sw3 shown on the vertical axis, two states of on and off are also shown. The transition of the switch state is indicated by a solid line.

  The communication data slp is data in which a “power saving command” is written in the command part cmd. The communication data cfm is data in which “response reply” is written in the command part cmd. Note that the address part adr and the forward / reverse part ud of these data are appropriately changed according to the transmission destination.

  Times dp4 to dp6 are state transition times of the switches sw4 to sw6, respectively.

  Times dly4 to dly6 are processing delays of the microcomputers cpu4 to cpu6, respectively.

  Times tw10 and tw20 are waiting times for the microcomputer cpu0. Time tw14 and time tw24 are waiting time 1 and waiting time 2 obtained by the microcomputer cpu4 pulling the storage table map, respectively. Time tw15 and time tw25 are waiting time 1 and waiting time 2 obtained by the microcomputer cpu5 pulling the storage table map, respectively.

  First, at a certain time ta0, the microcomputer cpu0 sends the data slp set to the microcomputer cpu4 to the signal line s04 side, the destination part adr is 4, the forward / reverse part ud is in the reverse direction, and the instruction part cmd is set to the “power saving command”. Send it out.

  Next, the microcomputer cpu4 receives the data slp and executes the process shown in FIG. 11 in the process f5. If it is confirmed in the process fc2 that its own address is not 3 or 6, the data obtained by rewriting the destination part adr of the data slp received in the processes fc3 and fc4 to 5 is transmitted to the microcomputer cpu5. Thereafter, the process proceeds to process fc5, and a predetermined time tw14 is waited for at time ta1.

  The microcomputer cpu5 that has received the data slp from the microcomputer cpu4 transmits data in which the destination part adr of the received data slp is rewritten to 6 in the same manner as the microcomputer cpu4, and waits for a fixed time tw15 at time ta2.

  Similarly, the microcomputer cpu6 receives the data slp from the microcomputer cpu5 and performs the processing of FIG. The microcomputer cpu6 confirms that it is at the highest potential level in the process fc2, and moves to the process fc13. In the process fc13, a signal for turning the state off is applied to the switch sw6. As a result, the state of the switch sw6 changes from on to off, and power supply to the microcomputer cpu6 is stopped at time ta3. The processing flow of the microcomputer cpu6 ends here.

  Next, at the time ta2 + tw15 after the microcomputer cpu6 stops, the microcomputer cpu5 expires the waiting time tw15 of the process fc5 and shifts to the process fc8, sets the destination part adr to 6, the forward / reverse part ud in the reverse direction, and the instruction part cmd. Is set in the transmission box, and is sent to the microcomputer cpu6 in process fc9. Thereafter, the process fc10 waits for time tw25.

  Since the monitoring device m6 has already been turned off at this time, the microcomputer cpu6 does not issue a response to the confirmation data cfm transmitted from the microcomputer cpu5. Therefore, the microcomputer cpu5 expires the waiting time tw25 without receiving a response from the microcomputer cpu6.

  When the microcomputer cpu5 confirms that there is no response from the microcomputer cpu6 during the waiting time tw25, the microcomputer cpu5 proceeds to the process fc13. In the process fc13, a signal for turning the state off is applied to the switch sw5 (time tas). As a result, the state of the switch sw5 changes from on to off, and power supply to the microcomputer cpu5 is stopped at time ta4. The processing flow of the microcomputer cpu5 ends here.

  Next, at time ta1 + tw14 after the stop of the microcomputer cpu5, the microcomputer cpu4 expires the waiting time tw14 of the process fc5 and shifts to the process fc8. Finish the flow.

  Finally, the microcomputer cpu0 shows an error that the operation mode of the monitoring device could not be turned off for a time tw10 sufficient to complete all the above from the time ta0 when the communication data was first sent to the microcomputer cpu4. Confirm that no data (data generated by one of the processes fc11 of the monitoring devices m4 to m6 at the time of error and transmitted to the microcomputer cpu0 in the process fc12) is received, and at the time ta6 to the microcomputer cpu4 as before Confirmation data cfm is issued and a waiting state of time tw20 is entered.

  Since the monitoring device m4 is already turned off at this time, the microcomputer cpu4 does not return response data. The microcomputer cpu0 confirms that there is no response from the microcomputer cpu4 during the waiting time tw20, and finally detects that the operation mode of all the monitoring devices m4 to m6 is turned off at the time tae when the confirmation is finished. it can.

  The operation in the case where all the monitoring devices m4 to m6 are normally stopped by the command from the overall monitoring device ctl and the overall monitoring device ctl confirms this has been described above. On the other hand, the operation in the case where an abnormality that cannot be normally turned off occurs in any of the monitoring devices and the overall monitoring device ctl detects the abnormality will be described. As an example, consider a case where there is an abnormality in the monitoring device m5 and the switch sw5 is not turned off.

  FIG. 25 shows a state of communication when there is an abnormality in the monitoring device m5 and the switch sw5 is not turned off. The time is plotted on the horizontal axis, and the signal position is plotted on the vertical axis. The process from time ta0 at which the microcomputer cpu0 issues data slp to the microcomputer cpu4 to time tas at which the microcomputer cpu5 applies a signal for turning off the switch sw5 is the same as in FIG. After time tas will be described.

  In this example, the signal generated by the microcomputer cpu5 at the time tas reaches the switch sw5. However, the switch sw5 is caused by, for example, a permanent abnormality around the switch sw5 or the influence of noise on the signal from the microcomputer cpu5. Will not turn off.

  The microcomputer cpu4 transmits the confirmation data cfm to the microcomputer cpu5 at the time ta1 + tw14 when the wait is completed, and waits for the time tw24.

  When confirming that the confirmation data cfm is addressed to itself in the process f3, the microcomputer cpu5 whose operation mode remains on reads the process “response reply” from the command part cmd in the process f5, and proceeds to the process of FIG. . That is, in the process fd2, 4 representing the microcomputer cpu4 is set in the destination part adr, "forward" is set in the forward / reverse part ud, and the response data rsp in which the dummy value is set in the command part cmd is set in the transmission box. Send to cpu4.

  The microcomputer cpu4 in the waiting process fc10 receives the response data rsp from the microcomputer cpu5 before the waiting time tw24 elapses. At this point, the process fc10 is exited and the process proceeds to process fc11. In the process fc11, 0 indicating the microcomputer cpu0 in the destination part adr, “forward” in the forward / reverse part ud, a dummy value in the instruction part cmd, and an error indicating that the monitoring device could not shift off in the data part dat The error data err set with the value is set in the transmission box, and is transmitted to the microcomputer cpu0 in the process fc12.

  The microcomputer cpu0 is in a waiting state from the time ta0 when the data slp is first transmitted to the microcomputer cpu4, but receives the error data err from the microcomputer cpu4 at a time taerr before the waiting time tw10 elapses. Then, the error value written in the data portion dat of the error data err is read, and it is detected that the monitoring device has not been normally turned off.

  As described above, the overall monitoring device ctl sets the operation mode of the monitoring devices m4 to m6 to be off and confirms whether or not it has been turned off. The same can be done when the monitoring devices m1 to m3 are turned off.

  Next, a procedure in which the overall monitoring device ctl confirms the operation mode of the monitoring device m6 via the monitoring devices m1 to m3 and the parallel signal line p will be described.

  FIG. 15 is a flow of control signals when the overall monitoring device ctl checks the operation modes of the monitoring devices m4 to m6 via the monitoring devices m1 to m3 and the inter-parallel signal line p. As in FIG. 14, the horizontal axis represents time, and the vertical axis represents signal position.

  Times dly1 to dly3 are processing delays of the microcomputers cpu1 to cpu3, respectively.

  Time tw23 is waiting time 2 obtained by the microcomputer cpu2 pulling the storage table map.

  The communication data ask is data for instructing confirmation of the operation mode, and the communication data ans is data describing the result of confirmation of the operation mode.

  Initially, at time ta7 after the monitoring devices m4 to m6 are turned off, the microcomputer cpu0 sets the communication data created by setting the destination portion adr to 3, the forward / reverse portion ud to the forward direction, and the command portion cmd to “operation mode check”. Ask is sent to the signal line s01 to the microcomputer cpu3. This data is successively transferred by the processes f6 to f7 of the microcomputer cpu1 and the microcomputer cpu2 and delivered to the microcomputer cpu3.

  Next, the microcomputer cpu3 which is the destination of the data ask reads the instruction part cmd, and executes the operation mode confirmation process shown in FIG. In the process fb2, the communication data cfm in which the destination part adr is set to 6, the forward / reverse part ud is set in the forward direction, and the command part cmd is set to “response reply” is set in the transmission box, and is transmitted to the communication circuit comu3 in the process fb3. At this time ta8, the process moves to the process fb4, and waits for the time tw23. The communication data cfm sent to the communication circuit comu3 is applied to the communication circuit comu6 of the monitoring device m6 via the inter-parallel signal line p. However, since the monitoring device m6 is off, there is no answer to this communication data. .

  Next, at time ta8 + tw23, the microcomputer cpu3 finishes confirming that the microcomputer cpu6 cannot respond by expiration of the waiting time, that is, the monitoring device m6 is in the off state, and proceeds to the process fb6. In process fb6, communication data ans in which the destination part adr is set to 0 indicating the microcomputer cpu0, the forward / reverse part ud is set in the reverse direction, the instruction part cmd is set to a dummy value, and the data part dat is set to a value indicating that the monitoring device m6 is turned off. Is set in the transmission box and then transmitted in the process fb7. The communication data ans are successively transferred by the microcomputers cpu2 and cpu1, and delivered to the microcomputer cpu0 at time ta9.

  Finally, the microcomputer cpu0 reads the data part dat of the communication data ans and confirms that the monitoring device m6 is turned off.

  Thus, by using the communication path from the monitoring apparatuses m1 to m3 to the monitoring apparatus m6, the operation mode of the monitoring apparatus m6 can be confirmed even when an abnormality occurs in the communication paths of the monitoring apparatuses m4 to m6. .

  In the present embodiment, the route to the monitoring devices m1 to m3 is used for confirming the operation mode. However, it can be similarly used for acquiring voltage data of the storage battery b6 and transmitting a command for turning off the operation mode.

  According to the power storage device control system of the present embodiment, a plurality of communication paths from the overall control device to each monitoring device are provided without using expensive insulating means that can withstand a high voltage of 1500 V, and the communication paths are used in a ring shape. As a result, the overall control device can easily communicate with many monitoring devices, and the reliability with respect to abnormal communication paths can be improved.

  In addition, since the monitoring device has a plurality of operation modes with different power consumption and can be switched by the overall monitoring device, control and confirmation of the operation mode of each monitoring device without using expensive insulation means Can save energy and extend the life of storage batteries.

  The power storage device control system of the present embodiment is different from the configuration of the first embodiment in the configuration of the monitoring devices m1 to m6, the connection between the monitoring devices m1 and m4 and the overall monitoring device ctl, and between the monitoring device m3 and the monitoring device m6. Connection is different.

  FIG. 17 shows the configuration of the monitoring device m2.

The monitoring device m2 includes an insulating means isop2. The insulation means isop2 is an insulation device that can withstand 500 V, as is the case with the insulation means iso2. Power is supplied from a monitoring device whose potential level is one step lower, and a signal corresponding to the presence or absence of power supply is applied to the switch sw2. The switch sw2 can be switched on and off in accordance with a signal applied from the insulating means isop2.
Specifically, the switch sw2 is turned on when a signal to turn on is applied from the microcomputer m2 or when the insulating means isop2 is powered. Further, the signal is turned off when a signal for commanding off is applied from the microcomputer m2 or when there is no power supply to the insulating means isop2.

  The monitoring devices m1 to m6 have the same configuration and are provided with insulating means isop1 to isop6. As a result, the on / off of the operation mode of the monitoring device is successively chained from the low potential level side to the high potential side.

  FIG. 18 shows the configuration of signal lines between the overall monitoring device ctl and the monitoring devices m1 and m4. The overall monitoring device ctl includes an operation mode control circuit mc. The operation mode control circuit mc supplies power to the insulating means isop1 and the insulating means isop4, respectively, and can be switched on or off by a command from the microcomputer cpu0.

  FIG. 19 shows a configuration of signal lines between the monitoring device m3 and the monitoring device m6. A signal line p36 connecting the power supply circuit pw3 and the microcomputer cpu6 and a signal line p63 connecting the power supply circuit pw6 and the microcomputer cpu3 are provided. The signal line p36 transmits a signal according to the presence / absence of the power supply output of the power supply circuit pw3 to the microcomputer cpu6. The signal line p63 transmits a signal according to the presence or absence of the power supply output of the power supply circuit pw6 to the microcomputer cpu3.

  The above is the configuration of this embodiment.

  The processing procedure of the microcomputers cpu1 to cpu6 is the same as that in the first embodiment. In addition, when the monitoring device m6 detects a change in the output of the power supply means pw3 via the signal line p36, the response data generated in the processing fb5 and the processing fb6 according to the operation mode of the monitoring device m3 is sent to the microcomputer cpu0. Process to send to. When the monitoring device m3 detects a change in the output of the power supply means pw6 via the signal line p63, the response data generated in the processing fb5 and the processing fb6 according to the operation mode of the monitoring device m6 is sent to the microcomputer cpu0. Process to send to.

  Next, how the operation mode of the monitoring device is controlled in the present embodiment will be described by taking as an example the case where the operation mode of the monitoring devices m1 to m3 is turned off and the operation mode is confirmed via the monitoring devices m4 to m6.

  FIG. 20 shows the state of signals when the operation mode of the monitoring devices m1 to m3 is turned off and the confirmation is made via the monitoring devices m4 to m6. Similarly to the on / off state notation of the switches sw1 to sw6, the state of transition of the operation mode control circuit mc with / without power feeding is also described. Time dp0 is a state transition time of the operation mode control circuit mc.

  First, at time tb0, the microcomputer cpu0 instructs the operation mode control circuit to be in a state where no power is supplied. In response to this, when the operation mode control circuit mc shifts to no power supply, power supply to the insulating means isop1 is stopped, and the switch sw1 is turned off at time tb1. This propagates one after another to the switch sw2 at time tb2 and to the switch sw3 at time tb3, and all the operation modes of the monitoring devices m1 to m3 are turned off.

  Next, in response to the switch sw3 being turned off at time tb3, a signal corresponding to the stop of the output of the power supply circuit pw3 is applied to the microcomputer cpu6 via the signal line p36.

  Next, the microcomputer cpu6 receives a signal input via the signal line p36, and the monitoring device m3 is turned off in the destination portion adr is 0, the forward / reverse portion ud is forward, the instruction portion cmd is a dummy value, and the data portion dat is off. The response data ans indicating that is sent to the microcomputer 0. This is delivered to the microcomputer cpu0 via the microcomputer cpu5 and the microcomputer cpu4.

  The microcomputer cpu0 confirms that the monitoring devices m1 to m3 are turned off when receiving a signal indicating that the monitoring device m3 is turned off during the waiting time tw10b from the initial time tb0.

  According to the power storage device control system of the present embodiment, the overall monitoring device can stop and confirm the monitoring device for the series power storage unit simply by issuing an operation mode control command and waiting for a response. In this respect, it is simpler than the method of the first embodiment, and the time from the operation mode switching command to the confirmation is shorter.

  In the power storage device control system of the present embodiment, the configuration of the monitoring devices m4 to m6, the connection between the monitoring device m4 and the overall monitoring device ctl, and the connection between the monitoring device m3 and the monitoring device m6 are different from the configuration of the second embodiment. Different.

  FIG. 21 shows the configuration of the monitoring device m5.

  The monitoring device m5 includes an insulating means isopq5 instead of the insulating means isop5 of the second embodiment. The insulating means isoq5 is supplied with power from the monitoring device m6 having a high one-step potential level, and applies a signal corresponding to the presence or absence of power supply to the switch sw5. The switch sw5 can be switched on and off in accordance with a signal applied from the insulating means isop5. Specifically, the switch sw5 is turned on when a signal to turn on is applied from the microcomputer m5 or when the insulating means isop5 is powered. Further, it is turned off when a signal for commanding off is applied from the microcomputer m5, or when there is no power supply to the insulating means isop5.

  FIG. 22 shows a configuration of signal lines between the overall monitoring device ctl and the monitoring devices m1 and m4. A signal corresponding to the output of the power supply circuit pw4 is applied to the microcomputer cpu0.

  FIG. 23 shows a configuration of signal lines between the monitoring device m3 and the monitoring device m6. The power supply circuit pw3 and the power supply circuit pw6 are connected by the electric wire pp. Power is supplied from the power supply circuit pw3 to the insulating means isoq6 via the electric wire pp.

  The above is the configuration of this embodiment.

  Next, how the operation mode of the monitoring device is controlled in the present embodiment will be described by taking as an example the case where the operation mode of the monitoring devices m1 to m6 is turned off.

  FIG. 24 shows the state of signals when the operation mode of the monitoring devices m1 to m3 is turned off and the confirmation is made via the monitoring devices m4 to m6.

First, at time tc0, the microcomputer cpu0 instructs the operation mode control circuit mc to not supply power.
When power supply from the operation mode control circuit mc to the insulating means isop1 is stopped, the switch sw1 is turned off at time tc1.

  Thereafter, the switch sw2 is sequentially turned off at time tc2, the switch sw3 is successively turned off at time tc3, and is propagated to the switch sw6 via the electric wire pp, and the switch sw4 is turned off one after another at time tc4 switch sw6, time tc5 switch sw5, and time tc6. . All the monitoring devices m1 to m6 are turned off in the above order.

  Finally, a signal corresponding to the stop of the output of the power supply circuit pw4 at time tc7 is applied to the microcomputer cpu0. The microcomputer cpu0 confirms that all the monitoring devices m1 to m6 are turned off by receiving a response signal within the waiting time tw10c from the initial time tc0.

According to the power storage device control system of the present embodiment, switching of the operation modes of all the monitoring devices and confirmation thereof can be performed with a single command issued from the overall monitoring device to the operation mode control circuit.
In this respect, the time from the command for switching the operation mode to the confirmation is shorter than in the first and second embodiments.

e Power storage device control system ld Load ctl Overall monitoring device b1, b2, b3, b4, b5, b6 Storage battery m1, m4, m2, m3, m5, m6, m4 ', m5', m6 'Monitoring device bu1, bu2, bu3 , Bu4, bu5, bu6 Power storage units bs1, bs2 Series power storage units s12, s23, s45, s56 Signal lines p01, s02 Signal lines p, p ', p63, p36 Signal lines v1, v2, v3, v4 between parallel lines v5, v6 voltage sensors pw1, pw2, pw3, pw4, pw5, pw6, pw4 ', pw5', pw6 'power supply circuit sw1, sw2, sw3, sw4, sw5, sw6, sw4', sw5 ', sw6' switch cr1, cr2, cr3, cr4, cr5, cr6, crd1, crd2, crd3, cdr4, crd5, crd6 Circuit cpu1, cpu2, cpu3, cpu4, cpu5, cpu6 microcomputer isoc1, isoc2, isoc3, isoc4, isoc5, isoc6, isop1, isop2, isop3, isop4, isop5, isop6, isop4 ′, isop5 ′, isop6 ′ , Comu 2, comu 3, comu 4, comu 5, comu 1, comd 2, comd 3, comd 4, comd 5, comd 6 communication circuit sply power feeding circuit cpu 0 microcomputer dly 1, dly 2, dly 3, dly 4, dly 5, dly 6 processing delay req 3 p d d 3 d , Dp2, dp3, dp4, dp5, dp6 State transition time ask Query data cfm Confirmation data ans answer data wait0, wait6, wait0 ', wait0 "waiting time

Claims (2)

A plurality of power storage units having a storage battery and a monitoring device for monitoring the storage battery are electrically connected in series.
Having a general monitoring device for controlling charging and discharging of the storage battery;
The plurality of series power storage units are electrically connected in parallel,
The series power storage units are connected in series between the storage batteries in a plurality of power storage units, and connected in series by a signal line that is insulated between the monitoring devices by insulating means,
In the power storage device control system in which the low-voltage side monitoring device of the plurality of series power storage units is connected to the overall monitoring device via a communication line,
The monitoring device turns on / off a power supply circuit that supplies power to the monitoring device from a storage battery to be monitored, and is turned on when power is supplied from the power supply circuit of another monitoring device. Has a switch that is turned off when power is not received from
The overall monitoring device is configured to turn on / off the power supply to the switch of the monitoring device on the low-voltage side of the series storage unit, and to turn on / off the power circuit from the monitoring device on the low-voltage side of the other series storage unit. Means for receiving a signal according to
The power supply circuit of the monitoring device on the high voltage side of the series storage unit that receives power from the overall monitoring device to the switch of the monitoring device on the low voltage side supplies power to the switch of the monitoring device on the high voltage side of the other series storage unit Connected so that
When the general monitoring device switches the power supply on / off state to the switch of the low voltage side monitoring device of the series power storage unit, the general monitoring device is connected to the low voltage side monitoring device of the other series power storage unit. A power storage device control system capable of receiving a signal corresponding to an on / off state of a power supply circuit. The power storage device control system according to claim 1, a plurality of motors that drive a railway vehicle, and an inverter that drives the motors,
A railway vehicle that charges and discharges electric power to the plurality of motors and the inverter by the power storage device control system.