JP4795815B2 - Constant current circuit and constant voltage circuit - Google Patents

Description

  The present invention relates to a constant current circuit and a constant voltage circuit having a MOS (Metal Oxide Semiconductor) configuration, and more particularly to a technique suitable for stabilizing the operation of the circuit.

  In an analog circuit configured using MOS transistors, a reference voltage and a constant current source are important in order to stabilize the operation. However, in the MOS transistor used for generating the constant current source, variations in threshold voltage in the manufacturing process and changes in threshold voltage due to temperature occur. For example, the constant current increases as the threshold voltage increases, and the constant current decreases as the threshold voltage decreases.

  As a conventional constant current circuit corresponding to such a variation in threshold value in the manufacturing process of the MOS transistor, there is a circuit shown in FIG.

  FIG. 3 is a circuit diagram showing a configuration example of a constant current circuit using a conventional MOS transistor. The circuit in FIG. 3A uses a depletion type MOS transistor (D type MOS transistor) 31 and a resistor 32. The configuration, the circuit in FIG. 3B, has a configuration using only the D-type MOS transistor 31.

  In the circuit shown in FIG. 3B, the gate, source and substrate (substrate) of the D-type MOS transistor 31 are connected to the ground potential VSS, and the drain is connected to the high potential VDD. A constant current flows between the source and drain.

  In such a circuit having a single D-type MOS transistor 31 shown in FIG. 3B, the threshold voltage of the MOS transistor (Differential MOS transistor 31 generated in the manufacturing process of the D-type MOS transistor 31 such as thermal diffusion, gate oxidation, ion implantation, etc.) There is a problem that the absolute value of the constant current and the temperature coefficient change greatly due to fluctuations in the threshold voltage.

  In the circuit shown in FIG. 3A, a resistor 32 is inserted between the gate and source of the D-type MOS transistor 31. That is, the source and substrate of the D-type MOS transistor 31 and one end of the resistor 32 are connected, the gate of the D-type MOS transistor 31 and the other end of the resistor 32 are connected by VSS, and the drain of the D-type MOS transistor 31 is set to VDD. Connected.

  With such a configuration, when the threshold voltage of the D-type MOS transistor 31 is varied due to a manufacturing process, for example, the threshold voltage increases, the constant current flowing through the D-type MOS transistor 31 increases. Due to the voltage drop caused by the current flowing through the resistor 32, the gate potential of the D-type MOS transistor 31 changes to the minus (−) direction with respect to the source potential and changes in a direction in which no constant current flows. As a result, the constant current Stabilizes.

  Conversely, when the threshold voltage is lowered, the constant current flowing through the D-type MOS transistor 31 tends to decrease. However, since the voltage drop caused by the current flowing through the resistor 32 is reduced, the gate potential of the D-type MOS transistor 31 is A positive (+) direction with respect to the source potential changes to a direction in which a constant current easily flows, and as a result, the constant current is stabilized.

  In general, when the temperature rises, a resistor 32 (for example, a polysilicon resistor or a diffused resistor) that increases the resistance value is used when the constant current increases in conjunction with the fluctuation of the threshold voltage of the D-type MOS transistor 31. Thus, a more stable constant current can be obtained.

  Further, in Patent Document 1, a configuration example of a reference voltage circuit using the constant current circuit shown in FIG. 3A is described, and the constant current circuit shown in FIG. 3B is used. Examples of the configuration of the reference voltage circuit are described in Patent Document 2 and Patent Document 3.

  FIG. 4 is a circuit diagram showing a configuration example of a reference voltage circuit using a conventional MOS transistor. The constant current circuit shown in FIG. 3B described in Patent Document 2 and Patent Document 3 is used. 2 shows a configuration example of a reference voltage circuit.

  In the reference voltage circuit in FIG. 4, the drain of the depletion (D) type n-channel MOS transistor 45 is connected to the high potential side power supply, and the source of the enhancement (E) type n channel MOS transistor 47 is connected to the low potential side power supply. And connecting the bulk.

  The source and bulk of the D-type n-channel MOS transistor 45 are connected to the drain of the E-type n-channel MOS transistor 47 at the connection point 48, and the gates are connected to each other at the connection point 46 and also connected to the connection point 48. To do. This connection point 48 is a reference voltage output using the power source on the low potential side as a reference potential.

  In general, the enhancement (E) type MOS transistor is a surface channel type transistor, so the manufacturing variation of the threshold voltage is small. On the other hand, the depletion (D) type transistor is a buried channel type transistor. Therefore, there is a problem that the manufacturing variation of the threshold voltage is large and the manufacturing variation of the saturation drain current is very large.

  FIG. 5 is a circuit diagram showing a configuration example of a constant current circuit using the reference voltage circuit in FIG. 4. In this constant current circuit, a depletion type MOS transistor having a drain connected to a power source 54 on the high potential side, that is, The source of the D-type MOS transistor 51 (denoted as “DepTr1” in the figure) and the enhancement type MOS transistor, ie, the E-type MOS transistor 52 (denoted as “EnhTr1” in the figure) whose source is connected to the low potential side (ground) 4) is connected to each gate to form the reference voltage circuit shown in FIG. 4 to obtain the reference voltage 55. Further, this reference voltage 55 is connected to the E-type MOS transistor 53 (denoted as “EnhTr2” in the figure). The saturation drain current of the E-type MOS transistor 53 (EnhTr2) is a constant current. And it has a configuration to be output as Iref.

  At this time, the saturation current of the D-type MOS transistor 51 becomes a constant current source, and since the drain and gate of the E-type MOS transistor 52 are common, the gate voltage is determined so as to have an upper constant current value. Since the E-type MOS transistor 53 operates with the gate voltage, the current value of the D-type MOS transistor is current mirrored.

  In a constant current circuit configured using such a D-type MOS transistor 51 (DepTr1), an E-type MOS transistor 52 (EnhTr1), and an E-type MOS transistor 53 (EnhTr2), the D-type MOS transistor 51 (DepTr1) When the manufacturing variation of the threshold voltage is large, the variation of the current value is also large, and the saturation drain current value (constant current value Iref) of the E-type MOS transistor 53 (EnhTr2) is greatly influenced.

  Further, in the D-type MOS transistor 51 (DepTr1), a change in threshold voltage due to temperature also occurs, and a difference in threshold voltage between the D-type MOS transistor 51 (DepTr1) and the E-type MOS transistor 52 (EnhTr1) (threshold difference). ) Is also unstable, and the entire constant current circuit using the reference voltage 55 is unstable.

  As a conventional technique for dealing with such a problem, there is a technique described in Patent Document 4, for example. In this technique, a resistance is inserted between the source of the MOS transistor 53 (EnhTr2) and the substrate, and the current value is adjusted by trimming the resistance with a laser beam.

  Further, as a conventional technique for realizing a constant current generating circuit with a small temperature dependency by trimming such a resistor, there is a technique described in Patent Document 5, for example.

  However, when using such a means of trimming, it is necessary to prepare transistors of different sizes and to make a bit for trimming, a large area is required, and it is not possible to correct for temperature changes. was there.

  In addition, there exists a technique of patent documents 6-10 regarding the conventional stabilization technique in a constant current circuit.

Japanese Patent No. 3517343 Japanese Patent Laid-Open No. 9-325826 Japanese Patent Publication No. 4-65546 JP-A-2-266407 JP 2004-192518 A Japanese Patent No. 2599304 Japanese Patent Laid-Open No. 4-97405 Japanese Patent No. 2800523 JP 2002-236521 A Japanese Patent No. 3052818 JP-A-7-160347

  The problem to be solved is that in the conventional constant current circuit shown in FIG. 5, the threshold voltage changes due to manufacturing variations of the D-type MOS transistor 51 (DepTr1) and the threshold voltage changes due to temperature. It is a point that is a simple circuit.

  An object of the present invention is to solve these problems of the prior art and reduce the influence on the constant current output value due to manufacturing variations of D-type MOS transistors and temperature changes in the constant current circuit. Another object is to establish a constant voltage source at the same time.

  In order to achieve the above object, the present invention comprises a D-type MOS transistor whose drain is connected to the high potential side, and first and second E-type MOS transistors each having a source connected to the low potential side. The source and gate of the D-type MOS transistor and the gate of the first E-type MOS transistor are connected, and the source of the D-type MOS transistor and the drain of the first E-type MOS transistor are connected via a resistor, The gate of the second E-type MOS transistor is connected on the connection between the drains of one E-type MOS transistor, and the drain of the second E-type MOS transistor is used as a constant current output terminal. Further, the threshold voltage of the second E-type MOS transistor is made lower than the threshold voltage of the first E-type MOS transistor by the resistance voltage drop, and the temperature of the source-drain current of the second E-type MOS transistor is reduced. The gate potential of the second E-type MOS transistor is set to a value at which the change becomes small. In addition, a constant voltage source can be set at the same time by using the output voltage at the connection portion between the source and the resistor of the D-type MOS transistor as a reference voltage.

  According to the present invention, even if the threshold value of each transistor changes due to manufacturing variation, and the amount of current flowing therethrough changes, the resistance is inserted and correction is applied in the direction of absorbing the fluctuation amount. Can be made.

  The best mode for carrying out the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration example of a constant current circuit and a constant voltage circuit according to the present invention, and FIG. 2 is an explanatory diagram showing a temperature characteristic example of a transistor constituting the constant current circuit in FIG.

  As shown in FIG. 1, the constant current and constant voltage circuit of this example includes a D-type MOS transistor (denoted as “DepTr1” in FIG. 1) 1 whose drain is connected to the power source 4 on the high potential side, and a low source. First and second E-type MOS transistors (denoted as “EnhTr1” and “EnhTr2” in the figure) 2 and 3 connected to the potential side (ground), and the source of the D-type MOS transistor 1 (DepTr1) And the drain of the (first) E-type MOS transistor 2 (EnhTr1) are connected via the resistor R1 (first connection), and each of the D-type MOS transistor 1 (DepTr1) and the E-type MOS transistor 2 (EnhTr1) is connected. Are connected (second connection), and the connection between the source of the D-type MOS transistor 1 (DepTr1) and the resistor R1 in the second connection and the first connection is made. A point (reference voltage 5) is connected (third connection) to the connection point (output voltage 6) between the drain of the E-type MOS transistor 2 (EnhTr1) and the resistor R1 in the first connection (second voltage). By connecting the gate of the E-type MOS transistor 3 (EnhTr2) (fourth connection), the drain of the E-type MOS transistor 3 (EnhTr2) is used as a constant current output terminal (Iref). A connection portion between the source of the D-type MOS transistor 1 and the resistor R1 is used as a reference voltage terminal.

  In the constant current circuit and constant voltage of this example, the resistor R1 is provided in the reference voltage circuit shown in FIG. 5 composed of the D-type MOS transistor 1 (DepTr1) and the E-type MOS transistor 2 (EnhTr1). An output voltage 6 is formed from the reference voltage 5 generated by the shown reference voltage circuit, and is given as the gate voltage of the E-type MOS transistor 3 (EnhTr2).

  Thus, in the constant current and constant voltage circuit of this example, the resistor R1 is arranged on the source side of the D-type MOS transistor 1 (DepTr1), and the drain of the E-type MOS transistor 2 (EnhTr1) is connected via the resistor R1. Since the gates of the D-type MOS transistor 1 (DepTr1) and the E-type MOS transistor 2 (EnhTr1) are shared and connected to the source side of the D-type MOS transistor 1 (DepTr1), the reference voltage 5 is fixed to a constant voltage of a difference between threshold values of the D-type MOS transistor 1 (DepTr1) and the E-type MOS transistor 2 (EnhTr1).

  When the constant current value changes because the threshold value of the D-type MOS transistor 1 (DepTr1) varies in the manufacturing process, feedback is applied to the voltage of the output voltage 6 by the resistor R1. In the circuit of this example, the D-type MOS transistor 1 (DepTr1) and the E-type MOS transistors 2 and 3 (EnhTr1 and 2) are formed in the same well diffusion with an N channel, and are generated due to manufacturing variations. The threshold variation changes in the same direction. When a large amount of current flows in the D-type MOS transistor 1 (DepTr1), the gate voltage of the E-type MOS transistor 3 (EnhTr2) decreases, and correction is applied so that no current flows.

  As described above, in the constant current and constant voltage circuit of this example, the problem of the conventional circuit shown in FIG. 5 "(1) The reference voltage generated by the D-type MOS transistor DepTr and the E-type MOS transistor EnhTr is used as the gate voltage. When a MOS transistor is operated and its saturated drain current is used as a constant current source, the threshold value of DepTr changes due to manufacturing variations, so that the value of the saturated drain current changes greatly, and the influence of threshold variations is greatly affected. It was possible to solve the problem “

  This alone solves the problem of fluctuations in the constant current value due to the change in threshold due to manufacturing variations at room temperature. However, the temperature characteristics of the E-type MOS transistor that generates a constant current (threshold fluctuation due to temperature change) are solved. There is a problem that cannot be corrected. The technique of this example for coping with such a problem will be described below with reference to FIG.

  Regarding the change in threshold value due to temperature change in the E-type MOS transistor 3 (EnhTr2) shown in FIG. 1, as shown in FIG. 2, in the Vg-Id characteristic (gate potential-drain current) of the transistor, Id with respect to temperature change. There is Vg (gate potential P) in which (drain current) does not change, and the output voltage 6 is set so that the gate voltage of the E-type MOS transistor 3 (EnhTr2) becomes P in the constant current and constant voltage circuit in FIG. By setting, it becomes a constant current source without temperature characteristics.

  At this time, the threshold voltages of the E-type MOS transistor 2 (EnhTr1) and the E-type MOS transistor 3 (EnhTr2) are lower in the E-type MOS transistor 3 (EnhTr2) by the voltage drop of the resistor R1. Optimized when. As a result, the reference voltage and the constant current source with little variation with respect to the threshold variation and the temperature characteristic of the transistor can be formed with the same circuit.

  As described above with reference to FIGS. 1 and 2, in the constant current and constant voltage circuit of this example, even if the threshold value of each transistor changes due to manufacturing variations and the amount of current flowing therethrough changes, the inserted resistor Since the correction is performed in the direction in which the fluctuation amount is absorbed by R1, fluctuations can be suppressed with respect to the reference voltage and the constant current. Further, by setting a gate voltage having no temperature characteristic, a constant current circuit and a constant voltage circuit having no temperature change can be obtained.

It is a block diagram which shows the structural example of the constant current and constant voltage circuit which concern on this invention. It is a circuit diagram which shows the structural example of the constant current circuit using the conventional MOS transistor. It is a circuit diagram which shows the structural example of the constant current circuit using the conventional MOS transistor. It is a circuit diagram which shows the structural example of the reference voltage circuit using the conventional MOS transistor. FIG. 5 is a circuit diagram showing a configuration example of a constant current circuit using the reference voltage circuit in FIG. 4.

Explanation of symbols

  1: D-type MOS transistor (depletion type MOS transistor, DepTr1), 2, 3: E-type MOS transistor (enhancement type MOS transistor, EnhTr1, 2), 4: Power supply (high potential side), 5: Reference voltage, 6: Output voltage, R1: resistance, 31: D-type MOS transistor, 32: resistance, 45: depletion type n-channel MOS transistor, 46, 48: connection point, 47: enhancement type n-channel MOS transistor, 51: D-type MOS transistor Transistor (depletion type MOS transistor, DepTr1), 52, 53: E type MOS transistor (enhancement type MOS transistor, EnhTr1, 2), 54: power supply (high potential side) 55: reference voltage, Iref: constant current.

Claims (4)

A D-type MOS transistor having a drain connected to the high potential side, and first and second E-type MOS transistors each having a source connected to the low potential side,
Connecting the source and gate of the D-type MOS transistor and the gate of the first E-type MOS transistor;
Connecting the source of the D-type MOS transistor and the drain of the first E-type MOS transistor via a resistor;
Connecting the gate of the second E-type MOS transistor to the connection between the resistor and the drain of the first E-type MOS transistor;
A constant current circuit, wherein a drain of the second E-type MOS transistor is a constant current output terminal. The constant current circuit according to claim 1,
The threshold voltage of the second E-type MOS transistor is made lower than the threshold voltage of the first E-type MOS transistor by the voltage drop of the resistor, and the source-drain current of the second E-type MOS transistor is reduced. A constant current circuit characterized in that the gate potential of the second E-type MOS transistor is set to a value at which the temperature change becomes small. A D-type MOS transistor having a drain connected to the high potential side, and first and second E-type MOS transistors each having a source connected to the low potential side,
Connecting the source and gate of the D-type MOS transistor and the gate of the first E-type MOS transistor;
Connecting the source of the D-type MOS transistor and the drain of the first E-type MOS transistor via a resistor;
Connecting the gate of the second E-type MOS transistor to the connection between the resistor and the drain of the first E-type MOS transistor;
A constant voltage circuit characterized in that an output voltage at a connection portion between the source of the D-type MOS transistor and the resistor is used as a reference voltage terminal. The constant voltage circuit according to claim 3,
The threshold voltage of the second E-type MOS transistor is made lower than the threshold voltage of the first E-type MOS transistor by the voltage drop of the resistor, and the source-drain current of the second E-type MOS transistor is reduced. A constant voltage circuit characterized in that the gate potential of the second E-type MOS transistor is set to a value at which the temperature change becomes small.

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