JP2009504392A - 支持体上に薄膜を転写する方法 - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 55
- 239000010409 thin film Substances 0.000 title claims abstract description 15
- 239000000463 material Substances 0.000 claims abstract description 70
- 239000000758 substrate Substances 0.000 claims abstract description 43
- 229910052732 germanium Inorganic materials 0.000 claims description 50
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 49
- 229910052710 silicon Inorganic materials 0.000 claims description 29
- 239000010703 silicon Substances 0.000 claims description 29
- 239000013078 crystal Substances 0.000 claims description 14
- 238000010438 heat treatment Methods 0.000 claims description 13
- 238000005304 joining Methods 0.000 claims description 7
- 238000000151 deposition Methods 0.000 claims description 3
- 239000007787 solid Substances 0.000 abstract description 2
- 239000010408 film Substances 0.000 abstract 5
- 239000010410 layer Substances 0.000 description 112
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 29
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 15
- 229910052814 silicon oxide Inorganic materials 0.000 description 14
- 238000005498 polishing Methods 0.000 description 8
- 238000002513 implantation Methods 0.000 description 7
- 229910004298 SiO 2 Inorganic materials 0.000 description 6
- 239000000243 solution Substances 0.000 description 6
- 239000000126 substance Substances 0.000 description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 239000012212 insulator Substances 0.000 description 4
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 4
- 238000004140 cleaning Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000000227 grinding Methods 0.000 description 3
- 238000000926 separation method Methods 0.000 description 3
- 239000002344 surface layer Substances 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000000137 annealing Methods 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 150000002290 germanium Chemical class 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- -1 hydrogen ions Chemical class 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000002604 ultrasonography Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
- Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
- Y10T156/1089—Methods of surface bonding and/or assembly therefor of discrete laminae to single face of additional lamina
- Y10T156/109—Embedding of laminae within face of additional laminae
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Application Of Or Painting With Fluid Materials (AREA)
Abstract
Description
例えば、所定の深さにガスを注入することによって、薄層を形成する材料からなる基板内に所定の深さで弱められた領域を形成するステップと、
例えば、分子接合によって、支持体上に注入された基板(ドナー基板と称する)を接合するステップと、
予め弱められた領域での破断(一般に、通常、200℃〜600℃の熱処理ステップの間)によって、薄層(弱められた領域とドナー基板の初期表面との間に配置された)から切断されたドナー基板と、薄層を支持する支持体とを分離するステップとである。
少なくとも一部が第1の材料のバルク基板からもたらされる層を含む構造を提供するステップであり、その層は、第1の材料の熱膨張率とは異なり、かつ第2の材料の熱膨張率に近い熱膨張率を有する第3の材料から形成される第2の支持体に取り付けられるステップと、
第1の材料の薄層が転写される構造に境界を定める所定の深さで、層内に埋設され弱められた領域を形成するステップと、
第2の支持体に取り付けられた層を、第1の支持体に接合するステップと、
少なくとも1つの熱処理ステップを含む、弱められた領域において層を破断するステップとである。
エピタキシャル層中に埋設され弱められた領域を形成するステップと、
エピタキシャル層を第3の支持体に接合するステップと、
弱められた領域においてエピタキシャル層を破断するステップとである。
従来どおり、例えば、PECVDによって二酸化ケイ素(SiO2)の層を堆積するステップと、
400℃〜600℃で1時間、窒素中でシリコン酸化物層を任意に緻密化するステップと、
洗浄および/または化学機械研磨ステップ(親水性接合との適合性を向上するために)とである。
注入は、その層において、転写される薄膜を画定するために、スタック(外部層)の頂部に配置されたゲルマニウムのエピタキシャル層で達成され、
上記されるように、薄膜は、転写され、
外部ゲルマニウム層の残りは、選択エッチング(例えば、H2O2エッチング)によって取り除かれ、
シリコン停止層は、次いで、選択エッチング(例えば、TMAH(テトラメチルアンモニウム水酸化物)を使用すること)によって取り除かれ、
工程は、次のゲルマニウム層で繰り返される。
Claims (20)
- 第1の材料の薄層(22)を、第2の材料から形成される第1の支持体(18、24)上に転写する薄膜転写方法であって、
少なくとも一部が第1の材料のバルク基板からもたらされる層(3)を含む構造を提供するステップを含み、層(3)が、第1の材料の熱膨張率とは異なり、かつ第2の材料の熱膨張率に近い熱膨張率を有する第3の材料から形成される第2の支持体(6、10)に取り付けられ、前記薄膜転写方法がさらに、
第1の材料の薄層(22)が転写される構造に境界を定める所定の深さで、層(3)内に埋設され弱められた領域(14)を形成するステップと、
第2の支持体(6、10)に取り付けられた層(3)を、第1の支持体(18、24)に接合するステップと、
少なくとも1つの熱処理ステップを含む、弱められた領域(14)において層(3)を破断するステップとを含むことを特徴とする、方法。 - 層(3)の厚みが、接合後に得られる構造の温度に応じる機械的挙動が、第2の支持体(6、10)および第1の支持体によって付与されるようなものである、請求項1に記載の薄層転写方法。
- 破断ステップが、さらに、機械的負荷を加えるステップを含む、請求項1または2に記載の薄層転写方法。
- 埋設され弱められた領域を形成するステップが、少なくとも1つのガス種を注入することにより行なわれる、請求項1から3のいずれか一項に記載の薄層転写方法。
- 第1の材料の熱膨張率が、第2の材料および第3の材料の各熱膨張率と少なくとも10%だけ異なる、請求項1から4のいずれか一項に記載の薄層転写方法。
- 第2の材料の熱膨張率が、第3の材料の熱膨張率と10%未満だけ異なる、請求項1から5のいずれか一項に記載の薄層転写方法。
- 第2の材料が、第3の材料と同一である、請求項6に記載の薄層転写方法。
- 第2の支持体(6、10)に取り付けられた層(3)の厚みが、第2の支持体(6、10)の厚みの15%未満である、請求項1から7のいずれか一項に記載の薄層転写方法。
- 第2の材料が、シリコンである、請求項1から8のいずれか一項に記載の薄層転写方法。
- 第1の材料が、ゲルマニウムである、請求項1から9のいずれか一項に記載の薄層転写方法。
- 層の厚みが、1μm〜50μmである、請求項1から10のいずれか一項に記載の薄層転写方法。
- 第1の材料のバルクプレート(2)を第2の支持体(6、8)に接合する予備ステップを含む、請求項1から11のいずれか一項に記載の薄層転写方法。
- 接合する予備ステップが、100℃〜200℃の温度で行なわれる、請求項12に記載の薄層転写方法。
- 第2の支持体(6、10)に取り付けられた層(3)を得るために、前記第1の材料のバルクプレート(2)を薄くするステップを含む、請求項12または13に記載の薄層転写方法。
- 破断後に第2の支持体(6)に取り付けられた残存する層(3)の部分(20)上に第1の材料をエピタキシャル堆積するステップを含む、請求項1から14のいずれか一項に記載の薄層転写方法。
- エピタキシャル層内に埋設され弱められた領域を形成するステップと、
エピタキシャル層を第3の支持体に接合するステップと、
弱められた領域においてエピタキシャル層を破断するステップとを含む、請求項15に記載の薄層転写方法。 - 第2の支持体に取り付けられた層が、完全にバルク基板から得られる、請求項1から16のいずれか一項に記載の薄層転写方法。
- 第2の支持体に取り付けられた層が、第1の材料のエピタキシャル層を含む、請求項1から17のいずれか一項に記載の薄層転写方法。
- 第2の支持体に取り付けられた層が、第4の材料のエピタキシャル層の結晶構造が第1の材料によって付与されるような厚みの第4の材料のエピタキシャル層を含む、請求項18に記載の薄層転写方法。
- 停止層として第4の材料のエピタキシャル層を使用して、破断後の第1の材料のエピタキシャル層を取り除くステップを含む、請求項18に記載の薄層転写方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0508555A FR2889887B1 (fr) | 2005-08-16 | 2005-08-16 | Procede de report d'une couche mince sur un support |
FR0508555 | 2005-08-16 | ||
PCT/FR2006/001945 WO2007020351A1 (fr) | 2005-08-16 | 2006-08-11 | Procédé de report d'une couche mince sur un support |
Publications (3)
Publication Number | Publication Date |
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JP2009504392A true JP2009504392A (ja) | 2009-02-05 |
JP2009504392A5 JP2009504392A5 (ja) | 2010-10-21 |
JP5258564B2 JP5258564B2 (ja) | 2013-08-07 |
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JP2008526524A Expired - Fee Related JP5258564B2 (ja) | 2005-08-16 | 2006-08-11 | 支持体上に薄膜を転写する方法 |
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Country | Link |
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US (1) | US8142593B2 (ja) |
EP (1) | EP1922752B1 (ja) |
JP (1) | JP5258564B2 (ja) |
FR (1) | FR2889887B1 (ja) |
WO (1) | WO2007020351A1 (ja) |
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FR2910179B1 (fr) | 2006-12-19 | 2009-03-13 | Commissariat Energie Atomique | PROCEDE DE FABRICATION DE COUCHES MINCES DE GaN PAR IMPLANTATION ET RECYCLAGE D'UN SUBSTRAT DE DEPART |
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FR2947098A1 (fr) * | 2009-06-18 | 2010-12-24 | Commissariat Energie Atomique | Procede de transfert d'une couche mince sur un substrat cible ayant un coefficient de dilatation thermique different de celui de la couche mince |
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Also Published As
Publication number | Publication date |
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FR2889887A1 (fr) | 2007-02-23 |
US20090120568A1 (en) | 2009-05-14 |
FR2889887B1 (fr) | 2007-11-09 |
JP5258564B2 (ja) | 2013-08-07 |
EP1922752A1 (fr) | 2008-05-21 |
EP1922752B1 (fr) | 2015-11-04 |
US8142593B2 (en) | 2012-03-27 |
WO2007020351A1 (fr) | 2007-02-22 |
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