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EP0864203A4 - Tampon cmos de commutation de niveau de haute tension - Google Patents

Tampon cmos de commutation de niveau de haute tension

Info

Publication number
EP0864203A4
EP0864203A4 EP97943473A EP97943473A EP0864203A4 EP 0864203 A4 EP0864203 A4 EP 0864203A4 EP 97943473 A EP97943473 A EP 97943473A EP 97943473 A EP97943473 A EP 97943473A EP 0864203 A4 EP0864203 A4 EP 0864203A4
Authority
EP
European Patent Office
Prior art keywords
high voltage
voltage level
level shifting
cmos buffer
shifting cmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP97943473A
Other languages
German (de)
English (en)
Other versions
EP0864203A1 (fr
Inventor
Richard L Hull
Randy L Yach
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microchip Technology Inc
Original Assignee
Microchip Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microchip Technology Inc filed Critical Microchip Technology Inc
Publication of EP0864203A1 publication Critical patent/EP0864203A1/fr
Publication of EP0864203A4 publication Critical patent/EP0864203A4/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507Interface arrangements
    • H03K19/018521Interface arrangements of complementary type, e.g. CMOS
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/10Modifications for increasing the maximum permissible switched voltage
    • H03K17/102Modifications for increasing the maximum permissible switched voltage in field-effect transistor switches
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356104Bistable circuits using complementary field-effect transistors
    • H03K3/356113Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Read Only Memory (AREA)
  • Logic Circuits (AREA)
EP97943473A 1996-10-01 1997-09-25 Tampon cmos de commutation de niveau de haute tension Withdrawn EP0864203A4 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US72392596A 1996-10-01 1996-10-01
US723925 1996-10-01
PCT/US1997/016922 WO1998015060A1 (fr) 1996-10-01 1997-09-25 Tampon cmos de commutation de niveau de haute tension

Publications (2)

Publication Number Publication Date
EP0864203A1 EP0864203A1 (fr) 1998-09-16
EP0864203A4 true EP0864203A4 (fr) 2001-02-07

Family

ID=24908277

Family Applications (1)

Application Number Title Priority Date Filing Date
EP97943473A Withdrawn EP0864203A4 (fr) 1996-10-01 1997-09-25 Tampon cmos de commutation de niveau de haute tension

Country Status (5)

Country Link
EP (1) EP0864203A4 (fr)
JP (1) JPH11500896A (fr)
KR (1) KR19990071743A (fr)
TW (1) TW357361B (fr)
WO (1) WO1998015060A1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001144603A (ja) 1999-11-18 2001-05-25 Oki Micro Design Co Ltd レベルシフタ回路およびそれを含むデータ出力回路
KR100585168B1 (ko) * 2004-12-22 2006-06-02 삼성전자주식회사 다중경로 입력버퍼회로
JP5043102B2 (ja) * 2006-06-02 2012-10-10 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ ヘルスケア装置用コグニティブ監視無線デバイス
JP5110247B2 (ja) 2006-07-31 2012-12-26 ミツミ電機株式会社 半導体集積回路装置
US10263621B2 (en) 2017-03-24 2019-04-16 Taiwan Semiconductor Manufacturing Company Limited Level shifter with improved voltage difference

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5175512A (en) * 1992-02-28 1992-12-29 Avasem Corporation High speed, power supply independent CMOS voltage controlled ring oscillator with level shifting circuit
US5243236A (en) * 1991-12-31 1993-09-07 Intel Corporation High voltage CMOS switch with protection against diffusion to well reverse junction breakdown
EP0599273A2 (fr) * 1992-11-25 1994-06-01 Sony Corporation Circuit de conversion du niveau d'une entrée de faible amplitude
WO1995019658A1 (fr) * 1994-01-18 1995-07-20 Vivid Semiconductor, Inc Circuit integre alimente par des sources d'energie differentes
EP0696850A1 (fr) * 1994-08-10 1996-02-14 Cirrus Logic, Inc. Convertisseur de niveau de tension numérique et systèmes utilisant ce convertisseur
JPH0851351A (ja) * 1994-08-09 1996-02-20 Toshiba Corp レベル変換回路
US5559464A (en) * 1993-07-06 1996-09-24 Seiko Epson Corporation Signal voltage level conversion circuit and output buffer circuit

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4845381A (en) * 1987-10-01 1989-07-04 Vlsi Technology, Inc. Voltage level shifting circuit
DE3934303C2 (de) * 1988-10-15 2001-01-25 Sony Corp Adreßdecoder für nichtflüchtige Speicher
US4978870A (en) * 1989-07-19 1990-12-18 Industrial Technology Research Institute CMOS digital level shifter circuit
US5157280A (en) * 1991-02-13 1992-10-20 Texas Instruments Incorporated Switch for selectively coupling a power supply to a power bus

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5243236A (en) * 1991-12-31 1993-09-07 Intel Corporation High voltage CMOS switch with protection against diffusion to well reverse junction breakdown
US5175512A (en) * 1992-02-28 1992-12-29 Avasem Corporation High speed, power supply independent CMOS voltage controlled ring oscillator with level shifting circuit
EP0599273A2 (fr) * 1992-11-25 1994-06-01 Sony Corporation Circuit de conversion du niveau d'une entrée de faible amplitude
US5559464A (en) * 1993-07-06 1996-09-24 Seiko Epson Corporation Signal voltage level conversion circuit and output buffer circuit
WO1995019658A1 (fr) * 1994-01-18 1995-07-20 Vivid Semiconductor, Inc Circuit integre alimente par des sources d'energie differentes
JPH0851351A (ja) * 1994-08-09 1996-02-20 Toshiba Corp レベル変換回路
US5825205A (en) * 1994-08-09 1998-10-20 Kabushiki Kaisha Toshiba Level-shift circuit for driving word lines of negative gate erasable type flash memory
EP0696850A1 (fr) * 1994-08-10 1996-02-14 Cirrus Logic, Inc. Convertisseur de niveau de tension numérique et systèmes utilisant ce convertisseur

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 1996, no. 06 28 June 1996 (1996-06-28) *
See also references of WO9815060A1 *

Also Published As

Publication number Publication date
WO1998015060A1 (fr) 1998-04-09
EP0864203A1 (fr) 1998-09-16
KR19990071743A (ko) 1999-09-27
JPH11500896A (ja) 1999-01-19
TW357361B (en) 1999-05-01

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Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

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Effective date: 19980625

AK Designated contracting states

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Designated state(s): CH DE ES FR GB IT LI NL SE

RIN1 Information on inventor provided before grant (corrected)

Inventor name: YACH, RANDY, L.

Inventor name: HULL, RICHARD, L.

A4 Supplementary search report drawn up and despatched

Effective date: 20001229

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Effective date: 20030401