EP0864203A4 - High voltage level shifting cmos buffer - Google Patents
High voltage level shifting cmos bufferInfo
- Publication number
- EP0864203A4 EP0864203A4 EP97943473A EP97943473A EP0864203A4 EP 0864203 A4 EP0864203 A4 EP 0864203A4 EP 97943473 A EP97943473 A EP 97943473A EP 97943473 A EP97943473 A EP 97943473A EP 0864203 A4 EP0864203 A4 EP 0864203A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- high voltage
- voltage level
- level shifting
- cmos buffer
- shifting cmos
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/10—Modifications for increasing the maximum permissible switched voltage
- H03K17/102—Modifications for increasing the maximum permissible switched voltage in field-effect transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
- H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Read Only Memory (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US72392596A | 1996-10-01 | 1996-10-01 | |
US723925 | 1996-10-01 | ||
PCT/US1997/016922 WO1998015060A1 (en) | 1996-10-01 | 1997-09-25 | High voltage level shifting cmos buffer |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0864203A1 EP0864203A1 (en) | 1998-09-16 |
EP0864203A4 true EP0864203A4 (en) | 2001-02-07 |
Family
ID=24908277
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP97943473A Withdrawn EP0864203A4 (en) | 1996-10-01 | 1997-09-25 | High voltage level shifting cmos buffer |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0864203A4 (en) |
JP (1) | JPH11500896A (en) |
KR (1) | KR19990071743A (en) |
TW (1) | TW357361B (en) |
WO (1) | WO1998015060A1 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001144603A (en) * | 1999-11-18 | 2001-05-25 | Oki Micro Design Co Ltd | Level shifter circuit and data output circuit including it |
KR100585168B1 (en) * | 2004-12-22 | 2006-06-02 | 삼성전자주식회사 | Multipath Input Buffer Circuit |
WO2007143402A2 (en) * | 2006-06-02 | 2007-12-13 | Koninklijke Philips Electronics, N.V. | Cognitive monitoring wireless device for healthcare equipment |
JP5110247B2 (en) | 2006-07-31 | 2012-12-26 | ミツミ電機株式会社 | Semiconductor integrated circuit device |
US10263621B2 (en) | 2017-03-24 | 2019-04-16 | Taiwan Semiconductor Manufacturing Company Limited | Level shifter with improved voltage difference |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5175512A (en) * | 1992-02-28 | 1992-12-29 | Avasem Corporation | High speed, power supply independent CMOS voltage controlled ring oscillator with level shifting circuit |
US5243236A (en) * | 1991-12-31 | 1993-09-07 | Intel Corporation | High voltage CMOS switch with protection against diffusion to well reverse junction breakdown |
EP0599273A2 (en) * | 1992-11-25 | 1994-06-01 | Sony Corporation | Circuit for converting level of low-amplitude input |
WO1995019658A1 (en) * | 1994-01-18 | 1995-07-20 | Vivid Semiconductor, Inc | Integrated circuit operating from different power supplies |
EP0696850A1 (en) * | 1994-08-10 | 1996-02-14 | Cirrus Logic, Inc. | Digital voltage level shifters and systems using the same |
JPH0851351A (en) * | 1994-08-09 | 1996-02-20 | Toshiba Corp | Level converter circuit |
US5559464A (en) * | 1993-07-06 | 1996-09-24 | Seiko Epson Corporation | Signal voltage level conversion circuit and output buffer circuit |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4845381A (en) * | 1987-10-01 | 1989-07-04 | Vlsi Technology, Inc. | Voltage level shifting circuit |
GB2226727B (en) * | 1988-10-15 | 1993-09-08 | Sony Corp | Address decoder circuits for non-volatile memories |
US4978870A (en) * | 1989-07-19 | 1990-12-18 | Industrial Technology Research Institute | CMOS digital level shifter circuit |
US5157280A (en) * | 1991-02-13 | 1992-10-20 | Texas Instruments Incorporated | Switch for selectively coupling a power supply to a power bus |
-
1997
- 1997-09-25 JP JP10516616A patent/JPH11500896A/en active Pending
- 1997-09-25 WO PCT/US1997/016922 patent/WO1998015060A1/en not_active Application Discontinuation
- 1997-09-25 EP EP97943473A patent/EP0864203A4/en not_active Withdrawn
- 1997-09-25 KR KR1019980704021A patent/KR19990071743A/en not_active Application Discontinuation
- 1997-09-30 TW TW086114170A patent/TW357361B/en active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5243236A (en) * | 1991-12-31 | 1993-09-07 | Intel Corporation | High voltage CMOS switch with protection against diffusion to well reverse junction breakdown |
US5175512A (en) * | 1992-02-28 | 1992-12-29 | Avasem Corporation | High speed, power supply independent CMOS voltage controlled ring oscillator with level shifting circuit |
EP0599273A2 (en) * | 1992-11-25 | 1994-06-01 | Sony Corporation | Circuit for converting level of low-amplitude input |
US5559464A (en) * | 1993-07-06 | 1996-09-24 | Seiko Epson Corporation | Signal voltage level conversion circuit and output buffer circuit |
WO1995019658A1 (en) * | 1994-01-18 | 1995-07-20 | Vivid Semiconductor, Inc | Integrated circuit operating from different power supplies |
JPH0851351A (en) * | 1994-08-09 | 1996-02-20 | Toshiba Corp | Level converter circuit |
US5825205A (en) * | 1994-08-09 | 1998-10-20 | Kabushiki Kaisha Toshiba | Level-shift circuit for driving word lines of negative gate erasable type flash memory |
EP0696850A1 (en) * | 1994-08-10 | 1996-02-14 | Cirrus Logic, Inc. | Digital voltage level shifters and systems using the same |
Non-Patent Citations (2)
Title |
---|
PATENT ABSTRACTS OF JAPAN vol. 1996, no. 06 28 June 1996 (1996-06-28) * |
See also references of WO9815060A1 * |
Also Published As
Publication number | Publication date |
---|---|
TW357361B (en) | 1999-05-01 |
WO1998015060A1 (en) | 1998-04-09 |
KR19990071743A (en) | 1999-09-27 |
EP0864203A1 (en) | 1998-09-16 |
JPH11500896A (en) | 1999-01-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
17P | Request for examination filed |
Effective date: 19980625 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): CH DE ES FR GB IT LI NL SE |
|
RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: YACH, RANDY, L. Inventor name: HULL, RICHARD, L. |
|
A4 | Supplementary search report drawn up and despatched |
Effective date: 20001229 |
|
AK | Designated contracting states |
Kind code of ref document: A4 Designated state(s): CH DE ES FR GB IT LI NL SE |
|
RIC1 | Information provided on ipc code assigned before grant |
Free format text: 7H 03K 19/185 A, 7H 03K 19/0948 B, 7H 03K 3/356 B, 7H 03K 17/10 B |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
18D | Application deemed to be withdrawn |
Effective date: 20030401 |