[go: up one dir, main page]

DE69419219D1 - Leiterplatte und Verfahren zur Herstellung solcher Leiterplatten - Google Patents

Leiterplatte und Verfahren zur Herstellung solcher Leiterplatten

Info

Publication number
DE69419219D1
DE69419219D1 DE69419219T DE69419219T DE69419219D1 DE 69419219 D1 DE69419219 D1 DE 69419219D1 DE 69419219 T DE69419219 T DE 69419219T DE 69419219 T DE69419219 T DE 69419219T DE 69419219 D1 DE69419219 D1 DE 69419219D1
Authority
DE
Germany
Prior art keywords
printed circuit
producing
circuit board
circuit boards
boards
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69419219T
Other languages
English (en)
Other versions
DE69419219T2 (de
Inventor
Yuichi Yamamoto
Yoshizumi Sato
Tomohisa Motomura
Hiroshi Hamano
Yasushi Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dai Nippon Printing Co Ltd
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP21975193A external-priority patent/JP3474894B2/ja
Priority claimed from JP22478593A external-priority patent/JP3516965B2/ja
Priority claimed from JP22610693A external-priority patent/JP3474896B2/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69419219D1 publication Critical patent/DE69419219D1/de
Publication of DE69419219T2 publication Critical patent/DE69419219T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H05K3/4658—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern characterized by laminating a prefabricated metal foil pattern, e.g. by transfer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/096—Vertically aligned vias, holes or stacked vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09627—Special connections between adjacent vias, not for grounding vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09645—Patterning on via walls; Plural lands around one hole
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/068—Features of the lamination press or of the lamination process, e.g. using special separator sheets
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1189—Pressing leads, bumps or a die through an insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15—Position of the PCB during processing
    • H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y10T156/1089—Methods of surface bonding and/or assembly therefor of discrete laminae to single face of additional lamina
    • Y10T156/109—Embedding of laminae within face of additional laminae
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147—Assembling terminal to base
    • Y10T29/49151—Assembling terminal to base by deforming or shaping
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49204—Contact or terminal manufacturing
    • Y10T29/49208—Contact or terminal manufacturing by assembling plural parts
    • Y10T29/49222—Contact or terminal manufacturing by assembling plural parts forming array of contacts or terminals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
DE69419219T 1993-09-03 1994-08-31 Leiterplatte und Verfahren zur Herstellung solcher Leiterplatten Expired - Lifetime DE69419219T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP21975193A JP3474894B2 (ja) 1993-09-03 1993-09-03 印刷配線板およびその製造方法
JP22478593A JP3516965B2 (ja) 1993-09-09 1993-09-09 プリント配線板
JP22610693A JP3474896B2 (ja) 1993-09-10 1993-09-10 印刷配線板およびその製造方法

Publications (2)

Publication Number Publication Date
DE69419219D1 true DE69419219D1 (de) 1999-07-29
DE69419219T2 DE69419219T2 (de) 2000-01-05

Family

ID=27330344

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69419219T Expired - Lifetime DE69419219T2 (de) 1993-09-03 1994-08-31 Leiterplatte und Verfahren zur Herstellung solcher Leiterplatten

Country Status (5)

Country Link
US (2) US5736681A (de)
EP (1) EP0647090B1 (de)
KR (1) KR950010719A (de)
DE (1) DE69419219T2 (de)
TW (1) TW272350B (de)

Families Citing this family (100)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3474937B2 (ja) * 1994-10-07 2003-12-08 株式会社東芝 実装用配線板の製造方法、半導体パッケージの製造方法
US6252179B1 (en) * 1995-04-27 2001-06-26 International Business Machines Corporation Electronic package on metal carrier
WO1997019579A1 (fr) * 1995-11-17 1997-05-29 Kabushiki Kaisha Toshiba Tableau de connexion multicouches, materiau prefabrique pour ce tableau, procede de fabrication de ce dernier groupement de composants electroniques et procede de formation de connexions verticales conductrices
US6147870A (en) * 1996-01-05 2000-11-14 Honeywell International Inc. Printed circuit assembly having locally enhanced wiring density
US5839188A (en) * 1996-01-05 1998-11-24 Alliedsignal Inc. Method of manufacturing a printed circuit assembly
DE19618100A1 (de) * 1996-05-06 1997-11-13 Siemens Ag Verfahren zur Herstellung einer Mehrlagen-Verbundstruktur mit elektrisch leitenden Verbindungen
US5873161A (en) * 1996-07-23 1999-02-23 Minnesota Mining And Manufacturing Company Method of making a Z axis interconnect circuit
KR100371877B1 (ko) * 1997-04-16 2003-02-11 가부시끼가이샤 도시바 배선기판과 배선기판의 제조방법 및 반도체 패키지
JP3901798B2 (ja) * 1997-06-12 2007-04-04 大日本印刷株式会社 プリント配線板の製造装置
US6300575B1 (en) * 1997-08-25 2001-10-09 International Business Machines Corporation Conductor interconnect with dendrites through film
JP3119230B2 (ja) * 1998-03-03 2000-12-18 日本電気株式会社 樹脂フィルムおよびこれを用いた電子部品の接続方法
JP2000332369A (ja) * 1999-05-25 2000-11-30 Mitsui Mining & Smelting Co Ltd プリント回路板及びその製造方法
US6915566B2 (en) * 1999-03-01 2005-07-12 Texas Instruments Incorporated Method of fabricating flexible circuits for integrated circuit interconnections
US6555762B2 (en) * 1999-07-01 2003-04-29 International Business Machines Corporation Electronic package having substrate with electrically conductive through holes filled with polymer and conductive composition
WO2001006558A1 (fr) * 1999-07-16 2001-01-25 Matsushita Electric Industrial Co., Ltd. Emballage de dispositifs a semi-conducteurs et leur procede de fabrication
JP3183653B2 (ja) * 1999-08-26 2001-07-09 ソニーケミカル株式会社 フレキシブル基板
US6583364B1 (en) * 1999-08-26 2003-06-24 Sony Chemicals Corp. Ultrasonic manufacturing apparatuses, multilayer flexible wiring boards and processes for manufacturing multilayer flexible wiring boards
US7446030B2 (en) * 1999-08-27 2008-11-04 Shocking Technologies, Inc. Methods for fabricating current-carrying structures using voltage switchable dielectric materials
WO2001017320A1 (en) * 1999-08-27 2001-03-08 Lex Kosowsky Current carrying structure using voltage switchable dielectric material
US20100044080A1 (en) * 1999-08-27 2010-02-25 Lex Kosowsky Metal Deposition
US20100044079A1 (en) * 1999-08-27 2010-02-25 Lex Kosowsky Metal Deposition
US7695644B2 (en) * 1999-08-27 2010-04-13 Shocking Technologies, Inc. Device applications for voltage switchable dielectric material having high aspect ratio particles
US20080035370A1 (en) * 1999-08-27 2008-02-14 Lex Kosowsky Device applications for voltage switchable dielectric material having conductive or semi-conductive organic material
US7825491B2 (en) * 2005-11-22 2010-11-02 Shocking Technologies, Inc. Light-emitting device using voltage switchable dielectric material
TW506242B (en) * 1999-12-14 2002-10-11 Matsushita Electric Ind Co Ltd Multi-layered printed circuit board and method for manufacturing the same
US7467742B1 (en) * 2000-02-24 2008-12-23 International Business Machines Corporation Electrically conducting adhesives for via fill applications
JP2001251061A (ja) * 2000-03-02 2001-09-14 Sony Corp 多層型プリント配線基板
JP4322402B2 (ja) * 2000-06-22 2009-09-02 大日本印刷株式会社 プリント配線基板及びその製造方法
US20030022553A1 (en) * 2000-08-03 2003-01-30 Bel-Fuse, Inc. Multiport RJ connector
JP3407737B2 (ja) * 2000-12-14 2003-05-19 株式会社デンソー 多層基板の製造方法およびその製造方法によって形成される多層基板
EP2315510A3 (de) * 2001-06-05 2012-05-02 Dai Nippon Printing Co., Ltd. Leiterplatte mit passiven Elementen
US20030024111A1 (en) * 2001-08-02 2003-02-06 Aem, Inc. Dot penetration method for inter-layer connections of electronic components
TW550997B (en) * 2001-10-18 2003-09-01 Matsushita Electric Ind Co Ltd Module with built-in components and the manufacturing method thereof
US20030127727A1 (en) * 2002-01-09 2003-07-10 Nitto Denko Corporation Thermally conductive sheet and semiconductor device using same
JP3998984B2 (ja) * 2002-01-18 2007-10-31 富士通株式会社 回路基板及びその製造方法
JP4045143B2 (ja) * 2002-02-18 2008-02-13 テセラ・インターコネクト・マテリアルズ，インコーポレイテッド 配線膜間接続用部材の製造方法及び多層配線基板の製造方法
JP2003347741A (ja) 2002-05-30 2003-12-05 Taiyo Yuden Co Ltd 複合多層基板およびそれを用いたモジュール
CA2405368C (en) * 2002-09-26 2011-06-21 Crosslink Technology Inc. Method of adhering a material to another material and product produced by the method
JP3902752B2 (ja) * 2002-10-01 2007-04-11 日本メクトロン株式会社 多層回路基板
KR101046077B1 (ko) * 2002-10-08 2011-07-01 다이니폰 인사츠 가부시키가이샤 부품 내장 배선판, 부품 내장 배선판의 제조 방법
JP3879651B2 (ja) * 2002-10-21 2007-02-14 ソニー株式会社 積層配線基板、タッチパネル及びこれらの製造方法
KR100489820B1 (ko) * 2002-11-19 2005-05-16 삼성전기주식회사 세라믹 다층기판 및 그 제조방법
KR100495211B1 (ko) 2002-11-25 2005-06-14 삼성전기주식회사 세라믹 다층기판 및 그 제조방법
DE10304867B4 (de) * 2003-02-06 2008-06-19 Hubertus Dipl.-Ing. Hein Verfahren und Vorrichtung zur Herstellung einer Leiterplattenanordnung
US20050176209A1 (en) * 2003-02-14 2005-08-11 Rf Micro Devices, Inc. Embedded passive components
ATE391404T1 (de) * 2003-05-09 2008-04-15 Widex As Verfahren zum herstellen eines trägerelements für ein hörgerät und trägerelement für ein hörgerät
US20050104374A1 (en) * 2003-11-17 2005-05-19 Steur Gunnar V.D. Pull-out resistant compression fitting for fluid lines
JP4597686B2 (ja) * 2004-02-24 2010-12-15 日本メクトロン株式会社 多層フレキシブル回路基板の製造方法
JP4574288B2 (ja) * 2004-04-09 2010-11-04 大日本印刷株式会社 リジッド−フレキシブル基板の製造方法
US7100277B2 (en) * 2004-07-01 2006-09-05 E. I. Du Pont De Nemours And Company Methods of forming printed circuit boards having embedded thick film capacitors
JP4287458B2 (ja) * 2005-11-16 2009-07-01 サムソン エレクトロ−メカニックス カンパニーリミテッド． ペーストバンプを用いた印刷回路基板およびその製造方法
CN101496167A (zh) 2005-11-22 2009-07-29 肖克科技有限公司 用于过电压保护的包括电压可变换材料的半导体器件
US20100263200A1 (en) * 2005-11-22 2010-10-21 Lex Kosowsky Wireless communication device using voltage switchable dielectric material
KR100722739B1 (ko) * 2005-11-29 2007-05-30 삼성전기주식회사 페이스트 범프를 이용한 코어기판, 다층 인쇄회로기판 및코어기판 제조방법
JP4568215B2 (ja) * 2005-11-30 2010-10-27 三洋電機株式会社 回路装置および回路装置の製造方法
US7631423B2 (en) * 2006-02-13 2009-12-15 Sanmina-Sci Corporation Method and process for embedding electrically conductive elements in a dielectric layer
KR100757910B1 (ko) * 2006-07-06 2007-09-11 삼성전기주식회사 매립패턴기판 및 그 제조방법
US7981325B2 (en) * 2006-07-29 2011-07-19 Shocking Technologies, Inc. Electronic device for voltage switchable dielectric material having high aspect ratio particles
US20080029405A1 (en) * 2006-07-29 2008-02-07 Lex Kosowsky Voltage switchable dielectric material having conductive or semi-conductive organic material
US20080032049A1 (en) * 2006-07-29 2008-02-07 Lex Kosowsky Voltage switchable dielectric material having high aspect ratio particles
DE102006036728B4 (de) * 2006-08-05 2017-01-19 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zur elektrischen Kontaktierung mikroelektronischer Bauelemente auf einer Leiterplatte
KR100796523B1 (ko) * 2006-08-17 2008-01-21 삼성전기주식회사 전자부품 내장형 다층 인쇄배선기판 및 그 제조방법
KR100761706B1 (ko) * 2006-09-06 2007-09-28 삼성전기주식회사 인쇄회로기판 제조방법
WO2008032770A1 (fr) * 2006-09-15 2008-03-20 Mitsui Mining & Smelting Co., Ltd. Plaqué composite métallique pour la fabrication d'un tableau de connexion flexible et tableau de connexions flexible
KR20090055017A (ko) 2006-09-24 2009-06-01 쇼킹 테크놀로지스 인코포레이티드 스탭 전압 응답을 가진 전압 가변 유전 재료를 위한 조성물및 그 제조 방법
US20120119168A9 (en) * 2006-11-21 2012-05-17 Robert Fleming Voltage switchable dielectric materials with low band gap polymer binder or composite
JP4947137B2 (ja) * 2007-03-22 2012-06-06 株式会社村田製作所 電子写真印刷法によるビアホール導体の形成方法
US7793236B2 (en) * 2007-06-13 2010-09-07 Shocking Technologies, Inc. System and method for including protective voltage switchable dielectric material in the design or simulation of substrate devices
KR100867148B1 (ko) * 2007-09-28 2008-11-06 삼성전기주식회사 인쇄회로기판 및 그 제조방법
US20090168391A1 (en) * 2007-12-27 2009-07-02 Kouichi Saitou Substrate for mounting device and method for producing the same, semiconductor module and method for producing the same, and portable apparatus provided with the same
US8206614B2 (en) * 2008-01-18 2012-06-26 Shocking Technologies, Inc. Voltage switchable dielectric material having bonded particle constituents
US8309864B2 (en) * 2008-01-31 2012-11-13 Sanyo Electric Co., Ltd. Device mounting board and manufacturing method therefor, and semiconductor module
JP4876272B2 (ja) * 2008-04-02 2012-02-15 サムソン エレクトロ−メカニックス カンパニーリミテッド． 印刷回路基板及びその製造方法
US8203421B2 (en) 2008-04-14 2012-06-19 Shocking Technologies, Inc. Substrate device or package using embedded layer of voltage switchable dielectric material in a vertical switching configuration
KR100990576B1 (ko) * 2008-05-26 2010-10-29 삼성전기주식회사 미세 최외층 회로패턴을 갖는 인쇄회로기판 및 그 제조방법
US20100047535A1 (en) * 2008-08-22 2010-02-25 Lex Kosowsky Core layer structure having voltage switchable dielectric material
WO2010033635A1 (en) * 2008-09-17 2010-03-25 Shocking Technologies, Inc. Voltage switchable dielectric material containing boron compound
US9208931B2 (en) * 2008-09-30 2015-12-08 Littelfuse, Inc. Voltage switchable dielectric material containing conductor-on-conductor core shelled particles
JP2012504870A (ja) * 2008-09-30 2012-02-23 ショッキング テクノロジーズ インコーポレイテッド 導電コアシェル粒子を含有する電圧で切替可能な誘電体材料
US8362871B2 (en) * 2008-11-05 2013-01-29 Shocking Technologies, Inc. Geometric and electric field considerations for including transient protective material in substrate devices
US8399773B2 (en) 2009-01-27 2013-03-19 Shocking Technologies, Inc. Substrates having voltage switchable dielectric materials
US9226391B2 (en) 2009-01-27 2015-12-29 Littelfuse, Inc. Substrates having voltage switchable dielectric materials
US8272123B2 (en) 2009-01-27 2012-09-25 Shocking Technologies, Inc. Substrates having voltage switchable dielectric materials
KR101679099B1 (ko) 2009-03-26 2016-11-23 쇼킹 테크놀로지스 인코포레이티드 전압 스위칭형 유전 물질을 갖는 소자
WO2010140335A1 (ja) 2009-06-01 2010-12-09 株式会社村田製作所 基板の製造方法
US9053844B2 (en) * 2009-09-09 2015-06-09 Littelfuse, Inc. Geometric configuration or alignment of protective material in a gap structure for electrical devices
US20110147069A1 (en) * 2009-12-18 2011-06-23 International Business Machines Corporation Multi-tiered Circuit Board and Method of Manufacture
US20110198544A1 (en) * 2010-02-18 2011-08-18 Lex Kosowsky EMI Voltage Switchable Dielectric Materials Having Nanophase Materials
US9320135B2 (en) * 2010-02-26 2016-04-19 Littelfuse, Inc. Electric discharge protection for surface mounted and embedded components
US9224728B2 (en) * 2010-02-26 2015-12-29 Littelfuse, Inc. Embedded protection against spurious electrical events
US9082622B2 (en) 2010-02-26 2015-07-14 Littelfuse, Inc. Circuit elements comprising ferroic materials
JP2011187771A (ja) * 2010-03-10 2011-09-22 Omron Corp 電極部の構造
CN103517558B (zh) * 2012-06-20 2017-03-22 碁鼎科技秦皇岛有限公司 封装基板制作方法
AT514074B1 (de) 2013-04-02 2014-10-15 Austria Tech & System Tech Verfahren zum Herstellen eines Leiterplattenelements
TWI527177B (zh) * 2013-12-18 2016-03-21 相豐科技股份有限公司 晶片構件與晶片封裝體
EP3153617B1 (de) * 2015-10-08 2018-07-04 Groz-Beckert KG Nähmaschinennadel und nähverfahren
CN110691500B (zh) * 2018-07-06 2024-04-26 广州方邦电子股份有限公司 电磁屏蔽膜、线路板及电磁屏蔽膜的制备方法
US11432402B2 (en) * 2018-10-11 2022-08-30 Microchip Technology Caldicot Limited Flipped-conductor-patch lamination for ultra fine-line substrate creation
JP7457498B2 (ja) * 2019-12-25 2024-03-28 ミャント インコーポレイテッド 電気コネクタ
KR20220038201A (ko) 2020-09-18 2022-03-28 삼성디스플레이 주식회사 접착 부재, 표시 장치 및 표시 장치 제조 방법

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3079672A (en) * 1956-08-17 1963-03-05 Western Electric Co Methods of making electrical circuit boards
US3488429A (en) * 1969-02-24 1970-01-06 Gerald Boucher Multilayer printed circuits
NL7110944A (de) * 1970-08-24 1972-02-28
GB1353671A (en) * 1971-06-10 1974-05-22 Int Computers Ltd Methods of forming circuit interconnections
US3881799A (en) * 1972-09-11 1975-05-06 George H Elliott Resilient multi-micro point metallic junction
US4383363A (en) * 1977-09-01 1983-05-17 Sharp Kabushiki Kaisha Method of making a through-hole connector
DE3786600T2 (de) * 1986-05-30 1993-11-04 Furukawa Electric Co Ltd Mehrschichtige gedruckte schaltung und verfahren zu ihrer herstellung.
US4763403A (en) * 1986-12-16 1988-08-16 Eastman Kodak Company Method of making an electronic component
US4967314A (en) * 1988-03-28 1990-10-30 Prime Computer Inc. Circuit board construction
JP2767645B2 (ja) * 1990-03-07 1998-06-18 富士通株式会社 多層配線基板の製造方法
US5474629A (en) * 1990-12-15 1995-12-12 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a liquid crystal device
DE9102817U1 (de) * 1991-03-07 1991-09-05 Andus Electronic GmbH Leiterplattentechnik, 10997 Berlin Innenliegende Verbindung zum Aufbau von Multilayerschaltungen
US5245135A (en) * 1992-04-20 1993-09-14 Hughes Aircraft Company Stackable high density interconnection mechanism (SHIM)
CA2109687A1 (en) * 1993-01-26 1995-05-23 Walter Schmidt Method for the through plating of conductor foils
US5600103A (en) * 1993-04-16 1997-02-04 Kabushiki Kaisha Toshiba Circuit devices and fabrication method of the same
US5401913A (en) * 1993-06-08 1995-03-28 Minnesota Mining And Manufacturing Company Electrical interconnections between adjacent circuit board layers of a multi-layer circuit board
US5527998A (en) * 1993-10-22 1996-06-18 Sheldahl, Inc. Flexible multilayer printed circuit boards and methods of manufacture
US5431571A (en) * 1993-11-22 1995-07-11 W. L. Gore & Associates, Inc. Electrical conductive polymer matrix

Also Published As

Publication number Publication date
DE69419219T2 (de) 2000-01-05
EP0647090A1 (de) 1995-04-05
KR950010719A (ko) 1995-04-28
US5736681A (en) 1998-04-07
TW272350B (de) 1996-03-11
EP0647090B1 (de) 1999-06-23
US5865934A (en) 1999-02-02

Similar Documents

Publication Publication Date Title
DE69419219D1 (de) Leiterplatte und Verfahren zur Herstellung solcher Leiterplatten
DE69734947D1 (de) Verfahren zur Herstellung von mehrschichtigen Leiterplatten
DE69331511D1 (de) Zweiseitig gedruckte Leiterplatte, mehrschichtige Leiterplatte und Verfahren zur Herstellung
DE69418698D1 (de) Verfahren zur Herstellung von Leiterplatten
DE69412405D1 (de) Leiterplatte und Verfahren zu ihrer Herstellung
DE68909853D1 (de) Verfahren und Film zur Herstellung von gedruckten Schaltungsplatten.
DE69120869D1 (de) Mehrschichtige gedruckte Leiterplatte und Verfahren zu ihrer Herstellung
DE69939913D1 (de) Gedruckte Schaltungsplatte und Verfahren zur Herstellung
DE69215338D1 (de) Mehrschichtige Leiterplatte, Zwischenverbindungsteil und Verfahren zur Herstellung
DE69117381D1 (de) Mehrschichtleiterplatte und Verfahren zu ihrer Herstellung
DE69121501D1 (de) Mehrschichtige Leiterplatte und Verfahren zu ihrer Herstellung
DE69636010D1 (de) Gedruckte schaltungsplatte und verfahren zu deren herstellung
DE69631573D1 (de) Prepreg, Verfahren zur Herstellung und gedrucktes Leiterplattensubstrat und dessen Verwendung
DE69325936D1 (de) Verfahren zur Herstellung von Platten für gedruckte Schaltungen
DE69934050D1 (de) Gedruckte Leiterplatte und Verfahren zu deren Herstellung
DE69634284D1 (de) Verfahren zur Herstellung von mehrschichtigen Leiterplatten
DE69431828D1 (de) Verfahren zur Herstellung von gedruckten Schaltungskarten
DE69931212D1 (de) Leiterplatte und Verfahren zu deren Herstellung
DE69842092D1 (de) Verfahren zur Herstellung einer mehrschichtigen gedruckten Leiterplatte
DE69123120D1 (de) Verfahren zur Herstellung von gedruckten Leiterplatten
KR970700988A (ko) 다층 프린트 배선판 및 그 제조방법(multilayer printed wiring board and process for producing the same)
DE69225418D1 (de) Mehrlagen-Leiterplattenstruktur und Verfahren zur Herstellung mehrlagiger Konstruktionen
DE69627971D1 (de) Kupferfolie für Leiterplatte, Verfahren und Gegenstand zur Herstellung
DE69113537D1 (de) Verfahren und Vorrichtung zur Musterprüfung gedrukter Schaltungsplatten.
DE69737077D1 (de) Mehrschichtige Leiterplatten und Verfahren zu deren Herstellung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: DAI NIPPON PRINTING CO., LTD., TOKIO/TOKYO, JP

8328 Change in the person/name/address of the agent

Representative=s name: MEISSNER, BOLTE & PARTNER GBR, 80538 MUENCHEN