KR100722739B1 - 페이스트 범프를 이용한 코어기판, 다층 인쇄회로기판 및코어기판 제조방법 - Google Patents
페이스트 범프를 이용한 코어기판, 다층 인쇄회로기판 및코어기판 제조방법 Download PDFInfo
- Publication number
- KR100722739B1 KR100722739B1 KR1020050114696A KR20050114696A KR100722739B1 KR 100722739 B1 KR100722739 B1 KR 100722739B1 KR 1020050114696 A KR1020050114696 A KR 1020050114696A KR 20050114696 A KR20050114696 A KR 20050114696A KR 100722739 B1 KR100722739 B1 KR 100722739B1
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- South Korea
- Prior art keywords
- paste
- bump
- paste bump
- substrate
- insulating material
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4867—Applying pastes or inks, e.g. screen printing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
- H01L23/49883—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials the conductive materials containing organic materials or pastes, e.g. for thick films
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/063—Lamination of preperforated insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
페이스트 범프의 직경 | 절연재의 최대두께(PPG의 경우) |
150㎛ | 60㎛ 이하 |
130㎛ | 40㎛ 이하 |
80㎛ | 30㎛ 이하 |
Claims (16)
- 동박판에 페이스트 범프를 인쇄하고, 경화시키는 단계;상기 페이스트 범프가 절연재를 관통하도록 상기 동박판에 상기 절연재를 적층하여 페이스트 범프기판을 제조하는 단계;한 쌍의 상기 페이스트 범프기판을 상기 페이스트 범프가 서로 대향하도록 정렬하는 단계; 및상기 한 쌍의 페이스트 범프기판을 서로 압착하는 단계를 포함하는 페이스트 범프를 이용한 코어기판 제조방법.
- 삭제
- 삭제
- 제1항에 있어서,상기 페이스트 범프는 실버 페이스트(silver paste)를 포함하는 페이스트 범프를 이용한 코어기판 제조방법.
- 삭제
- 삭제
- 제1항에 있어서,상기 페이스트 범프는 상기 절연재보다 강도가 큰 페이스트 범프를 이용한 코어기판 제조방법.
- 표면에 복수의 제1 페이스트 범프가 결합된 제1 페이스트 범프기판과;상기 제1 페이스트 범프와 대향하는 복수의 제2 페이스트 범프가 결합된 제2 페이스트 범프기판을 포함하되,상기 페이스트 범프기판은, 동박판에 페이스트 범프를 인쇄하고, 경화시킨 후, 상기 페이스트 범프가 절연재를 관통하도록 상기 동박판에 상기 절연재를 적층하여 형성되며, 상기 제1 페이스트 범프와 상기 제2 페이스트 범프는 전기적으로 연결되는 것을 특징으로 하는 페이스트 범프를 이용한 코어기판.
- 삭제
- 삭제
- 삭제
- 삭제
- 제8항에 있어서,상기 페이스트 범프는 실버 페이스트(silver paste)를 포함하는 페이스트 범프를 이용한 코어기판.
- 삭제
- 제8항에 있어서,상기 페이스트 범프는 상기 절연재보다 강도가 큰 페이스트 범프를 이용한 코어기판.
- 제8항의 코어기판과;상기 동박판의 일부를 제거하여 형성되는 내층회로와;상기 동박판에 적층되는 외층기판과;상기 외층기판의 표면에 형성되는 외층회로를 포함하는 페이스트 범프를 이용한 다층 인쇄회로기판.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050114696A KR100722739B1 (ko) | 2005-11-29 | 2005-11-29 | 페이스트 범프를 이용한 코어기판, 다층 인쇄회로기판 및코어기판 제조방법 |
US11/602,332 US7622329B2 (en) | 2005-11-29 | 2006-11-21 | Method for fabricating core substrate using paste bumps |
JP2006316471A JP2007150313A (ja) | 2005-11-29 | 2006-11-24 | ペーストバンプを用いたコア基板、多層印刷回路基板及びコア基板の製造方法 |
CN2006101459547A CN1976560B (zh) | 2005-11-29 | 2006-11-28 | 使用焊膏凸块的基板和多层印刷电路板及其制造方法 |
US12/588,165 US7859106B2 (en) | 2005-11-29 | 2009-10-06 | Multilayer printed circuit board using paste bumps |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050114696A KR100722739B1 (ko) | 2005-11-29 | 2005-11-29 | 페이스트 범프를 이용한 코어기판, 다층 인쇄회로기판 및코어기판 제조방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR100722739B1 true KR100722739B1 (ko) | 2007-05-30 |
Family
ID=38086648
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020050114696A Expired - Fee Related KR100722739B1 (ko) | 2005-11-29 | 2005-11-29 | 페이스트 범프를 이용한 코어기판, 다층 인쇄회로기판 및코어기판 제조방법 |
Country Status (4)
Country | Link |
---|---|
US (2) | US7622329B2 (ko) |
JP (1) | JP2007150313A (ko) |
KR (1) | KR100722739B1 (ko) |
CN (1) | CN1976560B (ko) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100722739B1 (ko) * | 2005-11-29 | 2007-05-30 | 삼성전기주식회사 | 페이스트 범프를 이용한 코어기판, 다층 인쇄회로기판 및코어기판 제조방법 |
KR100897316B1 (ko) * | 2007-10-26 | 2009-05-14 | 삼성전기주식회사 | 인쇄회로기판의 제조방법 |
US7811932B2 (en) * | 2007-12-28 | 2010-10-12 | Freescale Semiconductor, Inc. | 3-D semiconductor die structure with containing feature and method |
KR20140083580A (ko) * | 2012-12-26 | 2014-07-04 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
CN104576596B (zh) * | 2013-10-25 | 2019-01-01 | 日月光半导体制造股份有限公司 | 半导体基板及其制造方法 |
CN104168725B (zh) * | 2014-08-05 | 2017-05-24 | 上海蓝沛信泰光电科技有限公司 | 一种软性线路板的制作方法 |
KR20160039922A (ko) * | 2014-10-02 | 2016-04-12 | 삼성전자주식회사 | 영상처리장치 및 그 제어방법 |
CN106257970B (zh) * | 2015-06-18 | 2019-02-05 | 欣兴电子股份有限公司 | 电路板结构与其制造方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10190231A (ja) | 1996-12-26 | 1998-07-21 | Yamaichi Electron Co Ltd | 多層配線板 |
JPH1187912A (ja) | 1997-09-10 | 1999-03-30 | Toshiba Corp | 両面型配線板の製造方法 |
JPH11112149A (ja) | 1997-09-30 | 1999-04-23 | Elna Co Ltd | 多層プリント配線板 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3474894B2 (ja) | 1993-09-03 | 2003-12-08 | 株式会社東芝 | 印刷配線板およびその製造方法 |
DE69419219T2 (de) * | 1993-09-03 | 2000-01-05 | Kabushiki Kaisha Toshiba, Kawasaki | Leiterplatte und Verfahren zur Herstellung solcher Leiterplatten |
JPH08204334A (ja) | 1995-01-23 | 1996-08-09 | Toshiba Chem Corp | 印刷配線板の製造方法 |
WO1998047331A1 (fr) * | 1997-04-16 | 1998-10-22 | Kabushiki Kaisha Toshiba | Tableau de connexions, son procede de fabrication et boitier de semi-conducteur |
JP3938983B2 (ja) | 1997-09-02 | 2007-06-27 | 大日本印刷株式会社 | 多層配線板の製造方法 |
CN1179614C (zh) | 2000-10-09 | 2004-12-08 | 耀华电子股份有限公司 | 软硬合成多层印刷电路板的制造方法 |
JP2003309368A (ja) | 2002-02-13 | 2003-10-31 | North:Kk | 多層配線回路基板と、その製造方法 |
EP1265466A3 (en) * | 2001-06-05 | 2004-07-21 | Dai Nippon Printing Co., Ltd. | Method for fabrication wiring board provided with passive element and wiring board provided with passive element |
JP4045143B2 (ja) * | 2002-02-18 | 2008-02-13 | テセラ・インターコネクト・マテリアルズ,インコーポレイテッド | 配線膜間接続用部材の製造方法及び多層配線基板の製造方法 |
JP2005520333A (ja) | 2002-03-14 | 2005-07-07 | ゼネラル ダイナミクス アドバンスド インフォメーション システムズ、インク | 多層用基板の積層技術 |
JP3953433B2 (ja) | 2003-03-14 | 2007-08-08 | 山一電機株式会社 | 多層配線板の製造方法 |
KR100722739B1 (ko) * | 2005-11-29 | 2007-05-30 | 삼성전기주식회사 | 페이스트 범프를 이용한 코어기판, 다층 인쇄회로기판 및코어기판 제조방법 |
KR100728754B1 (ko) * | 2006-04-11 | 2007-06-19 | 삼성전기주식회사 | 범프를 이용한 인쇄회로기판 및 그 제조방법 |
-
2005
- 2005-11-29 KR KR1020050114696A patent/KR100722739B1/ko not_active Expired - Fee Related
-
2006
- 2006-11-21 US US11/602,332 patent/US7622329B2/en not_active Expired - Fee Related
- 2006-11-24 JP JP2006316471A patent/JP2007150313A/ja active Pending
- 2006-11-28 CN CN2006101459547A patent/CN1976560B/zh not_active Expired - Fee Related
-
2009
- 2009-10-06 US US12/588,165 patent/US7859106B2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10190231A (ja) | 1996-12-26 | 1998-07-21 | Yamaichi Electron Co Ltd | 多層配線板 |
JPH1187912A (ja) | 1997-09-10 | 1999-03-30 | Toshiba Corp | 両面型配線板の製造方法 |
JPH11112149A (ja) | 1997-09-30 | 1999-04-23 | Elna Co Ltd | 多層プリント配線板 |
Also Published As
Publication number | Publication date |
---|---|
CN1976560B (zh) | 2010-09-08 |
JP2007150313A (ja) | 2007-06-14 |
US7622329B2 (en) | 2009-11-24 |
US20100025092A1 (en) | 2010-02-04 |
US7859106B2 (en) | 2010-12-28 |
US20070120253A1 (en) | 2007-05-31 |
CN1976560A (zh) | 2007-06-06 |
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