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DE69018555D1 - Scheibenbereichhalbleitergerät mit betriebssicherer Schaltung. - Google Patents

Scheibenbereichhalbleitergerät mit betriebssicherer Schaltung.

Info

Publication number
DE69018555D1
DE69018555D1 DE69018555T DE69018555T DE69018555D1 DE 69018555 D1 DE69018555 D1 DE 69018555D1 DE 69018555 T DE69018555 T DE 69018555T DE 69018555 T DE69018555 T DE 69018555T DE 69018555 D1 DE69018555 D1 DE 69018555D1
Authority
DE
Germany
Prior art keywords
circuit
fail
storage circuit
wafer
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69018555T
Other languages
English (en)
Other versions
DE69018555T2 (de
Inventor
Takaaki Suzuki
Takeo Tatematsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP1244078A external-priority patent/JPH03105948A/ja
Priority claimed from JP1327532A external-priority patent/JPH03188652A/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE69018555D1 publication Critical patent/DE69018555D1/de
Application granted granted Critical
Publication of DE69018555T2 publication Critical patent/DE69018555T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/006—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation at wafer scale level, i.e. wafer scale integration [WSI]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/83—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption
    • G11C29/832—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption with disconnection of faulty elements

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Dram (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
DE69018555T 1989-09-19 1990-09-12 Scheibenbereichhalbleitergerät mit betriebssicherer Schaltung. Expired - Fee Related DE69018555T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1244078A JPH03105948A (ja) 1989-09-19 1989-09-19 半導体記憶装置
JP1327532A JPH03188652A (ja) 1989-12-18 1989-12-18 ウエハスケール半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69018555D1 true DE69018555D1 (de) 1995-05-18
DE69018555T2 DE69018555T2 (de) 1995-08-17

Family

ID=26536566

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69018555T Expired - Fee Related DE69018555T2 (de) 1989-09-19 1990-09-12 Scheibenbereichhalbleitergerät mit betriebssicherer Schaltung.

Country Status (4)

Country Link
US (1) US5111073A (de)
EP (1) EP0419117B1 (de)
KR (1) KR940002764B1 (de)
DE (1) DE69018555T2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW389908B (en) * 1998-01-16 2000-05-11 Winbond Electronics Corp Patching method capable of reducing the additional leakage current caused by manufacturing defects
US6912170B1 (en) 2000-03-14 2005-06-28 Micron Technology, Inc. Method and apparatus for permanent electrical removal of an integrated circuit output after packaging
WO2002071734A2 (en) * 2000-12-19 2002-09-12 Smal Camera Technologies, Inc. Compact digital camera system
US7811252B2 (en) 2006-05-17 2010-10-12 Alcon Research, Ltd. Dosage control device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4329685A (en) * 1980-06-09 1982-05-11 Burroughs Corporation Controlled selective disconnect system for wafer scale integrated circuits
JPS60238920A (ja) * 1984-05-11 1985-11-27 Fanuc Ltd メモリのデ−タ保持回路
JPS63217821A (ja) * 1987-03-06 1988-09-09 Toshiba Corp 半導体集積回路
US4855613A (en) * 1987-05-08 1989-08-08 Mitsubishi Denki Kabushiki Kaisha Wafer scale integration semiconductor device having improved chip power-supply connection arrangement
DE3723727A1 (de) * 1987-07-17 1989-01-26 Siemens Ag Stromversorgungseinrichtung

Also Published As

Publication number Publication date
EP0419117A2 (de) 1991-03-27
EP0419117B1 (de) 1995-04-12
EP0419117A3 (en) 1992-02-26
KR940002764B1 (ko) 1994-04-02
KR910007134A (ko) 1991-04-30
DE69018555T2 (de) 1995-08-17
US5111073A (en) 1992-05-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee