DE3687284D1 - Halbleiterspeicheranordnung. - Google Patents
Halbleiterspeicheranordnung.Info
- Publication number
- DE3687284D1 DE3687284D1 DE8686301209T DE3687284T DE3687284D1 DE 3687284 D1 DE3687284 D1 DE 3687284D1 DE 8686301209 T DE8686301209 T DE 8686301209T DE 3687284 T DE3687284 T DE 3687284T DE 3687284 D1 DE3687284 D1 DE 3687284D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor memory
- memory arrangement
- arrangement
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/48—Data lines or contacts therefor
- H10B12/485—Bit line contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/065—Differential amplifiers of latching type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/18—Bit line organisation; Bit line lay-out
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60047240A JPH0666442B2 (ja) | 1985-03-08 | 1985-03-08 | 半導体メモリ装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3687284D1 true DE3687284D1 (de) | 1993-01-28 |
DE3687284T2 DE3687284T2 (de) | 1993-05-06 |
Family
ID=12769691
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8686301209T Expired - Fee Related DE3687284T2 (de) | 1985-03-08 | 1986-02-20 | Halbleiterspeicheranordnung. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4747078A (de) |
EP (1) | EP0197639B1 (de) |
JP (1) | JPH0666442B2 (de) |
KR (1) | KR900003939B1 (de) |
DE (1) | DE3687284T2 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61230359A (ja) * | 1985-04-05 | 1986-10-14 | Nec Ic Microcomput Syst Ltd | 半導体記憶装置 |
KR890003372B1 (ko) * | 1986-11-24 | 1989-09-19 | 삼성전자 주식회사 | 다이나믹 랜덤 액세스 메모리 어레이 |
US4995001A (en) * | 1988-10-31 | 1991-02-19 | International Business Machines Corporation | Memory cell and read circuit |
JPH0828467B2 (ja) * | 1988-11-15 | 1996-03-21 | 株式会社東芝 | 半導体装置 |
JP2650377B2 (ja) * | 1988-12-13 | 1997-09-03 | 富士通株式会社 | 半導体集積回路 |
JPH0775116B2 (ja) * | 1988-12-20 | 1995-08-09 | 三菱電機株式会社 | 半導体記憶装置 |
DE3902231A1 (de) * | 1989-01-26 | 1990-08-09 | Voralp Ets | Einrichtung fuer die steuerung eines scheibenwischers |
JP2609727B2 (ja) * | 1989-09-21 | 1997-05-14 | 株式会社東芝 | 半導体集積回路 |
JP2788783B2 (ja) * | 1990-08-29 | 1998-08-20 | 日本電気アイシーマイコンシステム株式会社 | 半導体集積回路 |
US5384726A (en) * | 1993-03-18 | 1995-01-24 | Fujitsu Limited | Semiconductor memory device having a capability for controlled activation of sense amplifiers |
JPH09162305A (ja) * | 1995-12-08 | 1997-06-20 | Mitsubishi Electric Corp | 半導体記憶装置 |
DE19908428C2 (de) * | 1999-02-26 | 2000-12-07 | Siemens Ag | Halbleiterspeicheranordnung mit Bitleitungs-Twist |
DE10109486B4 (de) * | 2001-02-28 | 2006-01-05 | Infineon Technologies Ag | Integrierter DRAM-Speicherbaustein |
JP2004235515A (ja) | 2003-01-31 | 2004-08-19 | Renesas Technology Corp | 半導体装置 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3159820A (en) * | 1958-11-24 | 1964-12-01 | Int Standard Electric Corp | Information storage device |
US3506969A (en) * | 1967-04-04 | 1970-04-14 | Ibm | Balanced capacitor read only storage using a single balance line for the two drive lines and slotted capacitive plates to increase fringing |
US4319342A (en) * | 1979-12-26 | 1982-03-09 | International Business Machines Corporation | One device field effect transistor (FET) AC stable random access memory (RAM) array |
JPS58111183A (ja) * | 1981-12-25 | 1983-07-02 | Hitachi Ltd | ダイナミツクram集積回路装置 |
JPS6035565A (ja) * | 1983-08-08 | 1985-02-23 | Seiko Epson Corp | 半導体記憶装置 |
JPH0760858B2 (ja) * | 1984-10-26 | 1995-06-28 | 三菱電機株式会社 | 半導体メモリ装置 |
-
1985
- 1985-03-08 JP JP60047240A patent/JPH0666442B2/ja not_active Expired - Lifetime
- 1985-09-14 KR KR1019850006742A patent/KR900003939B1/ko not_active IP Right Cessation
-
1986
- 1986-01-27 US US06/823,099 patent/US4747078A/en not_active Expired - Lifetime
- 1986-02-20 DE DE8686301209T patent/DE3687284T2/de not_active Expired - Fee Related
- 1986-02-20 EP EP86301209A patent/EP0197639B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR860007738A (ko) | 1986-10-17 |
KR900003939B1 (ko) | 1990-06-04 |
JPS61206255A (ja) | 1986-09-12 |
EP0197639A2 (de) | 1986-10-15 |
US4747078B1 (de) | 1989-09-05 |
DE3687284T2 (de) | 1993-05-06 |
JPH0666442B2 (ja) | 1994-08-24 |
EP0197639B1 (de) | 1992-12-16 |
US4747078A (en) | 1988-05-24 |
EP0197639A3 (en) | 1988-10-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) | ||
8339 | Ceased/non-payment of the annual fee |