DE3682346D1 - Halbleiterspeicheranordnung. - Google Patents
Halbleiterspeicheranordnung.Info
- Publication number
- DE3682346D1 DE3682346D1 DE8686306203T DE3682346T DE3682346D1 DE 3682346 D1 DE3682346 D1 DE 3682346D1 DE 8686306203 T DE8686306203 T DE 8686306203T DE 3682346 T DE3682346 T DE 3682346T DE 3682346 D1 DE3682346 D1 DE 3682346D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor memory
- memory arrangement
- arrangement
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60179443A JPH0642536B2 (ja) | 1985-08-16 | 1985-08-16 | 半導体記憶装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3682346D1 true DE3682346D1 (de) | 1991-12-12 |
Family
ID=16065950
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8686306203T Expired - Lifetime DE3682346D1 (de) | 1985-08-16 | 1986-08-11 | Halbleiterspeicheranordnung. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4779227A (de) |
EP (1) | EP0213835B1 (de) |
JP (1) | JPH0642536B2 (de) |
KR (1) | KR900007741B1 (de) |
DE (1) | DE3682346D1 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH088336B2 (ja) * | 1987-05-22 | 1996-01-29 | 三菱電機株式会社 | 半導体記憶装置 |
US5204842A (en) * | 1987-08-05 | 1993-04-20 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory with memory unit comprising a plurality of memory blocks |
JPH081945B2 (ja) * | 1988-10-24 | 1996-01-10 | 日本電気株式会社 | 半導体記憶装置 |
JPH0772991B2 (ja) * | 1988-12-06 | 1995-08-02 | 三菱電機株式会社 | 半導体記憶装置 |
JPH0834296B2 (ja) * | 1988-12-06 | 1996-03-29 | 三菱電機株式会社 | 半導体記憶装置 |
US5184321A (en) * | 1988-12-06 | 1993-02-02 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device comprising a plurality of memory arrays with improved peripheral circuit location and interconnection arrangement |
US5195053A (en) * | 1989-08-30 | 1993-03-16 | Nec Corporation | Semiconductor memory device wired to accommodate increased capacity without increasing the size of the semiconductor memory device |
EP0415369B1 (de) * | 1989-08-30 | 1995-12-27 | Nec Corporation | Halbleiterspeicheranordnung |
JP2545481B2 (ja) * | 1990-03-09 | 1996-10-16 | 富士通株式会社 | 半導体記憶装置 |
US5815456A (en) * | 1996-06-19 | 1998-09-29 | Cirrus Logic, Inc. | Multibank -- multiport memories and systems and methods using the same |
KR100209374B1 (ko) * | 1996-10-31 | 1999-07-15 | 김영환 | 컬럼 디코더 어레이 장치 |
JP2000022097A (ja) * | 1998-06-30 | 2000-01-21 | Fujitsu Ltd | 半導体記憶装置 |
MY127032A (en) | 1999-12-28 | 2006-11-30 | Hitachi Metals Ltd | Work chamfering apparatus and work chamfering method |
JP2012204643A (ja) * | 2011-03-25 | 2012-10-22 | Elpida Memory Inc | 半導体装置 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3936812A (en) * | 1974-12-30 | 1976-02-03 | Ibm Corporation | Segmented parallel rail paths for input/output signals |
DE2557165C3 (de) * | 1975-12-18 | 1979-01-18 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Decoderschaltung und ihre Anordnung zur Integrierung auf einem Halbleiterbaustein |
IT1135038B (it) * | 1980-01-28 | 1986-08-20 | Rca Corp | Apparato per unire elettricamente le estremita' di linee di materiale semiconduttore,sostanzialmente parallele |
JPS6054471A (ja) * | 1983-09-05 | 1985-03-28 | Hitachi Ltd | 半導体メモリ |
JPS5823474A (ja) * | 1981-08-05 | 1983-02-12 | Fujitsu Ltd | 半導体記憶装置 |
-
1985
- 1985-08-16 JP JP60179443A patent/JPH0642536B2/ja not_active Expired - Fee Related
-
1986
- 1986-08-11 DE DE8686306203T patent/DE3682346D1/de not_active Expired - Lifetime
- 1986-08-11 EP EP86306203A patent/EP0213835B1/de not_active Expired - Lifetime
- 1986-08-12 US US06/895,641 patent/US4779227A/en not_active Expired - Lifetime
- 1986-08-16 KR KR1019860006740A patent/KR900007741B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JPS6240760A (ja) | 1987-02-21 |
KR870002583A (ko) | 1987-03-31 |
EP0213835B1 (de) | 1991-11-06 |
JPH0642536B2 (ja) | 1994-06-01 |
US4779227A (en) | 1988-10-18 |
KR900007741B1 (ko) | 1990-10-19 |
EP0213835A3 (en) | 1989-05-24 |
EP0213835A2 (de) | 1987-03-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |