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CN1306332C - Thin film transistor array substrate and repair method thereof - Google Patents

Thin film transistor array substrate and repair method thereof Download PDF

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CN1306332C
CN1306332C CNB2004100705263A CN200410070526A CN1306332C CN 1306332 C CN1306332 C CN 1306332C CN B2004100705263 A CNB2004100705263 A CN B2004100705263A CN 200410070526 A CN200410070526 A CN 200410070526A CN 1306332 C CN1306332 C CN 1306332C
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thin film
pixel electrodes
upper electrode
film transistor
array substrate
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CN1570745A (en
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来汉中
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AUO Corp
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AU Optronics Corp
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Abstract

A thin film transistor array substrate is mainly composed of a substrate, a plurality of scanning wirings, a plurality of data wirings, a plurality of thin film transistors, a plurality of pixel electrodes, a plurality of common wirings and a patterned upper electrode. Wherein, the scanning wires and the data wires are arranged on the substrate to divide a plurality of pixel areas. The thin film transistors are respectively located in each pixel region and driven by the corresponding scan lines and data lines. The pixel electrode is located in each pixel area and is electrically connected with the corresponding thin film transistor. The common lines are disposed on the substrate, and a partial region of each pixel electrode is located above the corresponding common line. The patterned upper electrode comprises a plurality of sub-upper electrodes which are arranged between each pixel electrode and the corresponding common wiring, and the sub-upper electrodes are electrically connected with the pixel electrodes and are suitable for being coupled with the common wiring to form a capacitor. The repairing method is to remove a partial region of the pixel electrode corresponding to the sub-upper electrode in the defective capacitor, so that the sub-upper electrode in the defective capacitor is electrically insulated from the corresponding pixel electrode.

Description

薄膜晶体管阵列基板及其修补方法Thin film transistor array substrate and repair method thereof

技术领域technical field

本发明涉及一种领域的薄膜晶体管阵列基板(TFT array substrate)及其修补方法,特别是涉及一种关于一种能够避免储存电容发生泄漏的薄膜晶体管阵列基板及其修补方法(THIN FILM TRANSISTOR ARRAY SUBSTRATE ANDREPAIRING METHOD THEREOF)。The present invention relates to a thin film transistor array substrate (TFT array substrate) and its repair method in a field, in particular to a thin film transistor array substrate capable of avoiding leakage of a storage capacitor and its repair method (THIN FILM TRANSISTOR ARRAY SUBSTRATE AND REPAIRING METHOD THEREOF).

背景技术Background technique

针对多媒体社会的急速进步,多半受惠于半导体元件或显示装置的飞跃性进步。就显示器而言,阴极射线管(Cathode Ray Tube,CRT)因具有优异的显示品质与其经济性,一直独占近年来的显示器市场。然而,对于个人在桌上操作多数终端机/显示器装置的环境,或是以环保的观点切入,若以节省能源的潮流加以预测,阴极射线管因空间利用以及能源消耗上仍存在很多问题,而对于轻、薄、短、小以及低消耗功率的需求无法有效提供解决之道。因此,具有高画质、空间利用效率佳、低消耗功率、无辐射等优越特性的薄膜晶体管液晶显示器(Thin Film Transistor Liquid CrystalDisplay,TFT LCD)已逐渐成为市场的主流。The rapid progress of the multimedia society is mostly due to the rapid progress of semiconductor devices or display devices. As far as the display is concerned, the cathode ray tube (Cathode Ray Tube, CRT) has been monopolizing the display market in recent years because of its excellent display quality and economy. However, for the environment where individuals operate most terminals/display devices on the table, or from the perspective of environmental protection, if the trend of energy saving is predicted, cathode ray tubes still have many problems in terms of space utilization and energy consumption, and There is no effective solution to the demands of lightness, thinness, shortness, smallness and low power consumption. Therefore, thin film transistor liquid crystal displays (Thin Film Transistor Liquid Crystal Display, TFT LCD) with superior characteristics such as high image quality, good space utilization efficiency, low power consumption, and no radiation have gradually become the mainstream of the market.

薄膜晶体管液晶显示器(TFT LCD)主要由薄膜晶体管阵列基板、彩色滤光阵列基板和液晶层所构成,其中薄膜晶体管阵列基板是由多个以阵列排列的薄膜晶体管,以及与每一个薄膜晶体管对应配置的画素电极(PixelElectrode)所组成。而薄膜晶体管是用来作为液晶显示单元的开关元件。此外,为了控制个别的画素单元,通常经由扫描配线(Scan line)与资料配线(Date line)以选取特定的画素,并藉由施于适当的操作电压,以显示对应此画素的显示资料。另外,通常会将上述的画素电极的部分区域覆盖于扫描配线或是共用配线(Common line)上,而此重迭的部分即作为储存电容(Cst),以使薄膜晶体管液晶显示器中的各画素能够正常显示。A thin film transistor liquid crystal display (TFT LCD) is mainly composed of a thin film transistor array substrate, a color filter array substrate and a liquid crystal layer. The pixel electrode (PixelElectrode) is composed. The thin film transistor is used as a switching element of the liquid crystal display unit. In addition, in order to control individual pixel units, a specific pixel is usually selected through the scan line and the data line (Date line), and the display data corresponding to this pixel is displayed by applying an appropriate operating voltage . In addition, usually part of the above-mentioned pixel electrode area is covered on the scanning wiring or the common wiring (Common line), and the overlapping part is used as a storage capacitor (Cst), so that the thin film transistor liquid crystal display Each pixel can be displayed normally.

值得注意的是,现有习知技术中更在制作资料配线、源极及汲极时的同时,在每一个画素电极与对应的共用配线(或扫描配线)之间配置一上电极,并将画素电极与此上电极电性连接,使得此上电极、共用配线(或扫描配线)及位于此上电极与此共用配线(或扫描配线)之间的介电层形成一种金属-绝缘-金属结构(Metal-Insulator-Metal Structure)的储存电容。It is worth noting that in the prior art, an upper electrode is arranged between each pixel electrode and the corresponding common wiring (or scanning wiring) while making the data wiring, source electrode and drain electrode. , and electrically connect the pixel electrode to the upper electrode, so that the upper electrode, the common wiring (or scanning wiring) and the dielectric layer between the upper electrode and the common wiring (or scanning wiring) are formed A metal-insulator-metal structure (Metal-Insulator-Metal Structure) storage capacitor.

图1绘示为现有习知一种薄膜晶体管阵列基板的俯视图,而图2为根据图1的薄膜晶体管阵列基板沿着剖面线A-A′所见的剖面图。FIG. 1 is a top view of a conventional thin film transistor array substrate, and FIG. 2 is a cross-sectional view of the thin film transistor array substrate according to FIG. 1 along the section line A-A'.

请共同参阅图1及图2,现有习知薄膜晶体管阵列基板100主要是由一基板110、多个扫描配线120、多个资料配线130、多个薄膜晶体管140、多个画素电极150、多数个共用配线160(本图仅绘示其一),以及多个上电极170所构成。Please refer to FIG. 1 and FIG. 2 together. The conventional thin film transistor array substrate 100 is mainly composed of a substrate 110, a plurality of scanning wirings 120, a plurality of data wirings 130, a plurality of thin film transistors 140, and a plurality of pixel electrodes 150. , a plurality of shared wires 160 (only one of which is shown in this figure), and a plurality of upper electrodes 170 .

其中,扫描配线120以及资料配线130是配置于基板110上,以区分出多个画素区域112。薄膜晶体管140是分别位于各画素区域112内,并且藉由对应的扫描配线120以及对应的资料配线130驱动。画素电极150是分别位于各画素区域112内,以与对应的薄膜晶体管140电性连接。共用配线160配置于基板110上,且每一个画素电极150的部分区域是位于对应的共用配线160的上方。Wherein, the scanning wiring 120 and the data wiring 130 are arranged on the substrate 110 to distinguish a plurality of pixel regions 112 . The thin film transistors 140 are respectively located in each pixel area 112 and are driven by the corresponding scan wiring 120 and the corresponding data wiring 130 . The pixel electrodes 150 are respectively located in each pixel area 112 to be electrically connected with the corresponding thin film transistors 140 . The common wiring 160 is disposed on the substrate 110 , and a partial area of each pixel electrode 150 is located above the corresponding common wiring 160 .

此外,每一个画素电极150以及对应的共用配线160之间皆配置有一上电极170,且上电极170与对应的共用配线160之间配置有一介电层180而保持电性隔绝。另外,上电极170与对应的画素电极150之间亦配置一介电层190,而此介电层190具有一接触窗192,藉由接触窗192使上电极170与对应的画素电极150电性连接。In addition, an upper electrode 170 is disposed between each pixel electrode 150 and the corresponding common wiring 160 , and a dielectric layer 180 is disposed between the upper electrode 170 and the corresponding common wiring 160 to maintain electrical isolation. In addition, a dielectric layer 190 is also disposed between the upper electrode 170 and the corresponding pixel electrode 150, and the dielectric layer 190 has a contact window 192, and the upper electrode 170 and the corresponding pixel electrode 150 are electrically connected through the contact window 192. connect.

请继续参阅图2,由于上电极170与对应的共用配线160之间构成一储存电容(Cst),用以使薄膜晶体管液晶显示器中的各画素能够正常显示。然而,制程的缺陷或其他因素可能使得粒子(particle)10落于介电层180中或因介电层180破洞,而导致电容泄漏(leakage)的情形。如此一来,将会导致画素显示异常,而使得显示品质不佳。Please continue to refer to FIG. 2 , since a storage capacitor (Cst) is formed between the upper electrode 170 and the corresponding common wiring 160 to enable each pixel in the thin film transistor liquid crystal display to display normally. However, defects in the process or other factors may cause the particles 10 to fall into the dielectric layer 180 or cause holes in the dielectric layer 180 , resulting in capacitance leakage. In this way, pixels will be displayed abnormally, resulting in poor display quality.

由此可见,上述现有的薄膜晶体管阵列基板及其修补方法在结构、方法与使用上,显然仍存在有不便与缺陷,而亟待加以进一步改进。为了解决薄膜晶体管阵列基板及其修补方法存在的问题,相关厂商莫不费尽心思来谋求解决之道,但长久以来一直未见适用的设计被发展完成,而一般产品又没有适切的结构能够解决上述问题,此显然是相关业者急欲解决的问题。It can be seen that the above-mentioned existing thin film transistor array substrate and its repairing method obviously still have inconveniences and defects in terms of structure, method and use, and need to be further improved. In order to solve the problems existing in thin film transistor array substrates and their repair methods, relevant manufacturers have tried their best to find solutions, but for a long time no suitable design has been developed, and general products have no suitable structure to solve them. The above-mentioned problem is obviously a problem that relevant industry players are eager to solve.

有鉴于上述现有的薄膜晶体管阵列基板及其修补方法存在的缺陷,本发明人基于从事此类产品设计制造多年丰富的实务经验及专业知识,并配合学理的运用,积极加以研究创新,以期创设一种新型结构的薄膜晶体管阵列基板及其修补方法,能够改进一般现有的薄膜晶体管阵列基板及其修补方法,使其更具有实用性。经过不断的研究、设计,并经反复试作样品及改进后,终于创设出确具实用价值的本发明。In view of the defects in the above-mentioned existing thin film transistor array substrates and their repair methods, the inventors actively researched and innovated based on years of rich practical experience and professional knowledge in the design and manufacture of such products, and combined with the application of academic theories, in order to create A thin-film transistor array substrate with a novel structure and its repair method can improve the general existing thin-film transistor array substrate and its repair method, making it more practical. Through continuous research, design, and after repeated trial samples and improvements, the present invention with practical value is finally created.

发明内容Contents of the invention

本发明的主要目的在于,克服现有的薄膜晶体管阵列基板及其修补方法存在的缺陷,而提供一种新的薄膜晶体管阵列基板及其修补方法,所要解决的技术问题是使其可避免储存电容的上下电极因为粒子而发生泄漏的情形。The main purpose of the present invention is to overcome the defects existing in the existing thin film transistor array substrate and its repair method, and provide a new thin film transistor array substrate and its repair method. The technical problem to be solved is to avoid storage capacitor The upper and lower electrodes of the battery leak due to particles.

本发明的目的及解决其技术问题是采用以下技术方案来实现的。本发明提出一种薄膜晶体管阵列基板,主要是由一基板、多个扫描配线、多个资料配线、多个薄膜晶体管、多个画素电极、多数个共用配线,以及一图案化上电极所构成。其中,扫描配线以及资料配线是配置于基板上,以区分出多个画素区域。薄膜晶体管是分别位于各画素区域内,并且藉由对应的扫描配线以及对应的资料配线驱动。画素电极是分别位于各画素区域内,以与对应的薄膜晶体管电性连接。共用配线配置于基板上,且每一个画素电极的部分区域是位于对应的共用配线的上方。图案化上电极配置于每一个画素电极以及对应共用配线其中之一之间,其中图案化上电极包括多数个子上电极,且每一个子上电极的部分区域是分别与对应的画素电极电性连接。The purpose of the present invention and the solution to its technical problems are achieved by adopting the following technical solutions. The present invention proposes a thin film transistor array substrate, which mainly consists of a substrate, multiple scanning wirings, multiple data wirings, multiple thin film transistors, multiple pixel electrodes, multiple shared wirings, and a patterned upper electrode constituted. Wherein, the scan wiring and the data wiring are arranged on the substrate to distinguish a plurality of pixel areas. The thin film transistors are respectively located in each pixel area, and are driven by corresponding scanning wirings and corresponding data wirings. The pixel electrodes are respectively located in each pixel area to be electrically connected with the corresponding thin film transistors. The common wiring is arranged on the substrate, and a partial area of each pixel electrode is located above the corresponding common wiring. The patterned upper electrode is arranged between each pixel electrode and one of the corresponding common wirings, wherein the patterned upper electrode includes a plurality of sub-upper electrodes, and part of each sub-upper electrode is electrically connected to the corresponding pixel electrode. connect.

为达上述目的,本发明提出一种薄膜晶体管阵列基板,主要是由一基板、多个扫描配线、多个资料配线、多个薄膜晶体管、多个画素电极,以及一图案化上电极所构成。其中,扫描配线以及资料配线是配置于基板上,以区分出多个画素区域。薄膜晶体管是分别位于各画素区域内,并且藉由对应的扫描配线以及对应的资料配线驱动。画素电极是分别位于各画素区域内,以与对应的薄膜晶体管电性连接,且每一个画素电极的部分区域是位于对应的扫描配线的上方。图案化上电极配置于每一个画素电极以及对应扫描配线其中之一之间,其中图案化上电极包括多数个子上电极,且每一个子上电极的部分区域是分别与对应的画素电极电性连接。To achieve the above purpose, the present invention proposes a thin film transistor array substrate, which is mainly composed of a substrate, a plurality of scanning wirings, a plurality of data wirings, a plurality of thin film transistors, a plurality of pixel electrodes, and a patterned upper electrode. constitute. Wherein, the scan wiring and the data wiring are arranged on the substrate to distinguish a plurality of pixel areas. The thin film transistors are respectively located in each pixel area, and are driven by corresponding scanning wirings and corresponding data wirings. The pixel electrodes are respectively located in each pixel area to be electrically connected with the corresponding thin film transistors, and a partial area of each pixel electrode is located above the corresponding scanning wiring. The patterned upper electrode is arranged between each pixel electrode and one of the corresponding scanning lines, wherein the patterned upper electrode includes a plurality of sub-upper electrodes, and a part of each sub-upper electrode is electrically connected to the corresponding pixel electrode. connect.

为达上述目的,本发明提出一种薄膜晶体管阵列基板,主要是由一基板、多个扫描配线、多个资料配线、多个薄膜晶体管、多个画素电极、多数个共用配线,以及一图案化上电极所构成。其中,扫描配线以及资料配线是配置于基板上,以区分出多个画素区域。薄膜晶体管是分别位于各画素区域内,并且藉由对应的扫描配线以及对应的资料配线驱动。画素电极是分别位于各画素区域内,以与对应的薄膜晶体管电性连接。共用配线配置于基板上,且每一个画素电极的部分区域是位于对应的共用配线的上方。图案化上电极配置于每一个画素电极以及对应的共用配线之间,图案化上电极包括多数个子上电极,其中子上电极是与画素电极电性连接,且适于与共用配线耦合形成多个电容,当其中至少一个电容为瑕疵电容时,瑕疵电容中的子上电极是与对应的画素电极电性绝缘,而其他的子上电极的部分区域是分别与对应的画素电极电性连接。In order to achieve the above object, the present invention proposes a thin film transistor array substrate, which mainly consists of a substrate, a plurality of scanning wirings, a plurality of data wirings, a plurality of thin film transistors, a plurality of pixel electrodes, a plurality of shared wirings, and A patterned upper electrode is formed. Wherein, the scan wiring and the data wiring are arranged on the substrate to distinguish a plurality of pixel areas. The thin film transistors are respectively located in each pixel area, and are driven by corresponding scanning wirings and corresponding data wirings. The pixel electrodes are respectively located in each pixel area to be electrically connected with the corresponding thin film transistors. The common wiring is arranged on the substrate, and a partial area of each pixel electrode is located above the corresponding common wiring. The patterned upper electrode is arranged between each pixel electrode and the corresponding common wiring. The patterned upper electrode includes a plurality of sub-upper electrodes, wherein the sub-upper electrodes are electrically connected to the pixel electrodes and are suitable for coupling with the common wiring to form Multiple capacitors, when at least one of the capacitors is a defective capacitor, the sub-upper electrodes in the defective capacitors are electrically insulated from the corresponding pixel electrodes, while other sub-upper electrodes are electrically connected to the corresponding pixel electrodes respectively .

为达上述目的,本发明提出一种薄膜晶体管阵列基板,主要是由一基板、多个扫描配线、多个资料配线、多个薄膜晶体管、多个画素电极,以及一图案化上电极所构成。其中,扫描配线以及资料配线是配置于基板上,以区分出多个画素区域。薄膜晶体管是分别位于各画素区域内,并且藉由对应的扫描配线以及对应的资料配线驱动。画素电极是分别位于各画素区域内,以与对应的薄膜晶体管电性连接,且每一个画素电极的部分区域是位于对应的扫描配线的上方。图案化上电极配置于每一个画素电极以及对应扫描配线其中之一之间,其中图案化上电极包括多数个子上电极,其中子上电极是与画素电极电性连接,且适于与扫瞄配线耦合形成多个电容,当其中至少一个电容为瑕疵电容时,瑕疵电容中的子上电极是与对应的画素电极电性绝缘,而其他子上电极的部分区域是分别与对应的画素电极电性连接。To achieve the above purpose, the present invention proposes a thin film transistor array substrate, which is mainly composed of a substrate, a plurality of scanning wirings, a plurality of data wirings, a plurality of thin film transistors, a plurality of pixel electrodes, and a patterned upper electrode. constitute. Wherein, the scan wiring and the data wiring are arranged on the substrate to distinguish a plurality of pixel areas. The thin film transistors are respectively located in each pixel area, and are driven by corresponding scanning wirings and corresponding data wirings. The pixel electrodes are respectively located in each pixel area to be electrically connected with the corresponding thin film transistors, and a partial area of each pixel electrode is located above the corresponding scanning wiring. The patterned upper electrode is disposed between each pixel electrode and one of the corresponding scanning wirings, wherein the patterned upper electrode includes a plurality of sub-upper electrodes, wherein the sub-upper electrodes are electrically connected to the pixel electrodes and are suitable for scanning Wiring coupling forms multiple capacitors. When at least one of the capacitors is a defective capacitor, the sub-upper electrodes in the defective capacitors are electrically insulated from the corresponding pixel electrodes, and some areas of other sub-upper electrodes are respectively connected to the corresponding pixel electrodes. electrical connection.

为达上述目的,本发明提出一种薄膜晶体管阵列基板的修补方法,适于对上述的薄膜晶体管阵列基板进行修补,当这些子上电极其中之一与对应的共用配线或扫描配线之间具有一粒子/破洞时,其所构成的电容为一瑕疵电容,此薄膜晶体管阵列基板的修补方法包括移除与瑕疵电容中的子上电极对应的画素电极的部分区域,以令瑕疵电容中的子上电极与对应的画素电极电性绝缘。In order to achieve the above purpose, the present invention proposes a method for repairing the thin film transistor array substrate, which is suitable for repairing the above thin film transistor array substrate. When there is a particle/hole, the capacitor formed by it is a defective capacitor. The method for repairing the thin film transistor array substrate includes removing a part of the pixel electrode corresponding to the sub-upper electrode in the defective capacitor, so that the defective capacitor The sub-upper electrodes are electrically insulated from the corresponding pixel electrodes.

为达上述目的,本发明提出一种薄膜晶体管阵列基板,主要是由一基板、多个扫描配线、多个资料配线、多个薄膜晶体管、多个画素电极、多数个共用配线,以及一上电极所构成。其中,扫描配线以及资料配线是配置于基板上,以区分出多个画素区域。薄膜晶体管是分别位于各画素区域内,并且藉由对应的扫描配线以及对应的资料配线驱动。画素电极是分别位于各画素区域内,以与对应的薄膜晶体管电性连接。共用配线配置于基板上,且每一个画素电极的部分区域是位于对应的共用配线的上方。上电极配置于每一个画素电极以及对应的共用配线之间,其中上电极是与画素电极电性连接,且适于与共用配线耦合形成多个电容,当其中至少一个电容为一瑕疵电容时,瑕疵电容中的上电极是与对应的画素电极电性绝缘,且瑕疵电容中的上电极是与对应的共用配线相熔接。In order to achieve the above object, the present invention proposes a thin film transistor array substrate, which mainly consists of a substrate, a plurality of scanning wirings, a plurality of data wirings, a plurality of thin film transistors, a plurality of pixel electrodes, a plurality of shared wirings, and Consists of an upper electrode. Wherein, the scan wiring and the data wiring are arranged on the substrate to distinguish a plurality of pixel areas. The thin film transistors are respectively located in each pixel area, and are driven by corresponding scanning wirings and corresponding data wirings. The pixel electrodes are respectively located in each pixel area to be electrically connected with the corresponding thin film transistors. The common wiring is arranged on the substrate, and a partial area of each pixel electrode is located above the corresponding common wiring. The upper electrode is disposed between each pixel electrode and the corresponding common wiring, wherein the upper electrode is electrically connected to the pixel electrode, and is suitable for coupling with the common wiring to form multiple capacitors, when at least one of the capacitors is a defective capacitor In this case, the upper electrode in the defective capacitor is electrically insulated from the corresponding pixel electrode, and the upper electrode in the defective capacitor is welded to the corresponding common wiring.

为达上述目的,本发明提出一种薄膜晶体管阵列基板,主要是由一基板、多个扫描配线、多个资料配线、多个薄膜晶体管、多个画素电极,以及上电极所构成。其中,扫描配线以及资料配线是配置于基板上,以区分出多个画素区域。薄膜晶体管是分别位于各画素区域内,并且藉由对应的扫描配线以及对应的资料配线驱动。画素电极是分别位于各画素区域内,以与对应的薄膜晶体管电性连接,且每一个画素电极的部分区域是位于对应的扫描配线的上方。上电极配置于每一个画素电极以及对应的扫描配线之间,其中上电极是与画素电极电性连接,且适于与扫瞄配线耦合形成多个电容,当其中至少一个电容为一瑕疵电容时,瑕疵电容中的上电极是与对应的画素电极电性绝缘,且瑕疵电容中的上电极是与对应的扫描配线相熔接。To achieve the above purpose, the present invention proposes a thin film transistor array substrate, which is mainly composed of a substrate, multiple scanning lines, multiple data lines, multiple thin film transistors, multiple pixel electrodes, and an upper electrode. Wherein, the scan wiring and the data wiring are arranged on the substrate to distinguish a plurality of pixel areas. The thin film transistors are respectively located in each pixel area, and are driven by corresponding scanning wirings and corresponding data wirings. The pixel electrodes are respectively located in each pixel area to be electrically connected with the corresponding thin film transistors, and a partial area of each pixel electrode is located above the corresponding scanning wiring. The upper electrode is arranged between each pixel electrode and the corresponding scanning wiring, wherein the upper electrode is electrically connected to the pixel electrode, and is suitable for coupling with the scanning wiring to form multiple capacitors, when at least one of the capacitors is a defect When the capacitor is used, the upper electrode in the defective capacitor is electrically insulated from the corresponding pixel electrode, and the upper electrode in the defective capacitor is welded to the corresponding scanning wiring.

为达上述目的,本发明提出一种薄膜晶体管阵列基板的修补方法,适于对一储存电容在闸极上(Cst on gate)或储存电容在共用配线(Cst oncommon)上的薄膜晶体管阵列基板进行修补,其中基板上的每一个画素电极的部分区域是位于对应之一扫描配线或一共用配线的上方,且每一个画素电极以及对应的扫描配线或共用配线之间配置有一上电极,且画素电极与上电极电性连接,当上电极与对应的扫描配线或共用配线之间具有一粒子/破洞时,其所构成的电容为一瑕疵电容,而此修补方法是先移除与瑕疵电容中的上电极相对应的画素电极的部分区域,以使瑕疵电容中的上电极与对应的画素电极电性绝缘。接着,再将瑕疵电容中的上电极与对应的扫描配线或共用配线相熔接。In order to achieve the above object, the present invention proposes a method for repairing a thin film transistor array substrate, which is suitable for a thin film transistor array substrate with a storage capacitor on the gate (Cs on gate) or a storage capacitor on the common wiring (Cs on common). For repairing, wherein a partial area of each pixel electrode on the substrate is located above a corresponding scanning wiring or a common wiring, and an upper electrode, and the pixel electrode is electrically connected to the upper electrode. When there is a particle/hole between the upper electrode and the corresponding scanning wiring or common wiring, the capacitance formed by it is a defective capacitance, and this repair method is Partial areas of the pixel electrodes corresponding to the upper electrodes in the defective capacitors are removed first, so that the upper electrodes in the defective capacitors are electrically insulated from the corresponding pixel electrodes. Next, the upper electrode in the defective capacitor is welded to the corresponding scanning wiring or common wiring.

由于本发明主要在于每个画素电极与对应的共用配线(或扫描配线)之间,配置由多个子上电极所构成的图案化上电极。当这些子上电极其中之一与对应的共用配线(或扫描配线)之间具有一粒子时,其所构成的电容为一瑕疵电容,本发明可藉由移除此瑕疵电容中的子上电极上方的画素电极的部分区域,使此瑕疵电容中的子上电极与对应的画素电极电性绝缘,进以避免储存电容的上下电极因为粒子或破洞而发生泄漏(leakage)的情形。Because the present invention mainly lies in disposing a patterned upper electrode composed of a plurality of sub-upper electrodes between each pixel electrode and the corresponding common wiring (or scanning wiring). When there is a particle between one of the sub-upper electrodes and the corresponding common wiring (or scanning wiring), the capacitance formed by it is a defective capacitor. The partial area of the pixel electrode above the upper electrode electrically insulates the sub-upper electrode in the defective capacitor from the corresponding pixel electrode, so as to avoid the leakage of the upper and lower electrodes of the storage capacitor due to particles or holes.

本发明与现有技术相比具有明显的优点和有益效果。Compared with the prior art, the present invention has obvious advantages and beneficial effects.

1.本发明的修补方法系可避免储存电容的上下电极因为粒子或介电层破洞,而发生泄漏的情形,实用性高。1. The repairing method of the present invention can prevent the upper and lower electrodes of the storage capacitor from leaking due to holes in the particles or the dielectric layer, and has high practicability.

2.本发明的薄膜电晶体阵列基板,其中图案化上电极可与同属第二金属层(M2)的资料配线、汲极及源极一并形成,故在制造成本上并不会造成负担。2. In the thin film transistor array substrate of the present invention, the patterned upper electrode can be formed together with the data wiring, drain electrode and source electrode belonging to the second metal layer (M2), so there is no burden on the manufacturing cost .

综上所述,本发明特殊结构的薄膜晶体管阵列基板及其修补方法,克服现有的薄膜晶体管阵列基板及其修补方法存在的缺陷,而提供一种新的薄膜晶体管阵列基板及其修补方法,所要解决的技术问题是使其可避免储存电容的上下电极因为粒子而发生泄漏的情形。其具有上述诸多的优点及实用价值,并在同类产品及方法中未见有类似的结构设计及方法公开发表或使用而确属创新,其不论在产品结构、方法或功能上皆有较大的改进,在技术上有较大的进步,并产生了好用及实用的效果,且较现有的薄膜晶体管阵列基板及其修补方法具有增进的多项功效,从而更加适于实用,而具有产业的广泛利用价值,诚为一新颖、进步、实用的新设计。To sum up, the thin film transistor array substrate with special structure and its repairing method of the present invention overcomes the defects existing in the existing thin film transistor array substrate and its repairing method, and provides a new thin film transistor array substrate and its repairing method, The technical problem to be solved is to prevent the upper and lower electrodes of the storage capacitor from leaking due to particles. It has the above-mentioned many advantages and practical value, and there is no similar structural design and method publicly published or used in similar products and methods, so it is indeed innovative, and it has great advantages no matter in product structure, method or function. Improvement, great progress has been made in technology, and has produced easy-to-use and practical effects, and has improved multiple functions compared with the existing thin-film transistor array substrate and its repair method, so it is more suitable for practical use, and has industrial It is a novel, progressive and practical new design.

上述说明仅是本发明技术方案的概述,为了能够更清楚了解本发明的技术手段,并可依照说明书的内容予以实施,以下以本发明的较佳实施例并配合附图详细说明如后。The above description is only an overview of the technical solutions of the present invention. In order to understand the technical means of the present invention more clearly and implement them according to the contents of the description, the preferred embodiments of the present invention and accompanying drawings are described in detail below.

附图说明Description of drawings

图1绘示为现有习知一种薄膜晶体管阵列基板的俯视图。FIG. 1 is a top view of a conventional thin film transistor array substrate.

图2为根据图1中的薄膜晶体管阵列基板沿着剖面线A-A′所见的剖面图。FIG. 2 is a cross-sectional view of the thin film transistor array substrate along the section line A-A' according to FIG. 1 .

图3绘示为依照本发明一较佳实施例薄膜晶体管阵列基板的示意图。FIG. 3 is a schematic diagram of a thin film transistor array substrate according to a preferred embodiment of the present invention.

图4绘示为根据图3中的薄膜晶体管阵列基板沿着剖面线B-B′所见的剖面图。FIG. 4 is a cross-sectional view of the thin film transistor array substrate along the section line B-B' according to FIG. 3 .

图5绘示为图3中的薄膜晶体管阵列基板经过激光修补之后的示意图。FIG. 5 is a schematic diagram of the thin film transistor array substrate in FIG. 3 after laser repair.

图6绘示为图5中的薄膜晶体管阵列基板沿着C-C′剖面线的剖面示意图。FIG. 6 is a schematic cross-sectional view of the thin film transistor array substrate along line C-C′ in FIG. 5 .

图7绘示依照本发明一较佳实施例将共用配线与瑕疵电容中的子上电极电性连接的修补示意图。FIG. 7 is a schematic diagram of repairing electrically connecting the common wiring with the sub-upper electrode in the defective capacitor according to a preferred embodiment of the present invention.

图8绘示依照本发明一较佳实施例针对粒子落于画素电极与共用配线之间的修补示意图。FIG. 8 is a schematic diagram of repairing particles falling between the pixel electrode and the common wiring according to a preferred embodiment of the present invention.

图9A~图9D绘示为依照本发明另一较佳实施例薄膜晶体管阵列基板的示意图。9A to 9D are schematic diagrams of a thin film transistor array substrate according to another preferred embodiment of the present invention.

图10绘示为依照本发明另一较佳实施例薄膜晶体管阵列基板的示意图。FIG. 10 is a schematic diagram of a thin film transistor array substrate according to another preferred embodiment of the present invention.

图11为图10中的薄膜晶体管阵列基板经过激光修补之后的示意图。FIG. 11 is a schematic diagram of the thin film transistor array substrate in FIG. 10 after laser repair.

图12~13绘示为以本发明的修补方法针对储存电容在扫描配线的架构的薄膜晶体管阵列基板的修补后的示意图。FIGS. 12 to 13 are schematic diagrams after repairing the thin film transistor array substrate with the structure of the storage capacitor on the scanning wiring by the repairing method of the present invention.

图14~15绘示为以本发明的修补方法针对现有习知薄膜晶体管阵列基板的修补后的示意图。FIGS. 14 to 15 are schematic diagrams after repairing the conventional thin film transistor array substrate by the repairing method of the present invention.

图16A~16D绘示在现有习知薄膜晶体管阵列基板的画素电极上形成开口的示意图。16A-16D are schematic diagrams of forming openings on pixel electrodes of a conventional TFT array substrate.

图17绘示为以本发明再一较佳实施例运用在多重区域垂直排列型液晶显示器的架构的薄膜晶体管阵列基板示意图。FIG. 17 is a schematic diagram of a thin film transistor array substrate applied in a structure of a multi-area vertical alignment liquid crystal display according to yet another preferred embodiment of the present invention.

图18绘示为以本发明的修补方法运用在多重区域垂直排列型液晶显示器的架构的薄膜晶体管阵列基板的修补后的示意图。FIG. 18 is a schematic diagram of a repaired thin film transistor array substrate applied to a structure of a multi-area vertical alignment liquid crystal display using the repairing method of the present invention.

10、20、30:粒子10, 20, 30: particles

100、200、300:薄膜晶体管阵列基板100, 200, 300: TFT array substrate

110、210:基板110, 210: Substrate

120、220、320:扫描配线120, 220, 320: scan wiring

130、230、330:资料配线130, 230, 330: data wiring

140、240:薄膜晶体管140, 240: thin film transistor

150、250、350:画素电极150, 250, 350: pixel electrodes

152、154、252、254、256:开口152, 154, 252, 254, 256: opening

160、260、360:共用配线160, 260, 360: shared wiring

170、370:上电极170, 370: upper electrode

180、280:介电层180, 280: dielectric layer

190、290:介电层190, 290: dielectric layer

192、292、392:接触窗192, 292, 392: contact window

270:图案化上电极270: Patterned upper electrode

272:子上电极272: sub-upper electrode

272a:瑕疵电容中的子上电极272a: Sub-upper electrode in defective capacitor

352:第一沟槽352: First Groove

354:第二沟槽354: second groove

356:连通处356: Connections

具体实施方式Detailed ways

为更进一步阐述本发明为达成预定发明目的所采取的技术手段及功效,以下结合附图及较佳实施例,对依据本发明提出的薄膜晶体管阵列基板及其修补方法其具体实施方式、结构、方法、步骤、特征及其功效,详细说明如后。In order to further explain the technical means and effects of the present invention to achieve the intended purpose of the invention, the specific implementation, structure, The method, steps, features and effects thereof are described in detail below.

图3绘示为依照本发明一较佳实施例薄膜晶体管阵列基板的示意图,而图4绘示为根据图3中的薄膜晶体管阵列基板沿着剖面线B-B′所见的剖面图。FIG. 3 is a schematic diagram of a thin film transistor array substrate according to a preferred embodiment of the present invention, and FIG. 4 is a cross-sectional view of the thin film transistor array substrate along the section line B-B' according to FIG. 3 .

请参阅图3及图4所示,本实施例的薄膜晶体管阵列基板200主要是由一基板210、多个扫描配线220、多个资料配线230、多个薄膜晶体管240、多个画素电极250、多数个共用配线260(本图仅绘示其一),以及一图案化上电极270所构成。3 and 4, the thin film transistor array substrate 200 of this embodiment is mainly composed of a substrate 210, a plurality of scanning lines 220, a plurality of data lines 230, a plurality of thin film transistors 240, and a plurality of pixel electrodes. 250 , a plurality of shared wires 260 (only one is shown in this figure), and a patterned upper electrode 270 .

其中,扫描配线220以及资料配线230是配置于基板210上,以区分出多个画素区域212。薄膜晶体管240是分别位于各画素区域212内,并且藉由对应的扫描配线220以及对应的资料配线230驱动。画素电极250是分别位于各画素区域212内,以与对应的薄膜晶体管240电性连接。共用配线260配置于基板210上,且每一个画素电极250的部分区域是位于对应的共用配线260的上方。Wherein, the scanning wiring 220 and the data wiring 230 are arranged on the substrate 210 to distinguish a plurality of pixel areas 212 . The thin film transistors 240 are respectively located in each pixel area 212 and are driven by the corresponding scan wiring 220 and the corresponding data wiring 230 . The pixel electrodes 250 are respectively located in each pixel area 212 to be electrically connected with the corresponding thin film transistors 240 . The common wiring 260 is disposed on the substrate 210 , and a partial area of each pixel electrode 250 is located above the corresponding common wiring 260 .

图案化上电极270配置于每一个画素电极250以及对应的共用配线260之间,且图案化上电极270与共用配线260之间配置有一介电层280,而图案化上电极270与画素电极250之间配置有一介电层290。值得注意的是,图案化上电极270是由多数个子上电极272(本图以两个为例)所构成,且每一个子上电极272的部分区域是分别与对应的画素电极250电性连接,例如是在每一个子上电极272上方的介电层290开设接触窗292,藉由接触窗292使每一个子上电极272分别与对应的画素电极250电性连接,因此子上电极272与对应的共用配线260之间即构成一储存电容(Cst)。The patterned upper electrode 270 is disposed between each pixel electrode 250 and the corresponding common wiring 260, and a dielectric layer 280 is disposed between the patterned upper electrode 270 and the common wiring 260, and the patterned upper electrode 270 and the pixel A dielectric layer 290 is disposed between the electrodes 250 . It is worth noting that the patterned upper electrode 270 is composed of a plurality of sub-upper electrodes 272 (two are taken as an example in this figure), and a part of each sub-upper electrode 272 is electrically connected to the corresponding pixel electrode 250 For example, a contact window 292 is opened on the dielectric layer 290 above each sub-upper electrode 272, and each sub-upper electrode 272 is electrically connected to the corresponding pixel electrode 250 through the contact window 292, so the sub-upper electrode 272 and A storage capacitor (Cst) is formed between the corresponding common wires 260 .

图5绘示为图3中的薄膜晶体管阵列基板经过激光修补之后的示意图,而图6绘示为图5中的薄膜晶体管阵列基板沿着C-C′剖面线的剖面示意图。5 is a schematic diagram of the TFT array substrate in FIG. 3 after laser repair, and FIG. 6 is a schematic cross-sectional diagram of the TFT array substrate in FIG. 5 along the line C-C'.

请共同参阅图5及图6,当上述这些子上电极272其中之一与对应的共用配线260之间具有一粒子20(或破洞)时,子上电极272a与共用配线260之间会发生泄漏(leakage)的情形。如此一来,将会导致画素显示异常,而使得显示品质不佳。此时,即需要对上述显示异常的画素进行修补的动作,其修补方法主要是为移除与瑕疵电容中的子上电极272a对应的画素电极250的部分区域,以令瑕疵电容中的子上电极272a与对应的画素电极250电性绝缘。Please refer to FIG. 5 and FIG. 6 together. When there is a particle 20 (or hole) between one of the above-mentioned sub-upper electrodes 272 and the corresponding common wiring 260, between the sub-upper electrode 272a and the common wiring 260 Leakage can occur. In this way, pixels will be displayed abnormally, resulting in poor display quality. At this time, it is necessary to repair the above-mentioned pixels with abnormal display. The repair method is mainly to remove the part of the pixel electrode 250 corresponding to the sub-upper electrode 272a in the defective capacitor, so that the sub-upper electrode 272a in the defective capacitor can be repaired. The electrode 272 a is electrically insulated from the corresponding pixel electrode 250 .

以本实施例而言,例如是将对应于瑕疵电容中的子上电极272a上方的画素电极250的部分区域移除以形成一开口252,其移除的方法例如是以激光移除的方式进行,且此开口252位于瑕疵电容中的子上电极272a与对应的画素电极250所接触的区域周围(即接触窗292的周围),藉由此开口252使瑕疵电容中的子上电极272a与对应的画素电极250电性绝缘。由上可知,经修补后的画素电极250仍能够正常显示,且不会受到修补制程的影响。In this embodiment, for example, a part of the region corresponding to the pixel electrode 250 above the sub-upper electrode 272a in the defective capacitor is removed to form an opening 252, and the removal method is, for example, laser removal. , and the opening 252 is located around the area where the sub-upper electrode 272a in the defective capacitor contacts the corresponding pixel electrode 250 (that is, around the contact window 292), and the sub-upper electrode 272a in the defective capacitor is connected to the corresponding pixel electrode 250 through the opening 252. The pixel electrodes 250 are electrically insulated. It can be known from the above that the repaired pixel electrode 250 can still display normally and will not be affected by the repairing process.

图7绘示依照本发明一较佳实施例将共用配线与瑕疵电容中的子上电极电性连接的修补示意图。在移除与瑕疵电容中的子上电极272a对应的画素电极250的部分区域,以使瑕疵电容中的子上电极272a与对应的画素电极250电性绝缘之后,更可将瑕疵电容中的子上电极272a与对应的共用配线260相熔接(如标示A处),使瑕疵电容中的子上电极272a与对应的共用配线260等电位,以避免因粒子(或破洞)而发生泄漏的情形,而上述熔接的方法例如是利用激光熔接。FIG. 7 is a schematic diagram of repairing electrically connecting the common wiring with the sub-upper electrode in the defective capacitor according to a preferred embodiment of the present invention. After removing the partial area of the pixel electrode 250 corresponding to the sub-upper electrode 272a in the defective capacitor, so that the sub-upper electrode 272a in the defective capacitor is electrically insulated from the corresponding pixel electrode 250, the sub-upper electrode 272a in the defective capacitor can be further electrically insulated The upper electrode 272a is welded to the corresponding common wiring 260 (as indicated by A), so that the sub-upper electrode 272a in the defective capacitor is at the same potential as the corresponding common wiring 260, so as to avoid leakage due to particles (or holes) In the case of the above-mentioned welding method, for example, laser welding is used.

承上所述,以本实施例而言,瑕疵电容中的子上电极272a与对应的共用配线260相熔接的位置是位于接触窗292的下方。然而,熟悉该项技术者应知,熔接的位置无需局限于接触窗292的下方,是在方便于将瑕疵电容中的子上电极272a与对应的共用配线260相熔接的任何适当位置皆可。Based on the above, according to the present embodiment, the position where the sub-upper electrode 272 a of the defective capacitor is welded to the corresponding common wiring 260 is located below the contact window 292 . However, those skilled in the art should know that the position of welding need not be limited to the bottom of the contact window 292, and it can be any suitable position convenient for welding the sub-upper electrode 272a and the corresponding common wiring 260 in the defective capacitor. .

图8绘示依照本发明一较佳实施例针对粒子落于画素电极与共用配线之间的修补示意图。当上述的画素电极以及对应的共用配线之间具有一粒子30(或破洞)时,本发明的修补方法更可移除对应于粒子30(或破洞)上方的画素电极250的区域。以本实施例而言,例如以激光移除的方式形成一开口254,且开口254暴露出该粒子30(或破洞)。FIG. 8 is a schematic diagram of repairing particles falling between the pixel electrode and the common wiring according to a preferred embodiment of the present invention. When there is a particle 30 (or a hole) between the pixel electrode and the corresponding common wiring, the repairing method of the present invention can further remove the area corresponding to the pixel electrode 250 above the particle 30 (or hole). In this embodiment, for example, an opening 254 is formed by laser removal, and the opening 254 exposes the particles 30 (or holes).

图9A~图9D绘示为依照本发明另一较佳实施例薄膜晶体管阵列基板的示意图。本实施例的薄膜晶体管阵列基板其主要结构大致与图3所揭露的薄膜晶体管阵列基板相同,而在此仅针对相异处进行说明,本实施例的相异处主要在于形成画素电极250时,同时在每一个画素电极250上可以开设一个开口256,也可以开设多个开口256,此开口256是位于每一个子接触垫272与对应的画素电极250所接触区域的周围。其例如是在每一个子接触垫272所对应的画素电极250上形成一直条状开口256(如图9A)、两直条状开口256(如图9B)、或一L型开口256(如图9C)或一U字型开口256(如图9D)。由于在画素电极250上先形成了开口256,当其中一个子上电极272与对应的共用配线260之间具有粒子(或破洞)时,可藉由移除画素电极250的部分区域的方式,将上述开口256的两端连通,使此开口256形成如同于图5环绕于接触窗292周围的开口252。本实施例中,移除画素电极250的部分区域的方式例如是利用激光移除。9A to 9D are schematic diagrams of a thin film transistor array substrate according to another preferred embodiment of the present invention. The main structure of the thin film transistor array substrate in this embodiment is roughly the same as that disclosed in FIG. At the same time, one opening 256 or multiple openings 256 can be opened on each pixel electrode 250 , and the openings 256 are located around the contact area between each sub-contact pad 272 and the corresponding pixel electrode 250 . For example, a straight strip opening 256 (as shown in FIG. 9A ), two straight strip openings 256 (as shown in FIG. 9B ), or an L-shaped opening 256 (as shown in FIG. 9B ) are formed on the pixel electrode 250 corresponding to each sub-contact pad 272 . 9C) or a U-shaped opening 256 (as shown in Figure 9D). Since the opening 256 is first formed on the pixel electrode 250, when there are particles (or holes) between one of the upper sub-electrodes 272 and the corresponding common wiring 260, the pixel electrode 250 can be partially removed , connect the two ends of the opening 256 to form the opening 256 as the opening 252 surrounding the contact window 292 in FIG. 5 . In this embodiment, a method of removing a part of the pixel electrode 250 is, for example, using a laser to remove.

此外,请继续参阅图9A~图9D,图中所揭露的开口256一部分设计于子上电极272的上方,而其余部分设计于子上电极272以外的区域。换句话说,即将开口256的涵盖区域设计超出上电极272,以使修补的制程能更为快速、简便。当然,熟悉该项技术者应知,本发明的开口256的尺寸无需加以限制。In addition, please continue to refer to FIG. 9A to FIG. 9D , a part of the opening 256 disclosed in the figures is designed above the sub-upper electrode 272 , and the rest is designed in the area outside the sub-upper electrode 272 . In other words, the covering area of the opening 256 is designed to exceed the upper electrode 272, so that the repair process can be faster and easier. Of course, those skilled in the art should know that the size of the opening 256 in the present invention need not be limited.

图10绘示为依照本发明另一较佳实施例薄膜晶体管阵列基板的示意图,而图11为图10中的薄膜晶体管阵列基板经过激光修补之后的示意图。FIG. 10 is a schematic diagram of a TFT array substrate according to another preferred embodiment of the present invention, and FIG. 11 is a schematic diagram of the TFT array substrate in FIG. 10 after laser repair.

本实施例的薄膜晶体管阵列基板其主要结构大致与图3所揭露的薄膜晶体管阵列基板相同,而在此仅针对相异处进行说明,本实施例的相异处主要在每一个画素电极250下方的各个子上电极272间更包括以一颈缩部274相连,而颈缩部274是用以作为修补时的切割区。The main structure of the TFT array substrate in this embodiment is roughly the same as that disclosed in FIG. 3 , and only the differences will be described here. The differences in this embodiment are mainly under each pixel electrode 250 Each of the sub-upper electrodes 272 is further connected by a constricted part 274, and the constricted part 274 is used as a cutting area during repairing.

当其中一个子上电极272与对应的共用配线260之间具有一粒子20(或破洞)时,子上电极272a与共用配线260之间会发生泄漏(leakage)的情形。此时,其修补方法为先移除与瑕疵电容中的子上电极272a对应的画素电极250的部分区域。接着,切断与瑕疵电容中的子上电极272a连接的颈缩部274,以使瑕疵电容中的子上电极272a与对应的画素电极250电性绝缘。以本实施例而言,移除画素电极250的部分区域以形成一开口252,此开口252位于瑕疵电容中的子上电极272a与画素电极250所接触区域的周围,且移除画素电极250的部分区域的方法例如是激光移除,而切断颈缩部274的方法例如是激光切割。从上可知,在切断与瑕疵电容中的子上电极272a连接的颈缩部274后,瑕疵电容中的子上电极272a即与对应的画素电极250电性绝缘,进而达到修补的目的。When there is a particle 20 (or hole) between one sub-upper electrode 272 and the corresponding common wiring 260 , leakage will occur between the sub-upper electrode 272 a and the common wiring 260 . At this time, the repairing method is to firstly remove the partial area of the pixel electrode 250 corresponding to the sub-upper electrode 272a in the defective capacitor. Next, cut off the neck portion 274 connected to the sub-upper electrode 272 a in the defective capacitor, so that the sub-upper electrode 272 a in the defective capacitor is electrically insulated from the corresponding pixel electrode 250 . In this embodiment, a part of the pixel electrode 250 is removed to form an opening 252, and the opening 252 is located around the contact area between the sub-upper electrode 272a and the pixel electrode 250 in the defect capacitor, and the pixel electrode 250 is removed. The method of partial area is, for example, laser removal, and the method of cutting the constricted part 274 is, for example, laser cutting. It can be known from the above that after cutting off the neck portion 274 connected to the sub-upper electrode 272a in the defective capacitor, the sub-upper electrode 272a in the defective capacitor is electrically insulated from the corresponding pixel electrode 250, thereby achieving the purpose of repairing.

承上所述,上述的实施例皆针对储存电容在共用配线上(Cst on common)的架构举例说明,然而任何熟悉该项技艺者应知,本发明的修补方法并不局限于储存电容在共用配线上的架构,亦可运用在储存电容在扫描配线(Cst on Gate)的架构上。Based on the above, the above-mentioned embodiments are all exemplified for the structure of the storage capacitor on the shared wiring (Cs on common), but anyone familiar with this technology should know that the repair method of the present invention is not limited to the storage capacitor on the common wiring. The structure on the shared wiring can also be applied to the structure of the storage capacitor on the scan wiring (Cs on Gate).

图12~图13,绘示为以本发明的修补方法针对储存电容在扫描配线的架构的薄膜晶体管阵列基板的修补后的示意图。其中图12及图13中的薄膜晶体管阵列基板为储存电容在扫描配线上(Cst on Gate)的薄膜晶体管阵列基板,其主要结构大致与图5相同,故仅针对技术相异点进行详细的说明如下。FIGS. 12 to 13 are schematic diagrams after repairing the thin film transistor array substrate with the structure of the storage capacitor on the scanning wiring by the repairing method of the present invention. The thin-film transistor array substrates in Figure 12 and Figure 13 are thin-film transistor array substrates with storage capacitors on the scanning wiring (Cs on Gate), and its main structure is roughly the same as that in Figure 5, so only technical differences will be described in detail. described as follows.

请参阅图12,本实施例的储存电容在扫描配线的架构中,每一个画素电极250的部分区域是延伸至对应的扫描配线220的上方,而图案化上电极270配置于每一个画素电极以及对应的扫描配线220之间,其中图案化上电极270包括多数个子上电极272,而每一个画素中的储存电容是由子上电极272与其下方的扫描配线220所构成。Please refer to FIG. 12 , in the structure of the scanning wiring of the storage capacitor in this embodiment, a part of each pixel electrode 250 extends above the corresponding scanning wiring 220, and a patterned upper electrode 270 is arranged on each pixel. Between the electrodes and the corresponding scanning lines 220 , the patterned upper electrode 270 includes a plurality of sub-upper electrodes 272 , and the storage capacitor in each pixel is formed by the sub-upper electrodes 272 and the scanning lines 220 below them.

请参阅图13,图案化上电极270同样配置于每一个画素电极以及对应的扫描配线220之间,且图案化上电极270包括多数个子上电极272,而在每一个画素电极250下方的各个子上电极272间更包括以一颈缩部274相连,此颈缩部274是用以作为修补时的切割区。Please refer to FIG. 13 , the patterned upper electrode 270 is also arranged between each pixel electrode and the corresponding scanning wiring 220, and the patterned upper electrode 270 includes a plurality of sub-upper electrodes 272, and each sub-electrode 272 under each pixel electrode 250 The sub-upper electrodes 272 are further connected by a constricted part 274, and the constricted part 274 is used as a cutting area during repairing.

无可避免的,当上述这些子上电极272其中之一与对应的扫描配线220之间具有一粒子20或破洞时,子上电极272a与共用配线260之间会发生泄漏(leakage)的情形。此时,即需要对上述显示异常的画素进行修补的动作,而其修补方法主要是为移除与瑕疵电容中的子上电极272a对应的画素电极250的部分区域,以令瑕疵电容中的子上电极272a与对应的画素电极250电性绝缘。Inevitably, when there is a particle 20 or a hole between one of the sub-upper electrodes 272 and the corresponding scanning wiring 220, leakage will occur between the sub-upper electrode 272a and the common wiring 260. situation. At this point, it is necessary to repair the above-mentioned pixels with abnormal display, and the repair method is mainly to remove the part of the pixel electrode 250 corresponding to the sub-upper electrode 272a in the defective capacitor, so that the sub-electrode 272a in the defective capacitor can be repaired. The upper electrode 272a is electrically insulated from the corresponding pixel electrode 250 .

请参阅图12,以本实施例而言,其修补方法为移除与瑕疵电容中的子上电极272a对应的画素电极250的部分区域,以形成一如同前述的实施例的开口252,藉由此开口252使瑕疵电容中的子上电极272a与对应的画素电极250电性绝缘。本实施例中,移除画素电极250的部分区域的方式例如是激光移除。Please refer to FIG. 12 , in this embodiment, the repair method is to remove a part of the pixel electrode 250 corresponding to the sub-upper electrode 272a in the defective capacitor to form an opening 252 as in the previous embodiment, by The opening 252 electrically insulates the sub-upper electrode 272 a in the defective capacitor from the corresponding pixel electrode 250 . In this embodiment, the method of removing a part of the pixel electrode 250 is, for example, laser removal.

请参阅图13,以本实施例而言,其修补方法除了移除与瑕疵电容中的子上电极272a对应的画素电极250的部分区域,以形成一如同前述的实施例的开口252,更包括切断与瑕疵电容中的子上电极272a连接的颈缩部274,以使瑕疵电容中的子上电极272a与对应的画素电极250电性绝缘,而移除画素电极250的部分区域的方式例如是激光移除,且切断颈缩部274的方法例如是激光切割。Please refer to FIG. 13. In this embodiment, the repairing method includes removing a part of the pixel electrode 250 corresponding to the sub-upper electrode 272a in the defective capacitor to form an opening 252 as in the previous embodiment. Cut off the constricted portion 274 connected to the sub-upper electrode 272a in the defective capacitor, so that the sub-upper electrode 272a in the defective capacitor is electrically insulated from the corresponding pixel electrode 250, and the method of removing a part of the pixel electrode 250 is, for example, The method of laser removing and cutting the constricted portion 274 is, for example, laser cutting.

承上所述,在移除与瑕疵电容中的子上电极对应的画素电极的部分区域之后,更可将瑕疵电容中的子上电极与其对应的扫描配线例如以激光熔接的方式电性连接。同样地,若当画素电极与其对应的扫描配线具有一粒子(或破洞)时,更可以激光移除的方式移除对应于此粒子(或破洞)上方的画素电极的区域。再者,在形成画素电极的同时,可先在每一个画素电极上开设一至多个如同前述图9A~9D所揭露的开口,以便于进行后续激光修补的动作。Based on the above, after removing the partial area of the pixel electrode corresponding to the sub-upper electrode in the defective capacitor, the sub-upper electrode in the defective capacitor can be electrically connected to the corresponding scanning wiring, for example, by laser welding . Similarly, if there is a particle (or hole) between the pixel electrode and its corresponding scanning wiring, the region corresponding to the pixel electrode above the particle (or hole) can be removed by laser removal. Moreover, while forming the pixel electrodes, one or more openings as disclosed in the above-mentioned FIGS. 9A-9D can be opened on each pixel electrode, so as to facilitate subsequent laser repairing operations.

值得注意的是,本发明的修补方法除了可针对上述具有图案化上电极的薄膜晶体管阵列基板进行修补之外,更可针对仅具有单一上电极的薄膜晶体管阵列基板进行修补。It is worth noting that the repairing method of the present invention can not only repair the thin film transistor array substrate with patterned upper electrode, but also repair the thin film transistor array substrate with only a single upper electrode.

图14~15绘示为以本发明的修补方法针对习知薄膜晶体管阵列基板的修补后的示意图。请参阅图14~15,习知薄膜晶体管阵列基板100主要在每一个画素电极150以及对应的共用配线160之间配置单一上电极170,当任一上电极170与对应的共用配线160之间具有一粒子10(或破洞)时,亦可利用本发明的修补方法进行修补。本实施例的修补方法主要先移除与瑕疵电容中的上电极170a所对应的画素电极150的部分区域,以使瑕疵电容中的上电极170a与对应的画素电极150电性绝缘。接着将瑕疵电容中的上电极170a与对应的共用配线160相熔接,当然,熟习此项技术的人士可视瑕疵电容中的泄漏情况而决定是否将瑕疵电容中的上电极170a与对应的共用配线160相熔接。14 to 15 are schematic diagrams after repairing a conventional thin film transistor array substrate by the repairing method of the present invention. Please refer to FIGS. 14-15 , the conventional thin film transistor array substrate 100 mainly arranges a single upper electrode 170 between each pixel electrode 150 and the corresponding common wiring 160 , when any upper electrode 170 and the corresponding common wiring 160 When there is a particle 10 (or hole) between them, the repairing method of the present invention can also be used for repairing. The repairing method of this embodiment mainly removes the part of the pixel electrode 150 corresponding to the upper electrode 170 a in the defective capacitor, so that the upper electrode 170 a in the defective capacitor is electrically insulated from the corresponding pixel electrode 150 . Then, the upper electrode 170a in the defective capacitor is welded to the corresponding common wiring 160. Of course, those skilled in the art can decide whether to connect the upper electrode 170a in the defective capacitor to the corresponding common wiring according to the leakage situation in the defective capacitor. The wiring 160 is welded.

以本实施例而言,例如是将对应于瑕疵电容中的上电极170a上方的画素电极150的部分区域移除以形成一开口152,其移除的方法例如是以激光移除的方式进行,且此开口152位于瑕疵电容中的上电极170a与对应的画素电极150所接触的区域周围(即接触窗192的周围),藉由此开口152使瑕疵电容中的上电极170a与对应的画素电极150电性绝缘。接着,例如是以激光熔接的方式将瑕疵电容中的上电极170a与对应的共用配线160相熔接(如标示B处),以使瑕疵电容中的上电极170a与对应的共用配线160成为等电位。In this embodiment, for example, a portion of the pixel electrode 150 corresponding to the upper electrode 170a in the defective capacitor is removed to form an opening 152, and the removal method is, for example, laser removal. And this opening 152 is located around the area where the upper electrode 170a in the defective capacitor contacts the corresponding pixel electrode 150 (that is, around the contact window 192), and the upper electrode 170a in the defective capacitor is connected to the corresponding pixel electrode through the opening 152. 150 electrical insulation. Next, for example, the upper electrode 170a in the defective capacitor is welded to the corresponding common wiring 160 by means of laser welding (as indicated at B), so that the upper electrode 170a in the defective capacitor and the corresponding common wiring 160 become Equipotential.

当然,当画素电极150与对应的共用配线160之间具有一粒子或破洞(图未示)时,更可以激光移除的方式移除对应于此粒子或破洞上方的画素电极150的区域。Of course, when there is a particle or a hole (not shown) between the pixel electrode 150 and the corresponding common wiring 160, the pixel electrode 150 above the particle or hole can be removed by laser removal. area.

此外,请参阅图16A~16D,其绘示在习知薄膜晶体管阵列基板的画素电极上形成开口的示意图。为了使修补的制程能更为快速、简便,习知的薄膜晶体管阵列基板在形成画素电极150时,亦可同时开设一至多个开口154,例如是一直条状开口154(如图16A)、两直条状开口154(如图16B)、或一L型开口154(如图16C)或一U字型开口154(如图16D),这些开口154与前述图9A~9D所揭露的开口相同,在此即不赘述。In addition, please refer to FIGS. 16A-16D , which are schematic views of forming openings on pixel electrodes of a conventional thin film transistor array substrate. In order to make the repairing process faster and easier, when forming the pixel electrode 150 on the conventional thin film transistor array substrate, one or more openings 154 can also be opened at the same time, such as a straight strip opening 154 (as shown in FIG. 16A ), two A straight opening 154 (as shown in FIG. 16B ), or an L-shaped opening 154 (as shown in FIG. 16C ) or a U-shaped opening 154 (as shown in FIG. 16D ), these openings 154 are the same as the openings disclosed in the aforementioned FIGS. 9A-9D , I won't go into details here.

由上可知,习知薄膜晶体管阵列基板100,原本藉由单一上电极170与对应的画素电极150电性连接,而与对应的共用配线160之间构成一金属-绝缘-金属结构(Metal-Insulator-Metal Structure)的储存电容,而当任一上电极170(如上电极170a)与对应的共用配线160之间具有粒子10(或破洞)时,本实施例可藉由移除与瑕疵电容中的上电极170a所对应的画素电极150的部分区域,以使瑕疵电容中的上电极170a与对应的画素电极150电性绝缘,并将瑕疵电容中的上电极170a与对应的共用配线160相熔接的方式,使画素电极150与瑕疵电容中的上电极170a之间构成一金属-绝缘-画素电极结构(Metal-Insulator-ITO Structure)的储存电容,进而达到修补的目的。It can be seen from the above that the conventional thin film transistor array substrate 100 is originally electrically connected to the corresponding pixel electrode 150 through a single upper electrode 170, and forms a metal-insulation-metal structure (Metal-insulation-metal structure) with the corresponding common wiring 160. Insulator-Metal Structure), and when there are particles 10 (or holes) between any upper electrode 170 (such as the upper electrode 170a) and the corresponding common wiring 160, this embodiment can be removed and defective The partial area of the pixel electrode 150 corresponding to the upper electrode 170a in the capacitor, so that the upper electrode 170a in the defective capacitor is electrically insulated from the corresponding pixel electrode 150, and the upper electrode 170a in the defective capacitor is connected to the corresponding common wiring The method of 160-phase welding makes the pixel electrode 150 and the upper electrode 170a of the defect capacitor form a metal-insulator-pixel electrode structure (Metal-Insulator-ITO Structure) storage capacitor, thereby achieving the purpose of repair.

值得注意的是,图14~15中的薄膜晶体管阵列基板100是以储存电容在共用配线(Cst on common)上的基板举例说明。当然,熟悉该项技术者应知,本发明的修补方法亦可运用在习知储存电容在闸极上(Cst on gate)的基板,在此即不赘述。It should be noted that the thin film transistor array substrate 100 in FIGS. 14-15 is illustrated as an example of a substrate with storage capacitors on a common wiring (Cs on common). Certainly, those who are familiar with this technology should know that the repairing method of the present invention can also be applied to the conventional substrate with the storage capacitor on the gate (Cs on gate), which will not be repeated here.

另外,基于上述的概念,熟悉该项技术者应知,本发明的薄膜晶体管阵列基板更可运用至一种多重区域垂直排列型液晶显示器(Multi-domainVertical Alignment liquid crystal display,MVA-LCD)中。此种液晶显示器主要是将其中的画素电极形成多数条的沟槽(slit),使两基板间的电场方向改变,并使两基板间的液晶能以多区域平均的方式排列,进而达到液晶显示面板的广视角目的。In addition, based on the above concept, those skilled in the art should know that the thin film transistor array substrate of the present invention can be applied to a Multi-domain Vertical Alignment liquid crystal display (MVA-LCD). This kind of liquid crystal display is mainly to form a plurality of grooves (slits) in the pixel electrodes, so that the direction of the electric field between the two substrates is changed, and the liquid crystal between the two substrates can be arranged in a multi-region average manner, thereby achieving liquid crystal display. Wide viewing angle purpose of the panel.

请参阅图17,其绘示为以本发明再一较佳实施例运用在多重区域垂直排列型液晶显示器的架构的薄膜晶体管阵列基板示意图。本实施例的薄膜晶体管阵列基板300主要结构大致与图1所揭露习知的薄膜晶体管阵列基板相同,而在下文中仅针对相异处进行说明。Please refer to FIG. 17 , which is a schematic diagram of a thin film transistor array substrate applied to a structure of a multi-area vertical alignment liquid crystal display according to another preferred embodiment of the present invention. The main structure of the thin film transistor array substrate 300 of this embodiment is substantially the same as that of the conventional thin film transistor array substrate disclosed in FIG. 1 , and only the differences will be described below.

在薄膜晶体管阵列基板300的每一个画素电极350上具有至少一第一沟槽352及至少一第二沟槽354,第一沟槽352的延伸方向与第二沟槽354的延伸方向不同,且例如是与扫描配线320、资料配线330或共用配线360的延伸方向不同。此外,在形成第一沟槽352与第二沟槽354的同时,将其中一第一沟槽352与其对应的一第二沟槽354相连通,而上电极370与对应的画素电极350的电性连接处(即接触窗392处)例如是邻近于此第一沟槽352与第二沟槽354的相连通处356,且上电极370适于与对应的共用配线360耦合形成一电容。Each pixel electrode 350 of the thin film transistor array substrate 300 has at least one first groove 352 and at least one second groove 354, the extending direction of the first groove 352 is different from the extending direction of the second groove 354, and For example, it is different from the extending direction of the scan wiring 320 , the data wiring 330 or the common wiring 360 . In addition, while forming the first trench 352 and the second trench 354, one of the first trenches 352 is connected to a corresponding second trench 354, and the upper electrode 370 is connected to the corresponding pixel electrode 350. The connection point (that is, the contact window 392 ) is, for example, adjacent to the connection point 356 between the first trench 352 and the second trench 354 , and the upper electrode 370 is suitable for coupling with the corresponding common wiring 360 to form a capacitor.

值得注意的是,当上电极370与对应的共用配线360之间具有一粒子或破洞而使上电极370共用配线360所构成的储存电容成为一瑕疵电容时,则需要进行修补。请参阅图18,其绘示为以本发明的修补方法运用在多重区域垂直排列型液晶显示器的架构的薄膜晶体管阵列基板的修补后的示意图。此修补方法是先移除此瑕疵电容中的上电极370所对应的画素电极350的一部分区域,此部分区域在本实施例中是为上电极370与对应的画素电极350的电性连接处(即接触窗392)的周围,以令瑕疵电容中的上电极370与对应的画素电极350电性绝缘。换言之,即藉由移除覆盖于上电极370上的较小面积的画素电极350的部分区域(即接触窗392的周围),使瑕疵电容中的上电极370与对应的画素电极350电性绝缘。由于本实施例是移除覆盖于上电极370上的较小面积的画素电极350的部分区域,因此在修补后仍可维持较大的电容值。It is worth noting that when there is a particle or a hole between the upper electrode 370 and the corresponding common wiring 360 so that the storage capacitor formed by the common wiring 360 of the upper electrode 370 becomes a defective capacitor, it needs to be repaired. Please refer to FIG. 18 , which is a schematic diagram of a repaired thin film transistor array substrate applied to a structure of a multi-area vertical alignment liquid crystal display using the repairing method of the present invention. The repairing method is to first remove a part of the pixel electrode 350 corresponding to the upper electrode 370 in the defective capacitor, which is the electrical connection between the upper electrode 370 and the corresponding pixel electrode 350 in this embodiment ( That is, the surroundings of the contact window 392 ) are used to electrically insulate the upper electrode 370 in the defective capacitor from the corresponding pixel electrode 350 . In other words, the upper electrode 370 in the defective capacitor is electrically insulated from the corresponding pixel electrode 350 by removing a part of the pixel electrode 350 covering the upper electrode 370 with a smaller area (ie, around the contact window 392 ). . Since in this embodiment, a small area of the pixel electrode 350 covering the upper electrode 370 is removed, a large capacitance value can still be maintained after repairing.

接着,更可将此瑕疵电容中的上电极370与对应的共用配线360相熔接,以使瑕疵电容中的上电极370与对应的共用配线360成为等电位。同样地,熟习此项技术的人士可视瑕疵电容中的泄漏情况而决定是否将瑕疵电容中的上电极370与对应的共用配线360相熔接。Next, the upper electrode 370 in the defective capacitor and the corresponding common wiring 360 can be welded together, so that the upper electrode 370 in the defective capacitor and the corresponding common wiring 360 become equipotential. Similarly, those skilled in the art can decide whether to weld the upper electrode 370 in the defective capacitor to the corresponding common wiring 360 according to the leakage in the defective capacitor.

承上所述,原本藉由单一上电极370与对应的画素电极350电性连接,而与对应的共用配线360之间构成一金属-绝缘-金属结构(MIM Structure)的储存电容,当上电极370与对应的共用配线360之间具有一粒子或破洞而使上电极370与共用配线360所构成的储存电容成为一瑕疵电容时,移除接触窗392周围的画素电极350,以使得上电极370与画素电极350电性绝缘,画素电极350与瑕疵电容中的上电极370之间构成一金属-绝缘-画素电极结构(MII Structure)的储存电容,进而达到修补的目的。Based on the above, originally a single upper electrode 370 is electrically connected to the corresponding pixel electrode 350, and forms a metal-insulation-metal structure (MIM Structure) storage capacitor with the corresponding common wiring 360. When there is a particle or hole between the electrode 370 and the corresponding common wiring 360 so that the storage capacitance formed by the upper electrode 370 and the common wiring 360 becomes a defective capacitance, remove the pixel electrode 350 around the contact window 392 to The upper electrode 370 is electrically insulated from the pixel electrode 350, and a metal-insulation-pixel electrode structure (MII Structure) storage capacitor is formed between the pixel electrode 350 and the upper electrode 370 of the defect capacitor, thereby achieving the purpose of repair.

当然,本实施例中的薄膜晶体管阵列基板300,当上述的画素电极350以及对应的共用配线360之间具有一粒子或破洞时,本发明的修补方法同样可移除对应于粒子或破洞上方的画素电极350,以使粒子或破洞与此画素电极350电性绝缘。Of course, in the thin film transistor array substrate 300 in this embodiment, when there is a particle or a hole between the above-mentioned pixel electrode 350 and the corresponding common wiring 360, the repair method of the present invention can also remove the corresponding particle or hole. The pixel electrode 350 above the hole, so that the particles or holes are electrically insulated from the pixel electrode 350 .

以上所述,仅是本发明的较佳实施例而已,并非对本发明作任何形式上的限制,虽然本发明已以较佳实施例揭露如上,然而并非用以限定本发明,任何熟悉本专业的技术人员,在不脱离本发明技术方案范围内,当可利用上述揭示的方法及技术内容作出些许的更动或修饰为等同变化的等效实施例,但是凡是未脱离本发明技术方案的内容,依据本发明的技术实质对以上实施例所作的任何简单修改、等同变化与修饰,均仍属于本发明技术方案的范围内。The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any form. Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Anyone familiar with this field Those skilled in the art, without departing from the scope of the technical solution of the present invention, can use the method and technical content disclosed above to make some changes or modifications to equivalent embodiments with equivalent changes, but any content that does not depart from the technical solution of the present invention, Any simple modifications, equivalent changes and modifications made to the above embodiments according to the technical essence of the present invention still fall within the scope of the technical solution of the present invention.

Claims (58)

1.一种薄膜晶体管阵列基板,其特征在于其包括:1. A thin film transistor array substrate, characterized in that it comprises: 一基板;a substrate; 多数个扫描配线,配置于该基板上;A plurality of scanning wirings are arranged on the substrate; 多数个资料配线,配置于该基板上,其中该些扫描配线与该些资料配线是区分出多数个画素区域;A plurality of data wirings are arranged on the substrate, wherein the scanning wirings and the data wirings are used to distinguish a plurality of pixel areas; 多数个薄膜晶体管,每一该些薄膜晶体管是位于该些画素区域其中之一内,其中该些薄膜晶体管是藉由该些扫描配线驱动;a plurality of thin film transistors, each of the thin film transistors is located in one of the pixel areas, wherein the thin film transistors are driven by the scanning lines; 多数个画素电极,每一该些画素电极是位于该些画素区域其中之一内,以与对应之该些薄膜晶体管其中之一电性连接;a plurality of pixel electrodes, each of the pixel electrodes is located in one of the pixel regions to be electrically connected to one of the corresponding thin film transistors; 多数个共用配线,配置于该基板上,且每一该些画素电极之部分区域是位于对应的该些共用配线其中之一的上方;以及A plurality of common wirings are arranged on the substrate, and a partial area of each of the pixel electrodes is located above one of the corresponding common wirings; and 一图案化上电极,配置于每一该些画素电极以及该些共用配线其中之一之间,其中该图案化上电极包括多数个子上电极,且每一该些子上电极的部分区域是分别与对应的该些画素电极其中之一电性连接。A patterned upper electrode is arranged between each of the pixel electrodes and one of the common wirings, wherein the patterned upper electrode includes a plurality of sub-upper electrodes, and a partial area of each of the sub-upper electrodes is and are respectively electrically connected to one of the corresponding pixel electrodes. 2.根据权利要求1所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该图案化上电极更包括多数个颈缩部,每一该些颈缩部是连接于该些子上电极其中之二之间。2. The method for repairing a TFT array substrate according to claim 1, wherein the patterned upper electrode further comprises a plurality of constricted portions, each of which is connected to the sub-upper electrodes between the two. 3.根据权利要求2或3所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该些画素电极其中之一更包括至少一开口,且该开口位于每一该些子上电极的部分区域周围。3. The method for repairing a thin film transistor array substrate according to claim 2 or 3, wherein one of the pixel electrodes further includes at least one opening, and the opening is located in a partial area of each of the sub-upper electrodes around. 4.根据权利要求3所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该开口之形状包括直条状、L字型或U字型。4 . The method for repairing a thin film transistor array substrate according to claim 3 , wherein the shape of the opening includes straight, L-shaped or U-shaped. 5.根据权利要求3所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该开口之一部分位于每一该些子上电极的上方,且该开口的其余部分位于每一该些子上电极以外的区域。5. The method for repairing a thin film transistor array substrate according to claim 3, wherein a part of the opening is located above each of the sub-upper electrodes, and the rest of the opening is located above each of the sub-upper electrodes outside the area. 6.一种薄膜晶体管阵列基板,其特征在于其包括:6. A thin film transistor array substrate, characterized in that it comprises: 一基板;a substrate; 多数个扫描配线,配置于该基板上;A plurality of scanning wirings are arranged on the substrate; 多数个资料配线,配置于该基板上,其中该些扫描配线与该些资料配线是区分出多数个画素区域;A plurality of data wirings are arranged on the substrate, wherein the scanning wirings and the data wirings are used to distinguish a plurality of pixel areas; 多数个薄膜晶体管,每一该些薄膜晶体管是位于该些画素区域其中之一内,其中该些薄膜晶体管是藉由该些扫描配线驱动;a plurality of thin film transistors, each of the thin film transistors is located in one of the pixel areas, wherein the thin film transistors are driven by the scanning lines; 多数个画素电极,每一该些画素电极是位于该些画素区域其中之一内,以与对应之该些薄膜晶体管其中之一电性连接,且每一该些画素电极的部分区域是位于对应的该些扫描配线其中之一的上方;以及A plurality of pixel electrodes, each of the pixel electrodes is located in one of the pixel regions to be electrically connected with one of the corresponding thin film transistors, and each of the pixel electrodes is located in a partial area of the corresponding above one of the scan wires; and 一图案化上电极,配置于每一该些画素电极以及该些扫描配线其中之一之间,其中该图案化上电极包括多数个子上电极,且每一该些子上电极的部分区域是分别与对应之该些画素电极其中之一电性连接。A patterned upper electrode is disposed between each of the pixel electrodes and one of the scanning wirings, wherein the patterned upper electrode includes a plurality of sub-upper electrodes, and a partial area of each of the sub-upper electrodes is They are respectively electrically connected to one of the corresponding pixel electrodes. 7.根据权利要求6所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该图案化上电极更包括多数个颈缩部,每一该些颈缩部是连接于该些子上电极其中之二之间。7. The method for repairing a TFT array substrate according to claim 6, wherein the patterned upper electrode further comprises a plurality of constricted portions, each of which is connected to the sub-upper electrodes between the two. 8.根据权利要求6或7所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该些画素电极其中之一更包括至少一开口,且该开口位于每一该些子上电极的部分区域周围。8. The method for repairing a thin film transistor array substrate according to claim 6 or 7, wherein one of the pixel electrodes further includes at least one opening, and the opening is located in a partial area of each of the sub-upper electrodes around. 9.根据权利要求8所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该开口之形状包括直条状、L字型或U字型。9 . The method for repairing a thin film transistor array substrate according to claim 8 , wherein the shape of the opening includes straight, L-shaped or U-shaped. 10.根据权利要求8所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该开口的一部分位于每一该些子上电极的上方,且该开口的其余部分位于每一该些子上电极以外的区域。10. The method for repairing a thin film transistor array substrate according to claim 8, wherein a part of the opening is located above each of the sub-upper electrodes, and the rest of the opening is located above each of the sub-upper electrodes outside the area. 11.一种薄膜晶体管阵列基板,其特征在于其包括:11. A thin film transistor array substrate, characterized in that it comprises: 一基板;a substrate; 多数个扫描配线,配置于该基板上;A plurality of scanning wirings are arranged on the substrate; 多数个资料配线,配置于该基板上,其中该些扫描配线与该些资料配线是区分出多数个画素区域;A plurality of data wirings are arranged on the substrate, wherein the scanning wirings and the data wirings are used to distinguish a plurality of pixel areas; 多数个薄膜晶体管,每一该些薄膜晶体管是位于该些画素区域其中之一内,其中该些薄膜晶体管是藉由该些扫描配线驱动;a plurality of thin film transistors, each of the thin film transistors is located in one of the pixel areas, wherein the thin film transistors are driven by the scanning lines; 多数个画素电极,每一该些画素电极是位于该些画素区域其中之一内,以与对应的该些薄膜晶体管其中之一电性连接;a plurality of pixel electrodes, each of the pixel electrodes is located in one of the pixel regions, so as to be electrically connected with one of the corresponding thin film transistors; 多数个共用配线,配置于该基板上,且每一该些画素电极的部分区域是位于对应的该些共用配线其中之一的上方;以及A plurality of common wirings are arranged on the substrate, and a partial area of each of the pixel electrodes is located above one of the corresponding common wirings; and 一图案化上电极,配置于每一该些画素电极以及该些共用配线其中之一之间,该图案化上电极包括多数个子上电极,其中该些子上电极是与该些画素电极电性连接,且适于与该些共用配线其中之一耦合形成多数个电容,当其中至少一电容为一瑕疵电容时,该瑕疵电容中的子上电极是与对应的该些画素电极其中之一电性绝缘,而其他该些子上电极的部分区域是分别与对应的该些画素电极其中之一电性连接。A patterned upper electrode, arranged between each of the pixel electrodes and one of the common wirings, the patterned upper electrode includes a plurality of sub-upper electrodes, wherein the sub-upper electrodes are electrically connected to the pixel electrodes and is suitable for coupling with one of the shared wirings to form a plurality of capacitors. When at least one of the capacitors is a defective capacitor, the sub-upper electrode in the defective capacitor is connected to one of the corresponding pixel electrodes. One is electrically insulated, and some regions of the other sub-upper electrodes are respectively electrically connected to one of the corresponding pixel electrodes. 12.根据权利要求11所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该瑕疵电容中的子上电极与对应的该些共用配线其中之一相熔接。12 . The method for repairing a thin film transistor array substrate according to claim 11 , wherein the sub-upper electrode in the defective capacitor is welded to one of the corresponding common wirings. 13 . 13.根据权利要求11或12所述的薄膜晶体管阵列基板的修补方法,其特征在于其中当每一该些画素电极以及该些共用配线其中之一之间具有一粒子/破洞时,该些画素电极其中之一上更包括一开口,且该开口位于该粒子/破洞的上方,以使该粒子/破洞与该些画素电极其中之一电性绝缘。13. The method for repairing a thin film transistor array substrate according to claim 11 or 12, wherein when there is a particle/hole between each of the pixel electrodes and one of the common wirings, the One of the pixel electrodes further includes an opening, and the opening is located above the particle/hole, so that the particle/hole is electrically insulated from one of the pixel electrodes. 14.根据权利要求11所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该图案化上电极更包括多数个颈缩部,每一该些颈缩部是连接于该瑕疵电容中的子上电极以外的该些子上电极其中之二之间。14. The method for repairing a thin film transistor array substrate according to claim 11, wherein the patterned upper electrode further comprises a plurality of constricted portions, each of which is connected to a sub-circuit in the defective capacitor. Between two of the sub-upper electrodes other than the upper electrode. 15.根据权利要求14所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该瑕疵电容中的子上电极与对应的该些共用配线其中之一相熔接。15 . The method for repairing a thin film transistor array substrate according to claim 14 , wherein the sub-upper electrode in the defective capacitor is welded to one of the corresponding common wirings. 16 . 16.根据权利要求14或15所述的薄膜晶体管阵列基板的修补方法,其特征在于其中当每一该些画素电极以及该些共用配线其中之一之间具有一粒子/破洞时,该些画素电极其中之一上更包括一开口,且该开口位于该粒子/破洞之上方,以使该粒子/破洞与该些画素电极其中之一电性绝缘。16. The method for repairing a thin film transistor array substrate according to claim 14 or 15, wherein when there is a particle/hole between each of the pixel electrodes and one of the common wirings, the One of the pixel electrodes further includes an opening, and the opening is located above the particle/hole, so that the particle/hole is electrically insulated from one of the pixel electrodes. 17.一种薄膜晶体管阵列基板,其特征在于其包括:17. A thin film transistor array substrate, characterized in that it comprises: 一基板;a substrate; 多数个扫描配线,配置于该基板上;A plurality of scanning wirings are arranged on the substrate; 多数个资料配线,配置于该基板上,其中该些扫描配线与该些资料配线是区分出多数个画素区域;A plurality of data wirings are arranged on the substrate, wherein the scanning wirings and the data wirings are used to distinguish a plurality of pixel areas; 多数个薄膜晶体管,每一该些薄膜晶体管是位于该些画素区域其中之一内,其中该些薄膜晶体管是藉由该些扫描配线驱动;a plurality of thin film transistors, each of the thin film transistors is located in one of the pixel areas, wherein the thin film transistors are driven by the scanning lines; 多数个画素电极,每一该些画素电极是位于该些画素区域其中之一内,以与对应的该些薄膜晶体管其中之一电性连接,且每一该些画素电极的部分区域是位于对应之该些扫描配线其中之一的上方;以及A plurality of pixel electrodes, each of the pixel electrodes is located in one of the pixel regions to be electrically connected to one of the corresponding thin film transistors, and a partial area of each of the pixel electrodes is located in the corresponding above one of the scanning wires; and 一图案化上电极,配置于每一该些画素电极以及该些扫描配线其中之一之间,该图案化上电极包括多数个子上电极,其中该些子上电极是与该些画素电极电性连接,且适于与该些扫瞄配线其中之一耦合形成多数个电容,当其中至少一该些电容为一瑕疵电容时,该瑕疵子上电极是与对应的该些画素电极其中之一电性绝缘,而其他该些子上电极的部分区域是分别与对应的该些画素电极其中之一电性连接。A patterned upper electrode, arranged between each of the pixel electrodes and one of the scanning wirings, the patterned upper electrode includes a plurality of sub-upper electrodes, wherein the sub-upper electrodes are electrically connected to the pixel electrodes and is suitable for coupling with one of the scanning wirings to form a plurality of capacitors. When at least one of the capacitors is a defective capacitor, the defective upper electrode is connected to one of the corresponding pixel electrodes. One is electrically insulated, and some regions of the other sub-upper electrodes are respectively electrically connected to one of the corresponding pixel electrodes. 18.根据权利要求17所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该瑕疵电容中的子上电极与对应的该些共用配线其中之一相熔接。18 . The method for repairing a thin film transistor array substrate according to claim 17 , wherein the sub-upper electrode in the defective capacitor is welded to one of the corresponding common wirings. 19 . 19.根据权利要求17或18所述的薄膜晶体管阵列基板的修补方法,其特征在于其中当每一该些画素电极以及该些共用配线其中之一之间具有一粒子/破洞时,该些画素电极其中之一上更包括一开口,且该开口位于该粒子/破洞之上方,以使该粒子/破洞与该些画素电极其中之一电性绝缘。19. The method for repairing a thin film transistor array substrate according to claim 17 or 18, wherein when there is a particle/hole between each of the pixel electrodes and one of the common wirings, the One of the pixel electrodes further includes an opening, and the opening is located above the particle/hole, so that the particle/hole is electrically insulated from one of the pixel electrodes. 20.根据权利要求17所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该图案化上电极更包括多数个颈缩部,每一该些颈缩部是连接于该瑕疵电容中的子上电极以外的该些子上电极其中之二之间。20. The method for repairing a thin film transistor array substrate according to claim 17, wherein the patterned upper electrode further comprises a plurality of constricted portions, each of which is connected to a sub-circuit in the defective capacitor. Between two of the sub-upper electrodes other than the upper electrode. 21.根据权利要求20所述的薄膜晶体管阵列基板的修补方法,其特征在21. The repairing method of thin film transistor array substrate according to claim 20, it is characterized in that 于其中该瑕疵电容中的子上电极与对应的该些共用配线其中之一相熔接。Wherein the sub-upper electrode in the defective capacitor is welded to one of the corresponding common wirings. 22.根据权利要求20或21所述的薄膜晶体管阵列基板的修补方法,其特征在于其中当每一该些画素电极以及该些共用配线其中之一之间具有一粒子/破洞时,该些画素电极其中之一上更包括一开口,且该开口位于该粒子/破洞的上方,以使该粒子/破洞与该些画素电极其中之一电性绝缘。22. The method for repairing a thin film transistor array substrate according to claim 20 or 21, wherein when there is a particle/hole between each of the pixel electrodes and one of the common wirings, the One of the pixel electrodes further includes an opening, and the opening is located above the particle/hole, so that the particle/hole is electrically insulated from one of the pixel electrodes. 23.一种薄膜晶体管阵列基板的修补方法,适于对权利要求1或6的薄膜晶体管阵列基板进行修补,其特征在于当该些子上电极其中之一与对应的该些共用配线其中之一或该些扫描配线其中之一之间具有一第一粒子/破洞时,其所形成的电容为一瑕疵电容,该修补方法包括:23. A method for repairing a thin film transistor array substrate, suitable for repairing the thin film transistor array substrate according to claim 1 or 6, characterized in that when one of the sub-upper electrodes and one of the corresponding common wirings One or when there is a first particle/hole between one of the scanning wires, the capacitance formed is a defective capacitance, and the repair method includes: 移除与该瑕疵电容中的子上电极对应之该些画素电极其中之一的部分区域,以令该瑕疵电容中的子上电极与对应的该些画素电极其中之一电性绝缘。A partial area of one of the pixel electrodes corresponding to the sub-upper electrode in the defective capacitor is removed, so that the sub-upper electrode in the defective capacitor is electrically insulated from the corresponding one of the pixel electrodes. 24.根据权利要求23所述的薄膜晶体管阵列基板的修补方法,其特征在于其中移除与该瑕疵电容中的子上电极对应的该些画素电极其中之一的部分区域的方法包括激光移除。24. The method for repairing a thin film transistor array substrate according to claim 23, wherein the method of removing a partial area of one of the pixel electrodes corresponding to the sub-upper electrode in the defective capacitor comprises laser removal . 25.根据权利要求23所述的薄膜晶体管阵列基板的修补方法,其特征在于其中在移除与该瑕疵电容中的子上电极对应的该些画素电极其中之一的部分区域之后,该修补方法更包括:25. The method for repairing a thin film transistor array substrate according to claim 23, wherein after removing a partial area of one of the pixel electrodes corresponding to the sub-upper electrode in the defective capacitor, the repair method Also includes: 将该瑕疵电容中的子上电极与对应的该些共用配线其中之一或该些扫描配线其中之一相熔接。The sub-upper electrode in the defective capacitor is welded to the corresponding one of the common wirings or one of the scanning wirings. 26.根据权利要求25所述的薄膜晶体管阵列基板的修补方法,其特征在于其中将该瑕疵电容中的子上电极与对应的该些共用配线其中之一或该些扫描配线其中之一相熔接之方法包括激光熔接。26. The method for repairing a thin film transistor array substrate according to claim 25, wherein the sub-upper electrode in the defective capacitor is connected to one of the corresponding common wirings or one of the scanning wirings Methods of welding include laser welding. 27.根据权利要求23或25所述的薄膜晶体管阵列基板的修补方法,其特征在于其中当该些画素电极其中之一与对应之该些共用配线其中之一或该些扫描配线其中之一之间具有一第二粒子/破洞时,该修补方法更包括:27. The method for repairing a thin film transistor array substrate according to claim 23 or 25, wherein when one of the pixel electrodes corresponds to one of the common wirings or one of the scanning wirings When there is a second particle/hole between one, the repairing method further includes: 移除对应于该第二粒子/破洞上方的该些画素电极其中之一的区域,以使该第二粒子/破洞与该些画素电极其中之一电性绝缘。A region corresponding to one of the pixel electrodes above the second particle/hole is removed, so that the second particle/hole is electrically insulated from one of the pixel electrodes. 28.根据权利要求27所述的薄膜晶体管阵列基板的修补方法,其特征在于其中移除对应于该第二粒子/破洞上方之该些画素电极其中之一的区域之方法包括激光移除。28. The method for repairing a thin film transistor array substrate according to claim 27, wherein the method of removing the area corresponding to one of the pixel electrodes above the second particle/hole comprises laser removal. 29.一种薄膜晶体管阵列基板的修补方法,适于对权利要求2或7的薄膜晶体管阵列基板进行修补,其特征在于当该些子上电极其中之一与对应的该些共用配线其中之一或该些扫描配线其中之一之间具有一第一粒子/破洞时,其所形成的电容为一瑕疵电容,而该修补方法包括:29. A method for repairing a thin film transistor array substrate, suitable for repairing the thin film transistor array substrate according to claim 2 or 7, characterized in that when one of the sub-upper electrodes and one of the corresponding common wirings One or when there is a first particle/hole between one of the scanning wires, the capacitance formed is a defective capacitance, and the repairing method includes: 移除与该瑕疵电容中的子上电极对应的该些画素电极其中之一的部分区域;以及removing a partial area of one of the pixel electrodes corresponding to the sub-upper electrode in the defective capacitor; and 切断与该瑕疵电容中的子上电极连接的颈缩部,以令该瑕疵电容中的子上电极与对应之该些画素电极其中之一电性绝缘。Cutting off the constricted portion connected to the sub-upper electrode in the defective capacitor, so as to electrically insulate the sub-upper electrode in the defective capacitor from the corresponding one of the pixel electrodes. 30.根据权利要求29所述的薄膜晶体管阵列基板的修补方法,其特征在于移除与该瑕疵电容中的子上电极对应的该些画素电极其中之一的部分区域的方法包括激光移除。30. The method for repairing a thin film transistor array substrate according to claim 29, wherein the method of removing a partial area of one of the pixel electrodes corresponding to the sub-upper electrode in the defective capacitor comprises laser removal. 31.根据权利要求29所述的薄膜晶体管阵列基板的修补方法,其特征在于切断与该瑕疵电容中的子上电极连接的颈缩部的方法包括激光切割。31. The method for repairing a thin film transistor array substrate according to claim 29, wherein the method of cutting off the constricted portion connected to the sub-upper electrode in the defective capacitor comprises laser cutting. 32.根据权利要求29所述的薄膜晶体管阵列基板的修补方法,其特征在于其中切断与该瑕疵电容中的子上电极连接的颈缩部之后,该修补方法更包括:32. The method for repairing a thin film transistor array substrate according to claim 29, wherein after cutting off the constriction connected to the sub-upper electrode in the defective capacitor, the repair method further comprises: 将该瑕疵电容中的子上电极与对应的该些共用配线其中之一或该些扫描配线其中之一相熔接。The sub-upper electrode in the defective capacitor is welded to the corresponding one of the common wirings or one of the scanning wirings. 33.根据权利要求32所述的薄膜晶体管阵列基板的修补方法,其特征在于其中将该瑕疵电容中的子上电极与对应的该些共用配线其中之一或该些扫描配线其中之一相熔接的方法包括激光熔接。33. The method for repairing a thin film transistor array substrate according to claim 32, wherein the sub-upper electrode in the defective capacitor is connected to one of the corresponding common wirings or one of the scanning wirings Methods of welding include laser welding. 34.根据权利要求29或32所述的薄膜晶体管阵列基板的修补方法,其特征在于其中当该些画素电极其中之一与对应之该些共用配线其中之一或该些扫描配线其中之一之间具有一第二粒子/破洞时,该修补方法更包括:34. The method for repairing a thin film transistor array substrate according to claim 29 or 32, wherein when one of the pixel electrodes and one of the corresponding common wirings or one of the scanning wirings When there is a second particle/hole between one, the repairing method further includes: 移除对应于该第二粒子/破洞上方的该些画素电极其中之一的区域,以使该第二粒子/破洞与该些画素电极其中之一电性绝缘。A region corresponding to one of the pixel electrodes above the second particle/hole is removed, so that the second particle/hole is electrically insulated from one of the pixel electrodes. 35.根据权利要求34所述的薄膜晶体管阵列基板的修补方法,其特征在于其中移除对应于该第二粒子/破洞上方的该些画素电极其中之一的区域的方法包括激光移除。35. The method for repairing a thin film transistor array substrate according to claim 34, wherein the method of removing the region corresponding to one of the pixel electrodes above the second particle/hole comprises laser removal. 36.一种薄膜晶体管阵列基板,其特征在于其包括:36. A thin film transistor array substrate, characterized in that it comprises: 一基板;a substrate; 多数个扫描配线,配置于该基板上;A plurality of scanning wirings are arranged on the substrate; 多数个资料配线,配置于该基板上,其中该些扫描配线与该些资料配线是区分出多数个画素区域;A plurality of data wirings are arranged on the substrate, wherein the scanning wirings and the data wirings are used to distinguish a plurality of pixel areas; 多数个薄膜晶体管,每一该些薄膜晶体管是位于该些画素区域其中之一内,其中该些薄膜晶体管是藉由该些扫描配线驱动;a plurality of thin film transistors, each of the thin film transistors is located in one of the pixel areas, wherein the thin film transistors are driven by the scanning lines; 多数个画素电极,每一该些画素电极是位于该些画素区域其中之一内,以与对应的该些薄膜晶体管其中之一电性连接;a plurality of pixel electrodes, each of the pixel electrodes is located in one of the pixel regions, so as to be electrically connected with one of the corresponding thin film transistors; 多数个共用配线,配置于该基板上,且每一该些画素电极的部分区域是位于对应的该些共用配线其中之一的上方;以及A plurality of common wirings are arranged on the substrate, and a partial area of each of the pixel electrodes is located above one of the corresponding common wirings; and 一上电极,配置于每一该些画素电极以及该些共用配线其中之一之间,其中该上电极是与该些画素电极其中之一电性连接,且适于与该些共用配线其中之一耦合形成一电容,当该电容为一瑕疵电容时,该瑕疵电容中的上电极与对应的该些画素电极其中之一电性绝缘。An upper electrode is disposed between each of the pixel electrodes and one of the common wirings, wherein the upper electrode is electrically connected to one of the pixel electrodes and is suitable for connecting with the common wirings One of them is coupled to form a capacitor. When the capacitor is a defective capacitor, the upper electrode in the defective capacitor is electrically insulated from the corresponding one of the pixel electrodes. 37.根据权利要求36所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该瑕疵电容中的上电极与对应的该些共用配线其中之一相熔接。37. The method for repairing a TFT array substrate according to claim 36, wherein the upper electrode of the defective capacitor is welded to one of the corresponding common wirings. 38.根据权利要求36所述的薄膜晶体管阵列基板的修补方法,其特征在于其中当每一该些画素电极以及该些共用配线其中之一之间具有一粒子/破洞时,该些画素电极其中之一上更包括一开口,且该开口位于该粒子/破洞的上方,以使该粒子/破洞与该些画素电极其中之一电性绝缘。38. The method for repairing a thin film transistor array substrate according to claim 36, wherein when there is a particle/hole between each of the pixel electrodes and one of the common wirings, the pixels One of the electrodes further includes an opening, and the opening is located above the particle/hole so as to electrically insulate the particle/hole from one of the pixel electrodes. 39.一种薄膜晶体管阵列基板,其特征在于其包括:39. A thin film transistor array substrate, characterized in that it comprises: 一基板;a substrate; 多数个扫描配线,配置于该基板上;A plurality of scanning wirings are arranged on the substrate; 多数个资料配线,配置于该基板上,其中该些扫描配线与该些资料配线是区分出多数个画素区域;A plurality of data wirings are arranged on the substrate, wherein the scanning wirings and the data wirings are used to distinguish a plurality of pixel areas; 多数个薄膜晶体管,每一该些薄膜晶体管是位于该些画素区域其中之一内,其中该些薄膜晶体管是藉由该些扫描配线驱动;a plurality of thin film transistors, each of the thin film transistors is located in one of the pixel areas, wherein the thin film transistors are driven by the scanning lines; 多数个画素电极,每一该些画素电极是位于该些画素区域其中之一内,以与对应的该些薄膜晶体管其中之一电性连接,且每一该些画素电极的部分区域是位于对应的该些扫描配线其中之一的上方;以及A plurality of pixel electrodes, each of the pixel electrodes is located in one of the pixel regions to be electrically connected to one of the corresponding thin film transistors, and a partial area of each of the pixel electrodes is located in the corresponding above one of the scan wires; and 一上电极,配置于每一该些画素电极以及该些扫描配线其中之一之间,其中该上电极是与该些画素电极其中之一电性连接,且适于与该些共用配线其中之一耦合形成电容,当该电容为一瑕疵电容时,该瑕疵电容中的上电极与对应的该些画素电极其中之一电性绝缘。An upper electrode is disposed between each of the pixel electrodes and one of the scanning wirings, wherein the upper electrode is electrically connected to one of the pixel electrodes and is suitable for connecting with the common wiring One of them is coupled to form a capacitor. When the capacitor is a defective capacitor, the upper electrode in the defective capacitor is electrically insulated from the corresponding one of the pixel electrodes. 40.根据权利要求39所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该瑕疵电容中的上电极与对应的该些扫描配线其中之一相熔接。40. The method for repairing a thin film transistor array substrate according to claim 39, wherein the upper electrode of the defective capacitor is welded to one of the corresponding scanning wires. 41.根据权利要求39所述的薄膜晶体管阵列基板的修补方法,其特征在于其中当每一该些画素电极以及该些共用配线其中之一之间具有一粒子/破洞时,该些画素电极其中之一上更包括一开口,且该开口位于该粒子/破洞的上方,以使该粒子/破洞与该些画素电极其中之一电性绝缘。41. The method for repairing a thin film transistor array substrate according to claim 39, wherein when there is a particle/hole between each of the pixel electrodes and one of the common wirings, the pixels One of the electrodes further includes an opening, and the opening is located above the particle/hole so as to electrically insulate the particle/hole from one of the pixel electrodes. 42.一种薄膜晶体管阵列基板的修补方法,适于对一储存电容在闸极上或储存电容在共用配线上的薄膜晶体管阵列基板进行修补,其特征在于其中该基板上的每一画素电极的部分区域是位于对应之一扫描配线或一共用配线的上方,该画素电极以及对应的该扫描配线或该共用配线之间配置有一上电极,且该画素电极与该上电极电性连接,当该上电极与对应之该扫描配线或该共用配线之间具有一第一粒子/破洞时,其所形成的电容为一瑕疵电容,而该修补方法包括:42. A method for repairing a thin film transistor array substrate, which is suitable for repairing a thin film transistor array substrate with a storage capacitor on the gate or a storage capacitor on a common wiring, wherein each pixel electrode on the substrate A part of the area is located above a corresponding scanning wiring or a common wiring, an upper electrode is disposed between the pixel electrode and the corresponding scanning wiring or the common wiring, and the pixel electrode and the upper electrode are electrically connected to each other. When there is a first particle/hole between the upper electrode and the corresponding scanning wiring or the common wiring, the capacitance formed is a defective capacitance, and the repairing method includes: 移除与该瑕疵电容中的上电极对应的该画素电极的部分区域,以使该瑕疵电容中的上电极与对应的该画素电极电性绝缘。A part of the pixel electrode corresponding to the upper electrode in the defective capacitor is removed, so that the upper electrode in the defective capacitor is electrically insulated from the corresponding pixel electrode. 43.根据权利要求42所述的薄膜晶体管阵列基板的修补方法,其特征在于其中在移除与该瑕疵电容中的上电极对应的该画素电极的部分区域之后,该修补方法更包括:43. The method for repairing a thin film transistor array substrate according to claim 42, wherein after removing the part of the pixel electrode corresponding to the upper electrode in the defective capacitor, the repair method further comprises: 将该瑕疵电容中的上电极与对应的该扫描配线其中之一或该共用配线其中之一相熔接。The upper electrode in the defective capacitor is welded to the corresponding one of the scanning wirings or one of the common wirings. 44.根据权利要求42所述的薄膜晶体管阵列基板的修补方法,其特征在于其中移除与该瑕疵电容中的上电极对应的该画素电极的部分区域的方法包括激光移除。44. The method for repairing a thin film transistor array substrate according to claim 42, wherein the method of removing the partial area of the pixel electrode corresponding to the upper electrode in the defective capacitor comprises laser removal. 45.根据权利要求43所述的薄膜晶体管阵列基板的修补方法,其特征在于其中将该瑕疵电容中的上电极与对应的该扫描配线其中之一或该共用配线其中之一相熔接的方式包括激光熔接。45. The method for repairing a thin film transistor array substrate according to claim 43, wherein the upper electrode in the defective capacitor is welded to the corresponding one of the scanning wiring or one of the common wiring Methods include laser welding. 46.根据权利要求42或43所述的薄膜晶体管阵列基板的修补方法,其特征在于其中当该画素电极以及该共用配线或扫描配线之间具有一第二粒子/破洞时,该修补方法更包括:46. The method for repairing a thin film transistor array substrate according to claim 42 or 43, wherein when there is a second particle/hole between the pixel electrode and the common wiring or scanning wiring, the repair The method further includes: 移除对应于该第二粒子/破洞上方的该画素电极的区域,以使该第二粒子与该画素电极电性绝缘。A region corresponding to the pixel electrode above the second particle/hole is removed to electrically insulate the second particle from the pixel electrode. 47.根据权利要求46所述的薄膜晶体管阵列基板的修补方法,其特征在于其中移除对应于该第二粒子/破洞上方的该画素电极的区域的方法包括激光移除。47. The method for repairing a thin film transistor array substrate according to claim 46, wherein the method of removing the region corresponding to the pixel electrode above the second particle/hole comprises laser removal. 48.一种薄膜晶体管阵列基板,其特征在于其包括:48. A thin film transistor array substrate, characterized in that it comprises: 一基板;a substrate; 多数个扫描配线,配置于该基板上;A plurality of scanning wirings are arranged on the substrate; 多数个资料配线,配置于该基板上,其中该些扫描配线与该些资料配线是区分出多数个画素区域;A plurality of data wirings are arranged on the substrate, wherein the scanning wirings and the data wirings are used to distinguish a plurality of pixel areas; 多数个薄膜晶体管,每一该些薄膜晶体管是位于该些画素区域其中之一内,其中该些薄膜晶体管是藉由该些扫描配线驱动;a plurality of thin film transistors, each of the thin film transistors is located in one of the pixel areas, wherein the thin film transistors are driven by the scanning lines; 多数个画素电极,每一该些画素电极是位于该些画素区域其中之一内,以与对应的该些薄膜晶体管其中之一电性连接,其中每一该些画素电极具有至少一第一沟槽及至少一第二沟槽,该第一沟槽的延伸方向与该第二沟槽之延伸方向不同,且该第一沟槽与该第二沟槽相连通;A plurality of pixel electrodes, each of the pixel electrodes is located in one of the pixel regions to be electrically connected to one of the corresponding thin film transistors, wherein each of the pixel electrodes has at least one first groove a groove and at least one second groove, the extending direction of the first groove is different from the extending direction of the second groove, and the first groove communicates with the second groove; 多数个共用配线,配置于该基板上,每一该些画素电极的部分区域是位于对应的该些共用配线其中之一的上方,且每一该些画素电极的该第一沟槽与该第二沟槽的相连通处位于对应的该些共用配线其中之一的上方;以及A plurality of common wirings are arranged on the substrate, a partial area of each of the pixel electrodes is located above one of the corresponding common wirings, and the first groove of each of the pixel electrodes is connected to the The connected part of the second trench is located above the corresponding one of the shared wirings; and 一上电极,配置于每一该些画素电极以及该些共用配线其中之一之间,且每一该些上电极的一部分区域是分别与对应的该些画素电极其中之一电性连接。An upper electrode is disposed between each of the pixel electrodes and one of the common wirings, and a part of each of the upper electrodes is electrically connected to the corresponding one of the pixel electrodes. 49.根据权利要求48所述的薄膜晶体管阵列基板的修补方法,其特征在于其中每一该些画素电极的该第一沟槽与该第二沟槽的相连通处邻近于每一该些上电极与对应的该些画素电极其中之一的电性连接处。49. The method for repairing a thin film transistor array substrate according to claim 48, wherein the connection between the first groove and the second groove of each of the pixel electrodes is adjacent to each of the upper The electrode is electrically connected to one of the corresponding pixel electrodes. 50.一种薄膜晶体管阵列基板,其特征在于其包括:50. A thin film transistor array substrate, characterized in that it comprises: 一基板;a substrate; 多数个扫描配线,配置于该基板上;A plurality of scanning wirings are arranged on the substrate; 多数个资料配线,配置于该基板上,其中该些扫描配线与该些资料配线是区分出多数个画素区域;A plurality of data wirings are arranged on the substrate, wherein the scanning wirings and the data wirings are used to distinguish a plurality of pixel areas; 多数个薄膜晶体管,每一该些薄膜晶体管是位于该些画素区域其中之一内,其中该些薄膜晶体管是藉由该些扫描配线驱动;a plurality of thin film transistors, each of the thin film transistors is located in one of the pixel areas, wherein the thin film transistors are driven by the scanning lines; 多数个画素电极,每一该些画素电极是位于该些画素区域其中之一内,以与对应的该些薄膜晶体管其中之一电性连接,其中每一该些画素电极具有至少一第一沟槽及至少一第二沟槽,该第一沟槽的延伸方向与该第二沟槽的延伸方向不同,且该第一沟槽与该第二沟槽相连通;A plurality of pixel electrodes, each of the pixel electrodes is located in one of the pixel regions to be electrically connected to one of the corresponding thin film transistors, wherein each of the pixel electrodes has at least one first groove a groove and at least one second groove, the extending direction of the first groove is different from the extending direction of the second groove, and the first groove communicates with the second groove; 多数个共用配线,配置于该基板上,每一该些画素电极的部分区域是位于对应的该些共用配线其中之一的上方,且每一该些画素电极的该第一沟槽与该第二沟槽的相连通处位于对应的该些共用配线其中之一的上方;以及A plurality of common wirings are arranged on the substrate, a partial area of each of the pixel electrodes is located above one of the corresponding common wirings, and the first groove of each of the pixel electrodes is connected to the The connected part of the second trench is located above the corresponding one of the shared wirings; and 一上电极,配置于每一该些画素电极以及该些共用配线其中之一之间,且该上电极的一部分区域是与对应的该些画素电极其中之一电性连接,且适于与该些共用配线其中之一耦合形成一电容,当该电容为一瑕疵电容时,该瑕疵电容中的该上电极是与对应的该些画素电极其中之一的一部份区域电性绝缘。An upper electrode is disposed between each of the pixel electrodes and one of the common wirings, and a part of the upper electrode is electrically connected to one of the corresponding pixel electrodes, and is suitable for connecting with One of the common lines is coupled to form a capacitor. When the capacitor is a defective capacitor, the upper electrode in the defective capacitor is electrically insulated from a part of the corresponding one of the pixel electrodes. 51.根据权利要求50所述的薄膜晶体管阵列基板的修补方法,其特征在于其中该瑕疵电容中的该上电极与对应的该些共用配线其中之一相熔接。51. The method for repairing a thin film transistor array substrate according to claim 50, wherein the upper electrode in the defective capacitor is welded to one of the corresponding common wirings. 52.根据权利要求50所述的薄膜晶体管阵列基板的修补方法,其特征在于当每一该些画素电极以及该些共用配线其中之一之间具有一粒子/破洞时,该些画素电极其中的一上更包括一开口,且该开口位于该粒子/破洞的上方,以使该粒子/破洞与该些画素电极其中之一电性绝缘。52. The method for repairing a thin film transistor array substrate according to claim 50, wherein when there is a particle/hole between each of the pixel electrodes and one of the common wirings, the pixel electrodes One of them further includes an opening, and the opening is located above the particle/hole, so that the particle/hole is electrically insulated from one of the pixel electrodes. 53.一种薄膜晶体管阵列基板的修补方法,其特征在于适于对权利要求48的薄膜晶体管阵列基板进行修补,当该上电极与对应的该些共用配线其中之一之间具有一第一粒子/破洞时,其所形成之电容为一瑕疵电容,而该修补方法包括:53. A method for repairing a thin film transistor array substrate, characterized in that it is suitable for repairing the thin film transistor array substrate according to claim 48, when there is a first electrode between the upper electrode and one of the corresponding common wirings. In the case of particles/holes, the capacitance formed is a defective capacitance, and the repair method includes: 移除与该瑕疵电容中的该上电极对应的该些画素电极其中之一的一部分区域,该部分区域位于每一该些上电极与对应之该些画素电极其中之一之电性连接处的周围,以令该瑕疵电容中的该上电极与对应的该些画素电极其中之一电性绝缘。removing a part of one of the pixel electrodes corresponding to the upper electrode in the defect capacitor, the part of the region is located at the electrical connection between each of the upper electrodes and the corresponding one of the pixel electrodes around, so that the upper electrode in the defective capacitor is electrically insulated from one of the corresponding pixel electrodes. 54.根据权利要求53所述的薄膜晶体管阵列基板的修补方法,其特征在于其中移除与该瑕疵电容中的该上电极对应的该些画素电极其中之一的该部分区域的方法包括激光移除。54. The method for repairing a thin film transistor array substrate according to claim 53, wherein the method of removing the partial region of one of the pixel electrodes corresponding to the upper electrode in the defective capacitor comprises laser displacement remove. 55.根据权利要求53所述的薄膜晶体管阵列基板的修补方法,其特征在于其中在移除与该瑕疵电容中的该上电极对应的该些画素电极其中之一的该部分区域之后,该修补方法更包括:55. The method for repairing a thin film transistor array substrate according to claim 53, wherein after removing the partial area of one of the pixel electrodes corresponding to the upper electrode in the defective capacitor, the repairing The method further includes: 将该瑕疵电容中的该上电极与对应之该些共用配线其中之一相熔接。The upper electrode in the defective capacitor is welded to one of the corresponding common wirings. 56.根据权利要求55所述的薄膜晶体管阵列基板的修补方法,其特征在于其中将该瑕疵电容中的该上电极与对应的该些共用配线其中之一相熔接的方法包括激光熔接。56. The method for repairing a thin film transistor array substrate according to claim 55, wherein the method of welding the upper electrode of the defective capacitor to one of the corresponding common wirings includes laser welding. 57.根据权利要求53或55所述的薄膜晶体管阵列基板的修补方法,其特征在于其中当该些画素电极其中之一与对应的该些共用配线其中之一之间具有一第二粒子/破洞时,该修补方法更包括:57. The method for repairing a thin film transistor array substrate according to claim 53 or 55, wherein there is a second particle/ In the event of a hole, the repair method further includes: 移除对应于该第二粒子/破洞上方之该些画素电极其中之一的区域,以使该第二粒子/破洞与该些画素电极其中之一电性绝缘。A region corresponding to one of the pixel electrodes above the second particle/hole is removed, so that the second particle/hole is electrically insulated from one of the pixel electrodes. 58.根据权利要求57所述的薄膜晶体管阵列基板的修补方法,其特征在于其中移除对英语该第二粒子/破洞上方的该些画素电极其中之一的区域的方法包括激光移除。58. The method for repairing a thin film transistor array substrate as claimed in claim 57, wherein the method of removing the region of one of the pixel electrodes above the second particle/hole includes laser removal.
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