CN1195240C - Process for mfg. multi-phase diffraction optic element - Google Patents
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Abstract
Description
技术领域technical field
本发明属于领域信息科学与技术领域,具体涉及一种制作多位相衍射光学元件的工艺。The invention belongs to the field of information science and technology, and specifically relates to a process for manufacturing a multi-phase diffractive optical element.
背景技术Background technique
二元光学,或称二元衍射光学,国外首先是由麻省理工学院(MIT)Veldcamp等人在80年代末提出的。二元光学元件中对位相的控制是通过产生多台阶的方法来逼近理想值。例如位相台阶是2π,可以按L=2,4,8,……,2m,(m为正整数)等分的方法来划分的,这种方法在几何上相当于任意形状的曲面可用多台阶平面趋近。在现有制作工艺中,这种二进制位相台阶是很容易由微电子技术完成的:用一简单黑白掩模版曝光和刻蚀能产生两个等级的台阶,如再用另一个掩模版,重复曝光和刻蚀,只要刻蚀深度为上次的一半,就可得到四个等级的台阶,这样重复一次曝光和刻蚀将使位相等级数加倍,继续简单地重复此工艺m次,就可得到位相台阶为二进制式的二元位相元件,其位相等级数为2m,图1表示4位相衍射光学元件的制作工艺流程(见Nichilas F.Borrelli.MICROOPTICSTECHNOLOGY:fabrication and application of lens arrays and devices.Marcel Dekker,Inc.NewYork.,1999)。在图1中,第m块掩模版与第m-1次光刻所得到的图形是严格对准的,否则,衍射元件的衍射效率将大大降低。例如当对准误差为0.2μm时,8位相的元件衍射效率下降20%,16位相的则下降25%(见Yasuyuki Unno.Point-spreadfunction for binary diffractive lenses fabricated with misaligned masks.Applied Optics,1998,37(16):3401~3407)。由此可见,现有制作方法是采用大规模集成电路(VLSI)制作工艺中的多次掩模和刻蚀技术,制造2m级台阶的二元光学元件,需要m-1次对准套刻,对准精度要求很高,套刻误差对衍射效率影响较大。Binary optics, or binary diffractive optics, was first proposed abroad by Veldcamp et al. at the Massachusetts Institute of Technology (MIT) in the late 1980s. The control of the phase in the binary optical element is to approach the ideal value by generating multiple steps. For example, the phase step is 2π, which can be divided according to the method of L=2, 4, 8, ..., 2 m , (m is a positive integer). This method is geometrically equivalent to a curved surface of any shape and can be divided The step plane is approaching. In the existing manufacturing process, this binary phase step is easily completed by microelectronics technology: a simple black and white mask can be exposed and etched to produce two levels of steps, such as another mask, repeated exposure And etching, as long as the etching depth is half of the last time, you can get four levels of steps, so repeating exposure and etching will double the number of phase levels, continue to simply repeat this process m times, you can get the phase The step is a binary phase element with a binary phase, and its phase level is 2 m . Figure 1 shows the manufacturing process of a 4-phase diffractive optical element (see Nichilas F.Borrelli.MICROOPTICSTECHNOLOGY: fabrication and application of lens arrays and devices.Marcel Dekker , Inc. New York., 1999). In Fig. 1, the pattern obtained by the m-th reticle and the m-1 photolithography is strictly aligned, otherwise, the diffraction efficiency of the diffraction element will be greatly reduced. For example, when the alignment error is 0.2 μm, the diffraction efficiency of the 8-phase element decreases by 20%, and that of the 16-phase element decreases by 25% (see Yasuyuki Unno. Point-spreadfunction for binary diffractive lenses fabricated with misaligned masks. Applied Optics, 1998, 37 (16): 3401~3407). It can be seen that the existing manufacturing method uses multiple masking and etching techniques in the large-scale integrated circuit (VLSI) manufacturing process to manufacture binary optical elements with 2 m steps, requiring m-1 alignment overlays , the alignment accuracy is very high, and the overlay error has a great influence on the diffraction efficiency.
由二元光学理论,通过位相台阶数的增加,可以获得更高衍射效率的衍射光学元件。例如当位相数为8时,衍射效率为95%;当位相数为32时,衍射效率已经高达99.7%。然而随着位相数的增加,光刻和离子刻蚀的次数相应增加,则光刻中对准的次数也随之增加。常规工艺中,套刻时,第m块掩模版与第m-1次光刻所得到的图形是严格对准的,否则,衍射光学元件的衍射效率大大降低,甚至导致2m个位相数的衍射光学元件的衍射效率低于2m-1个位相数的衍射效率。研究表明,影响衍射效率有三种误差:纵向刻蚀深度错误、横向对准误差和线宽制作误差,而对准误差的影响最大。在现有衍射光学元件的制作工艺中,随着台阶数的增加,掩模版的图案结构越来越精细,套刻的精度也越来越难保证,因此,当位相数达到16时,工艺上就很难保证套刻精度了。虽然16位相的光学元件,理论衍射效率可以达到99%,实际制作出来的器件效率难以超过90%。According to the binary optics theory, a diffractive optical element with higher diffraction efficiency can be obtained by increasing the number of phase steps. For example, when the number of phases is 8, the diffraction efficiency is 95%; when the number of phases is 32, the diffraction efficiency is as high as 99.7%. However, as the number of phases increases, the times of photolithography and ion etching increase correspondingly, and the times of alignment in photolithography also increase accordingly. In the conventional process, during overlaying, the pattern obtained by the m-th reticle and the m-1th photolithography is strictly aligned, otherwise, the diffraction efficiency of the diffractive optical element will be greatly reduced, and even lead to a gap of 2 m phase numbers. The diffraction efficiency of the diffractive optical element is lower than that of 2 m-1 phase numbers. Research shows that there are three kinds of errors that affect diffraction efficiency: vertical etching depth errors, lateral alignment errors, and line width manufacturing errors, and alignment errors have the greatest impact. In the existing manufacturing process of diffractive optical elements, as the number of steps increases, the pattern structure of the reticle becomes finer and more difficult to guarantee the accuracy of overlay. Therefore, when the number of phases reaches 16, the process It is difficult to guarantee the accuracy of overlaying. Although the theoretical diffraction efficiency of a 16-phase optical element can reach 99%, it is difficult for the device efficiency to exceed 90%.
发明内容Contents of the invention
本发明的目的在于提供一种制作多位相衍射光学元件的工艺,该工艺无需严格套刻对准,台阶的位置由起始掩模版决定,其余掩模版只是起到自对准的作用,而不影响台阶的位置,因而可以得到衍射效率更高的衍射光学元件。The purpose of the present invention is to provide a process for manufacturing multi-phase diffractive optical elements, which does not require strict overlay alignment, the position of the step is determined by the initial reticle, and the rest of the reticle is only for self-alignment, not The position of the step is affected, so a diffractive optical element with higher diffraction efficiency can be obtained.
为实现上述发明目的,一种制作多位相衍射光学元件的工艺,依次包括下述步骤:In order to achieve the purpose of the above invention, a process for making a multi-phase diffractive optical element includes the following steps in sequence:
①采用磁控溅射仪在待制作光学元件的基片上溅射一层铬膜,然后甩正性光刻胶,前烘后,用第一块掩模版曝光;①Use a magnetron sputtering apparatus to sputter a layer of chromium film on the substrate of the optical element to be made, then throw the positive photoresist, and after pre-baking, use the first mask to expose;
②显影、坚膜后,湿法腐蚀未被胶掩蔽的铬膜,并利用反应离子束刻蚀技术刻蚀基片,深度为d/n,d为总的刻蚀位相深度,n为需要制作的位相台阶数;②After developing and hardening the film, wet-etch the chromium film not masked by the glue, and use reactive ion beam etching technology to etch the substrate. The depth is d/n, where d is the total etching phase depth, and n is the The number of phase steps;
③继续甩正性光刻胶,用第二块掩模版曝光;③Continue to shake the positive photoresist and expose it with the second mask;
④显影、坚膜后,反应离子束刻蚀基片,刻蚀深度为2d/n,再甩负性光刻胶,从背面曝光;④ After development and film hardening, reactive ion beam etching the substrate with an etching depth of 2d/n, and then throwing negative photoresist and exposing from the back;
⑤显影、坚膜后,并继续甩一层正胶,用第三块掩模版曝光;⑤ After developing and hardening the film, continue to throw a layer of positive resist, and use the third mask to expose;
⑥显影、坚膜后,腐蚀未被胶层保护的铬膜,反应离子束刻蚀基片,深度为2d/n;当n=4时,将正负胶都去掉,再次湿法腐蚀金属膜,得到4位相的台阶分布,制备过程完毕;当n>4时,进入步骤⑦,;⑥After developing and hardening the film, corrode the chromium film not protected by the adhesive layer, and etch the substrate with a reactive ion beam to a depth of 2d/n; when n=4, remove both the positive and negative adhesives, and wet-etch the metal film again , the step distribution of 4 phases is obtained, and the preparation process is completed; when n>4, enter step ⑦;
⑦保留胶层,用下一块掩模版曝光,重复上述步骤②至⑥,最后湿法腐蚀金属膜,得到n位相的台阶分布,其中n>4。⑦ Keep the adhesive layer, expose it with the next mask, repeat the
本发明所采用的工艺我们称之为“自对准工艺”。与现有的套刻工艺相比,本工艺具有以下的优点:①无需套刻严格对准,位相台阶的位置由第一块掩模版决定,其余掩模版只是起到自对准的作用,而不影响台阶的位置;②对掩模版的制作精度除了第一块要求较高外,其余均要求较低,从而降低了掩模版的制作成本;③只需考虑纵向刻蚀的误差对衍射效率的影响,而横向对准误差的影响无需考虑,通过反应离子刻蚀工艺的终点监控手段,可以高精度地控制纵向制作误差,因而可以得到比现有制作工艺更高的衍射效率。The process adopted in the present invention is called "self-alignment process". Compared with the existing overlay process, this process has the following advantages: ① Strict alignment is not required for overlay, and the position of the phase step is determined by the first mask, and the rest of the mask are only for self-alignment. It does not affect the position of the step; ②The manufacturing accuracy of the mask is relatively low except for the first piece, which reduces the manufacturing cost of the mask; ③Just consider the effect of the vertical etching error on the diffraction efficiency However, the influence of lateral alignment error does not need to be considered. Through the endpoint monitoring method of the reactive ion etching process, the longitudinal manufacturing error can be controlled with high precision, so that higher diffraction efficiency can be obtained than the existing manufacturing process.
利用该项发明,实际制作了8位相的石英衍射微透镜阵列,其衍射效率达90%,而采用现有工艺制作,其衍射效率大大低于上述指标。此工艺适合于在透紫外光的材料如石英等上制作用现有工艺无法达到的高衍射效率多位相光学元件。Utilizing this invention, an 8-phase quartz diffraction microlens array is actually manufactured, and its diffraction efficiency reaches 90%, but the diffraction efficiency is much lower than the above-mentioned index when it is manufactured by the existing technology. This process is suitable for fabricating multi-phase optical elements with high diffraction efficiency that cannot be achieved by existing processes on UV-transmitting materials such as quartz.
附图说明Description of drawings
图1为现有技术中4位相衍射光学元件的制作工艺流程图;Fig. 1 is the manufacturing process flowchart of 4-phase diffractive optical element in the prior art;
图2为采用本发明制备8位相衍射微透镜阵列的工艺流程图;Fig. 2 is the process flow diagram that adopts the present invention to prepare 8 phase diffraction microlens arrays;
图3为实施例中所设计的5块掩模版图;Fig. 3 is 5 mask layouts designed in the embodiment;
图4为利用此发明所制作的衍射紫外微透镜阵列扫描电镜(SEM)照片;Fig. 4 is the scanning electron microscope (SEM) photo of the diffraction ultraviolet microlens array that utilizes this invention to make;
图5为利用小光点扫描技术测试所制作的微透镜点扩散函数和衍射效率的示意图。FIG. 5 is a schematic diagram of the point spread function and diffraction efficiency of the fabricated microlens tested by the small spot scanning technology.
具体实施方式Detailed ways
图2示出了利用该项发明—自对准工艺制作8位相衍射微透镜阵列的具体工艺实施过程。Fig. 2 shows the specific process implementation process of making an 8-phase diffractive microlens array by using the self-alignment process of the invention.
①通过磁控溅射仪在待制作微透镜的基片上溅射0.8μm厚的铬膜,然后甩正性光刻胶,前烘后,用第一块掩模版曝光,如图2(a)所示;①Sputter a 0.8μm thick chromium film on the substrate to be made into a microlens by a magnetron sputtering apparatus, then throw a positive photoresist, and after pre-baking, use the first mask to expose, as shown in Figure 2(a) shown;
②显影、坚膜后,湿法腐蚀未被胶掩蔽的铬膜,并利用反应离子束刻蚀(RIE)技术刻蚀基片,深度为d/8,d为总的刻蚀位相深度,如图2(b)所示。此时,形成了8位相台阶的初始分布,后续的工艺过程不需要掩模版的暗、亮边界与这些台阶边界严格对准。②After developing and hardening the film, wet-etch the chromium film not masked by the glue, and use reactive ion beam etching (RIE) technology to etch the substrate with a depth of d/8, where d is the total etching phase depth, such as Figure 2(b) shows. At this time, an initial distribution of 8-phase steps is formed, and the subsequent process does not require strict alignment of the dark and bright boundaries of the mask with the boundaries of these steps.
③继续甩正性光刻胶,用第二块掩模版曝光,如图2(c)所示,图中可以看出,第二块掩模版没有和衬底上已有的位相台阶图形严格对准,这是本发明与常规工艺最大的区别所在。③Continue to shake the positive photoresist and expose it with the second mask, as shown in Figure 2(c). It can be seen from the figure that the second mask is not strictly aligned with the existing phase step pattern on the substrate. Accurate, this is the biggest difference between the present invention and conventional technology.
④显影、坚膜后,反应离子束刻蚀基片,刻蚀深度为d/4。接着,甩负性光刻胶,从背面曝光,如图2(d)所示。图中,金属铬膜相当于掩模版的作用。④ After developing and hardening the film, the reactive ion beam etches the substrate with an etching depth of d/4. Next, throw the negative photoresist and expose it from the back, as shown in Figure 2(d). In the figure, the metal chromium film is equivalent to the role of the mask plate.
⑤由于负性光刻胶的特性是没有被曝光的地方能被去除,曝光的地方保留。显影、坚膜后,负胶图形与正胶图形正好相反,并继续甩一层正胶,用第三块掩模版曝光,如图2(e)所示。⑤Because of the characteristics of the negative photoresist, the unexposed area can be removed, and the exposed area remains. After development and film hardening, the pattern of the negative resist is just opposite to the pattern of the positive resist, and a layer of positive resist is continued to be thrown and exposed with the third mask, as shown in Figure 2(e).
⑥显影、坚膜后,腐蚀未被胶层保护的铬膜,反应离子束刻蚀基片,深度为d/4。然后将正负胶都去掉,再次湿法腐蚀金属膜,则形成了4位相台阶分布。⑥After developing and hardening the film, corrode the chromium film not protected by the glue layer, and reactive ion beam etching the substrate with a depth of d/4. Then remove the positive and negative glue, and wet-etch the metal film again, forming a 4-phase step distribution.
⑦如果保留胶层,重复上述有关过程,如图2中从(f)-(l)便可得到8位相的台阶分布。⑦If the glue layer is kept, repeat the above-mentioned relevant process, as shown in Figure 2, the step distribution of 8 phases can be obtained from (f)-(l).
由上述步骤可以看出,与常规工艺对比,自对准工艺多了溅射铬膜、湿法腐蚀铬膜、负性胶光刻和显影、反应离子选择性刻蚀等工艺过程,因而工艺过程相对复杂。然而,从图2中可以看出,各位相台阶的位置由第一块掩模版决定后,后面的各步并不影响到台阶的位置,即避免了严格套刻对准误差。在自对准工艺中,反应离子刻蚀是必不可少的,不能象现有工艺那样,可以用离子束刻蚀,原因在于:如图2中(f)和(k),在刻蚀基片中的SiO2时,负性胶不能被刻蚀掉,所以只能用具有选择刻蚀比很大的反应离子刻蚀工艺。It can be seen from the above steps that compared with the conventional process, the self-alignment process has more processes such as sputtering chromium film, wet etching chromium film, negative resist lithography and development, and reactive ion selective etching. Relatively complex. However, it can be seen from Figure 2 that after the position of each phase step is determined by the first reticle, the subsequent steps do not affect the position of the step, that is, strict overlay alignment errors are avoided. In the self-alignment process, reactive ion etching is indispensable, and ion beam etching can not be used like the existing process. The reason is that: as shown in (f) and (k) in Figure 2, in the etching base When SiO 2 in the film is used, the negative resist cannot be etched away, so only a reactive ion etching process with a large selective etching ratio can be used.
利用上述的自对准工艺制作了8位相的紫外衍射微透镜。由上述流程可以看出,自对准工艺过程比常规工艺较为复杂。常规的制作只需3块掩模版,而自对准工艺需五块掩模版,掩模版的设计不同于常规工艺。对于常规工艺,用于制作8位相紫外衍射微透镜的掩模版的暗、亮环半径由公式The 8-phase ultraviolet diffractive microlenses were fabricated by using the above-mentioned self-alignment process. It can be seen from the above process that the self-alignment process is more complicated than the conventional process. Conventional manufacturing only needs 3 reticles, while self-alignment process requires 5 reticles, and the design of the reticle is different from the conventional process. For the conventional process, the dark and bright ring radii of the reticle used to make the 8-phase UV diffraction microlens are given by the formula
决定,其中,λ为设计波长,f为微透镜设计焦距。而自对准工艺中,第一次光刻的掩模版暗、亮环半径由Decision, where, λ is the design wavelength, f is the design focal length of the microlens. In the self-alignment process, the radii of the dark and bright rings of the mask for the first photolithography are given by
决定,其中L为量化位相数。以后的各次光刻掩模版则由要刻蚀的台阶决定。如图2(c)所示,要刻蚀的为第三个和第七个台阶,则相应掩模版的位置为亮区。另外,由于需要从背面对负性光刻胶曝光,因此基片材料应该透紫外光。使用的RIE刻蚀机为Unaxis公司生产的Nextral 860L型,实验参数如表1所示。decision, where L is the number of quantization phases. Subsequent photolithography mask plates are determined by the steps to be etched. As shown in FIG. 2(c), the third and seventh steps are to be etched, and the positions of the corresponding reticle are bright areas. In addition, the substrate material should be UV transparent due to the need to expose the negative photoresist from the back side. The RIE etching machine used is the Nextral 860L type produced by Unaxis, and the experimental parameters are shown in Table 1.
表1反应离子刻蚀参数表 Table 1 Reactive ion etching parameter list
Tab.The etching parameters of RIE
本发明所实施的实例为:848×640元石英衍射紫外微透镜阵列,单元尺寸为50×50μm2,衬底折射率为1.47,中心波长为0.4μm,刻蚀深度为1.7μm,F/#为3.54。图3为所设计的5块掩模版图,图4为利用此发明所制作的衍射紫外微透镜阵列扫描电镜(SEM)照片。利用小光点扫描技术我们测试了所制作的微透镜点扩散函数(PSF)和衍射效率,如图5所示,衍射效率高达90.2%,而常规工艺制作的8位相衍射微透镜阵列衍射效率通常只能达到83%。实验结果表明,该项发明技术可以获得高衍射效率。The example implemented by the present invention is: 848×640 element quartz diffraction ultraviolet microlens array, the unit size is 50×50μm 2 , the substrate refractive index is 1.47, the central wavelength is 0.4μm, the etching depth is 1.7μm, F/# is 3.54. Fig. 3 is the designed five mask layouts, and Fig. 4 is a scanning electron microscope (SEM) photo of the diffractive ultraviolet microlens array made by the invention. We tested the point spread function (PSF) and diffraction efficiency of the fabricated microlens using the small spot scanning technology. As shown in Figure 5, the diffraction efficiency is as high as 90.2%. It can only reach 83%. Experimental results show that the invented technology can obtain high diffraction efficiency.
不难看出,采用上述方法还可以制备16位相的衍射光学元件。It is not difficult to see that a 16-phase diffractive optical element can also be prepared by the above method.
概括起来,本发明提出一种新的工艺—自对准工艺。相对于常规工艺,该工艺避免了多次光刻的严格套刻对准要求,因而适合制作衍射效率更高的衍射光学元件。To sum up, the present invention proposes a new process—self-alignment process. Compared with the conventional process, this process avoids the strict overlay alignment requirements of multiple photolithography, so it is suitable for making diffractive optical elements with higher diffraction efficiency.
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CN1307461C (en) * | 2003-06-10 | 2007-03-28 | 鸿富锦精密工业(深圳)有限公司 | Method of making aspheric surface lens |
US20060029889A1 (en) * | 2004-08-06 | 2006-02-09 | Wang Tak K | Method to fabricate diffractive optics |
JP5048930B2 (en) * | 2005-06-08 | 2012-10-17 | ラピスセミコンダクタ株式会社 | Diffractive optical element and method of manufacturing diffractive optical element |
CN101648695B (en) * | 2009-09-07 | 2012-05-30 | 北京时代民芯科技有限公司 | MEMS bulk silicon technological method for transferring mask layer three-dimensional structure |
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CN103399406B (en) * | 2013-07-26 | 2015-07-29 | 北京润和微光科技有限公司 | Be diffraction optical element and the preparation method of flat top beam by Gauss beam reshaping |
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CN104237984B (en) * | 2014-09-30 | 2016-11-16 | 中国空空导弹研究院 | The manufacture method of multi-step microlens array in high precision |
CN104237983B (en) * | 2014-09-30 | 2016-09-28 | 中国空空导弹研究院 | The method efficiently making high accuracy multi-step microlens array |
CN104678476A (en) * | 2015-01-21 | 2015-06-03 | 佛山市智海星空科技有限公司 | Diffraction optical element based on interference method |
CN108490724A (en) * | 2015-08-07 | 2018-09-04 | 高准精密工业股份有限公司 | light emitting device |
CN107275194B (en) * | 2017-06-29 | 2020-01-24 | 杭州士兰集成电路有限公司 | Method for manufacturing stepped structure |
CN109491102B (en) * | 2019-01-09 | 2020-10-16 | 中国科学院光电技术研究所 | Preparation method and tooling of photoresist microstructure of large-diameter thin-film diffractive lens |
CN111221059B (en) * | 2020-02-25 | 2023-01-20 | 嘉兴驭光光电科技有限公司 | Method for preparing mold of micro-lens array by multiple times of same-direction etching |
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