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CN116364748A - semiconductor diode - Google Patents

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Publication number
CN116364748A
CN116364748A CN202111611956.1A CN202111611956A CN116364748A CN 116364748 A CN116364748 A CN 116364748A CN 202111611956 A CN202111611956 A CN 202111611956A CN 116364748 A CN116364748 A CN 116364748A
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type
region
semiconductor
carrier region
semiconductor diode
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CN202111611956.1A
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Chinese (zh)
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刘磊
刘伟
袁愿林
王睿
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Suzhou Dongwei Semiconductor Co ltd
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Suzhou Dongwei Semiconductor Co ltd
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Priority to CN202111611956.1A priority Critical patent/CN116364748A/en
Priority to PCT/CN2022/106457 priority patent/WO2023124021A1/en
Publication of CN116364748A publication Critical patent/CN116364748A/en
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H10D62/107Buried supplementary regions, e.g. buried guard rings 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • H10D8/60Schottky-barrier diodes 

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  • Electrodes Of Semiconductors (AREA)

Abstract

The invention belongs to the technical field of semiconductor power devices, and particularly discloses a semiconductor diode, which comprises an n-type semiconductor layer; an anode metal layer over the n-type semiconductor layer; a plurality of alternately spaced n-type and p-type pillars within the n-type semiconductor layer; a p-type body region at the top of the p-type column; a low current carrier region, wherein the p-type body region in the low current carrier region and the anode metal layer form a p-type Schottky diode; and a p-type contact region is arranged in the p-type body region in the high current carrier region, and ohmic contact is formed between the p-type contact region and the anode metal layer.

Description

半导体二极管semiconductor diode

技术领域technical field

本发明属于半导体功率器件技术领域,特别是涉及一种半导体二极管。The invention belongs to the technical field of semiconductor power devices, in particular to a semiconductor diode.

背景技术Background technique

传统的半导体二极管的芯片面积较大、电流密度偏低,目前通常在半导体二极管中增加超结结构来增加芯片电流密度、降低芯片面积,但是常规超结结构的半导体二极管的单位面积内存储的少子过多,并且由于二维耗尽效应造成电压突变,同时反向恢复软度过低,导致反向恢复过程中的过冲电压太大。Traditional semiconductor diodes have a large chip area and low current density. At present, super junction structures are usually added to semiconductor diodes to increase chip current density and reduce chip area. However, the minority carriers stored in the unit area of conventional super junction semiconductor diodes Too much, and the sudden change in voltage due to the two-dimensional depletion effect, and the reverse recovery softness is too low, resulting in too much overshoot voltage during the reverse recovery process.

发明内容Contents of the invention

有鉴于此,本发明的目的是提供一种半导体二极管,以降低超结结构的半导体二极管由于二维耗尽效应造成电压突变。In view of this, the purpose of the present invention is to provide a semiconductor diode to reduce the sudden change in voltage caused by the two-dimensional depletion effect of the semiconductor diode with super junction structure.

为达到本发明的上述目的,本发明提供了一种半导体二极管,包括:In order to achieve the above-mentioned purpose of the present invention, the present invention provides a kind of semiconductor diode, comprising:

n型半导体层;n-type semiconductor layer;

位于所述n型半导体层之上的阳极金属层;an anode metal layer overlying the n-type semiconductor layer;

位于所述n型半导体层内的若干个交替间隔设置的n型柱和p型柱;a plurality of alternately spaced n-type columns and p-type columns located in the n-type semiconductor layer;

位于所述p型柱顶部的p型体区;a p-type body region on top of the p-type pillar;

低载流子区,所述低载流子区内的所述p型体区与所述阳极金属层形成p型肖特基二极管;a low-carrier region, the p-type body region and the anode metal layer in the low-carrier region form a p-type Schottky diode;

高载流子区,所述高载流子区内的所述p型体区内设有p型接触区,所述p型接触区与所述阳极金属层形成欧姆接触。In the high-carrier region, a p-type contact region is provided in the p-type body region in the high-carrier region, and the p-type contact region forms an ohmic contact with the anode metal layer.

可选的,所述高载流子区内的所述n型柱与所述阳极金属层形成n型肖特基二极管。Optionally, the n-type columns in the high-carrier region and the anode metal layer form an n-type Schottky diode.

可选的,所述低载流子区位于半导体二极管的有源区的边缘区域,所述高载流子区位于半导体二极管的有源区的中间区域。Optionally, the low-carrier region is located at an edge region of the active region of the semiconductor diode, and the high-carrier region is located at a middle region of the active region of the semiconductor diode.

可选的,所述p型体区的宽度大于所述p型柱的宽度。Optionally, the width of the p-type body region is larger than the width of the p-type pillar.

本发明的半导体二极管形成有低载流子区和高载流子区,在反向恢复过程中,会先抽取完低载流子区的载流子,再抽取完高载流子区的载流子,这可以使反向耐压逐步上升,避免了由于二维耗尽造成的电压突变;进一步的,在高载流子区内形成n型肖特基二极管,向半导体二极管内部注入多子,可以降低欧姆接触区域下方pn结少子存储数量,减小反向恢复峰值电流。The semiconductor diode of the present invention is formed with a low-carrier region and a high-carrier region. During the reverse recovery process, the carriers in the low-carrier region will be extracted first, and then the carriers in the high-carrier region will be extracted. carriers, which can gradually increase the reverse withstand voltage, avoiding the voltage mutation caused by two-dimensional depletion; further, an n-type Schottky diode is formed in the high-carrier region, and multiple carriers are injected into the semiconductor diode. , can reduce the number of minority carriers stored in the pn junction under the ohmic contact area, and reduce the reverse recovery peak current.

附图说明Description of drawings

为了更加清楚地说明本发明示例性实施例的技术方案,下面对描述实施例中所需要用到的附图做一简单介绍。In order to illustrate the technical solutions of the exemplary embodiments of the present invention more clearly, the following briefly introduces the drawings used in describing the embodiments.

图1是本发明提供的半导体二极管的第一个实施例的剖面结构示意图。Fig. 1 is a schematic cross-sectional structure diagram of the first embodiment of the semiconductor diode provided by the present invention.

具体实施方式Detailed ways

以下将结合本发明实施例中的附图,通过具体方式,完整地描述本发明的技术方案。显然,所描述的实施例是本发明的一部分实施例,而不是全部的实施例。同时,为清楚地说明本发明的具体实施方式,说明书附图中所列示意图,放大了本发明所述的层和区域的厚度,且所列图形大小并不代表实际尺寸。The technical solution of the present invention will be fully described below in a specific manner with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are some, not all, embodiments of the present invention. At the same time, in order to clearly illustrate the specific implementation of the present invention, the schematic diagrams listed in the accompanying drawings of the specification magnify the thickness of the layers and regions described in the present invention, and the listed figures do not represent the actual size.

图1是本发明提供的半导体二极管的第一个实施例的剖面结构示意图,如图1所示,本发明的半导体二极管包括n型半导体层20,n型半导体层20通常形成于n型衬底10之上。Fig. 1 is the schematic cross-sectional structure diagram of the first embodiment of semiconductor diode provided by the present invention, as shown in Fig. 1, semiconductor diode of the present invention comprises n-type semiconductor layer 20, and n-type semiconductor layer 20 is usually formed on n-type substrate 10 or more.

位于n型半导体层20内的若干个交替间隔设置的n型柱22和p型柱21,n型柱22与p型柱21之间形成电荷平衡的超结结构。位于p型柱21顶部的p型体区23,优选的p型体区23的宽度大于p型柱21的宽度。A plurality of n-type pillars 22 and p-type pillars 21 are arranged alternately in the n-type semiconductor layer 20 , and a charge-balanced superjunction structure is formed between the n-type pillars 22 and the p-type pillars 21 . For the p-type body region 23 located on the top of the p-type pillar 21 , the width of the p-type body region 23 is preferably larger than the width of the p-type pillar 21 .

位于n型半导体层20之上的阳极金属层25,绝缘层26起到电性绝缘的作用。The anode metal layer 25 and insulating layer 26 located on the n-type semiconductor layer 20 function as electrical insulation.

本发明的半导体二极管包括低载流子区31和高载流子区32两部分区域,在低载流子区31内:p型体区23与阳极金属层25接触形成p型肖特基二极管结构;在高载流子区32内:p型体区23内设有p型接触区24,p型接触区24与阳极金属层25接触形成欧姆接触结构。优选的,低载流子区31位于半导体二极管的有源区的边缘区域,高载流子区32位于半导体二极管的有源区的中间区域。其中,低载流子区31可以位于有源区的边缘区域的部分区域,也可以整个边缘区域均为低载流子区31,例如,低载流子区31可以位于高载流子区32的一侧或两侧,或者低载流子区31环绕高载流子区32。示例性的,图1中仅展示了低载流子区31和高载流子区32相邻位置处的结构,而未从全局上展示低载流子区31和高载流子区32的结构。The semiconductor diode of the present invention includes a low-carrier region 31 and a high-carrier region 32. In the low-carrier region 31: the p-type body region 23 is in contact with the anode metal layer 25 to form a p-type Schottky diode Structure; in the high-carrier region 32: a p-type contact region 24 is provided in the p-type body region 23, and the p-type contact region 24 is in contact with the anode metal layer 25 to form an ohmic contact structure. Preferably, the low-carrier region 31 is located at the edge region of the active region of the semiconductor diode, and the high-carrier region 32 is located at the middle region of the active region of the semiconductor diode. Wherein, the low-carrier region 31 may be located in a part of the edge region of the active region, or the entire edge region may be the low-carrier region 31, for example, the low-carrier region 31 may be located in the high-carrier region 32 One side or two sides of , or the low-carrier region 31 surrounds the high-carrier region 32 . Exemplarily, FIG. 1 only shows the structure at the adjacent positions of the low-carrier region 31 and the high-carrier region 32, but does not show the structure of the low-carrier region 31 and the high-carrier region 32 globally. structure.

本发明的半导体二极管,在反向恢复过程中,会先抽取完低载流子区的载流子,再抽取完高载流子区的载流子,这可以使反向耐压逐步上升,避免了由于二维耗尽造成的电压突变。In the semiconductor diode of the present invention, in the reverse recovery process, the carriers in the low-carrier region will be extracted first, and then the carriers in the high-carrier region will be extracted, which can gradually increase the reverse withstand voltage. Voltage mutations due to two-dimensional depletion are avoided.

本发明的半导体二极管,在高载流子区32内,还可以使n型柱22与阳极金属层25接触形成n型肖特基二极管,这可以向半导体二极管内部注入多子,降低欧姆接触区域下方的pn结的少子存储数量,减小反向恢复峰值电流。In the semiconductor diode of the present invention, in the high-carrier region 32, the n-type column 22 can also be contacted with the anode metal layer 25 to form an n-type Schottky diode, which can inject many carriers into the semiconductor diode and reduce the ohmic contact area The number of minority carriers stored in the pn junction below reduces the reverse recovery peak current.

以上具体实施方式及实施例是对本发明技术思想的具体支持,不能以此限定本发明的保护范围,凡是按照本发明提出的技术思想,在本技术方案基础上所做的任何等同变化或等效的改动,均仍属于本发明技术方案保护的范围。The above specific implementation methods and examples are specific support for the technical ideas of the present invention, and cannot limit the protection scope of the present invention. Any equivalent changes or equivalents made on the basis of the technical solutions according to the technical ideas proposed in the present invention All changes still belong to the protection scope of the technical solution of the present invention.

Claims (4)

1.半导体二极管,其特征在于,包括:1. A semiconductor diode, characterized in that it comprises: n型半导体层;n-type semiconductor layer; 位于所述n型半导体层之上的阳极金属层;an anode metal layer overlying the n-type semiconductor layer; 位于所述n型半导体层内的若干个交替间隔设置的n型柱和p型柱;a plurality of alternately spaced n-type columns and p-type columns located in the n-type semiconductor layer; 位于所述p型柱顶部的p型体区;a p-type body region on top of the p-type pillar; 低载流子区,所述低载流子区内的所述p型体区与所述阳极金属层形成p型肖特基二极管;a low-carrier region, the p-type body region and the anode metal layer in the low-carrier region form a p-type Schottky diode; 高载流子区,所述高载流子区内的所述p型体区内设有p型接触区,所述p型接触区与所述阳极金属层形成欧姆接触。In the high-carrier region, a p-type contact region is provided in the p-type body region in the high-carrier region, and the p-type contact region forms an ohmic contact with the anode metal layer. 2.如权利要求1所述的半导体二极管,其特征在于,所述高载流子区内的所述n型柱与所述阳极金属层形成n型肖特基二极管。2. The semiconductor diode according to claim 1, wherein the n-type column in the high-carrier region and the anode metal layer form an n-type Schottky diode. 3.如权利要求1所述的半导体二极管,其特征在于,所述低载流子区位于半导体二极管的有源区的边缘区域,所述高载流子区位于半导体二极管的有源区的中间区域。3. The semiconductor diode according to claim 1, wherein the low carrier region is located at the edge region of the active region of the semiconductor diode, and the high carrier region is located in the middle of the active region of the semiconductor diode area. 4.如权利要求1所述的半导体二极管,其特征在于,所述p型体区的宽度大于所述p型柱的宽度。4. The semiconductor diode according to claim 1, wherein the width of the p-type body region is greater than the width of the p-type pillar.
CN202111611956.1A 2021-12-27 2021-12-27 semiconductor diode Pending CN116364748A (en)

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CN202111611956.1A CN116364748A (en) 2021-12-27 2021-12-27 semiconductor diode
PCT/CN2022/106457 WO2023124021A1 (en) 2021-12-27 2022-07-19 Semiconductor diode

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102011080258A1 (en) * 2011-08-02 2013-02-07 Robert Bosch Gmbh Super junction Schottky oxide PiN diode
JP2014236171A (en) * 2013-06-05 2014-12-15 ローム株式会社 Semiconductor device and method of manufacturing the same
US10680095B2 (en) * 2018-06-15 2020-06-09 Semiconductor Components Industries, Llc Power device having super junction and schottky diode
CN110416319B (en) * 2019-08-21 2023-05-05 江苏中科君芯科技有限公司 Double-sided Schottky-controlled fast recovery diode device and preparation method thereof
CN113555286B (en) * 2021-07-05 2023-12-05 浙江芯科半导体有限公司 A gallium oxide super junction Schottky diode and its preparation method

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