CN118099227B - Gallium oxide power diode with sloped trench integration - Google Patents

Abstract

The present invention discloses a gallium oxide power diode with an integrated bevel groove. The gallium oxide power diode includes an epitaxial structure and a first electrode and a second electrode matched with the epitaxial structure. The epitaxial structure includes a gallium oxide substrate, a gallium oxide epitaxial layer and a dielectric structure layer stacked in sequence. At least one groove structure is arranged in the gallium oxide epitaxial layer. The groove opening of the groove structure is flush with the selected surface of the gallium oxide epitaxial layer. The angle between the sidewall of the groove structure and the selected surface of the gallium oxide epitaxial layer is greater than 90°. The dielectric structure layer is continuously arranged on the selected surface of the gallium oxide epitaxial layer, the sidewall of the groove structure and the bottom of the groove; the first electrode is arranged on the dielectric structure layer, and the second electrode is arranged on the substrate. The present invention uses the bevel groove structure to effectively increase the pressure-bearing area of the drift region, improve the electric field distribution in the drift region and the interface, reduce leakage, and is conducive to improving the blocking voltage and reliability of the device.

Description

Gallium oxide power diode with sloped trench integration

Technical Field

The present invention particularly relates to a gallium oxide power diode with bevel groove integration, belonging to the technical field of semiconductor devices.

Background technique

Gallium oxide (Ga ₂ O ₃ ) is an emerging ultra-wide bandgap semiconductor material (~4.9 eV) and has become a hot topic in the field of wide bandgap semiconductors in recent years. The Baliga figure of merit of gallium oxide is 3444, far exceeding 870 of GaN and 340 of SiC. Compared with common third-generation semiconductors, the high Baliga figure of merit makes gallium oxide a hot topic in the field of power devices. Among many power devices, diodes have been widely studied because of their relatively simple structure, fast switching speed and low on-state loss. In particular, gallium oxide power diodes with a large Baliga figure of merit have become a research hotspot for gallium oxide power devices.

Generally speaking, power diodes include two types: one is the Schottky power diode and the other is the bipolar power diode. Among them, the Schottky power diode has the characteristics of low turn-on voltage and fast conduction speed, while the bipolar power diode has the characteristics of high blocking voltage and large conduction current. At present, gallium oxide has heavy holes and local self-limitation phenomena, which makes P gallium oxide almost difficult to achieve, seriously restricting the development and application of gallium oxide bipolar devices. Therefore, heterogeneous P-type oxide is the main research idea and direction for the design and preparation of gallium oxide bipolar devices.

Summary of the invention

The main purpose of the present invention is to provide a gallium oxide power diode with sloped trench integration, thereby overcoming the deficiencies in the prior art.

In order to achieve the above-mentioned invention object, the technical solution adopted by the present invention includes:

One aspect of the present invention provides a gallium oxide power diode with bevel groove integration, comprising an epitaxial structure and a first electrode and a second electrode matching the epitaxial structure, wherein the epitaxial structure comprises a gallium oxide substrate, a gallium oxide epitaxial layer and a dielectric structure layer stacked in sequence,

At least one trench structure is arranged in the gallium oxide epitaxial layer, the notch of the trench structure is flush with the selected surface of the gallium oxide epitaxial layer, the angle between the sidewall of the trench structure and the selected surface of the gallium oxide epitaxial layer is greater than 90°, the dielectric structure layer is continuously arranged on the selected surface of the gallium oxide epitaxial layer, the sidewall of the trench structure and the bottom of the trench; the first electrode is arranged on the dielectric structure layer, and the second electrode is arranged on the substrate, wherein the selected surface is the surface of the gallium oxide epitaxial layer on the side facing away from the gallium oxide substrate.

Furthermore, the angle θ between the sidewall of the groove structure and the selected surface is 100° to 160°, preferably 120° to 140°. The maximum electric field on the inclined sidewall surface of the groove structure can be simply estimated according to the following formula: , E ₀ represents the maximum electric field strength in the gallium oxide epitaxial layer in the trench region. Obviously, the electric field strength E on the inclined sidewall surface is always smaller than the body electric field strength E ₀ .

Furthermore, the ratio of the width of the groove bottom to the groove opening of the groove structure is (1.0-1.5): (1.8-10).

Furthermore, the ratio of the depth of the groove structure to the width of the groove bottom is (1-1.5): (10-50).

Furthermore, the ratio of the depth of the trench structure to the thickness of the gallium oxide epitaxial layer is 1/1 to 1/3.

Furthermore, the bottom of the groove structure is a plane.

Furthermore, the longitudinal cross-section of the groove structure is an inverted trapezoid.

Furthermore, the depth of the groove structure is 300nm-800nm, the width of the groove opening is 2μm-12μm, and the width of the groove bottom is 1μm-10μm.

Furthermore, a plurality of the groove structures are formed on a selected surface of the gallium oxide epitaxial layer, and the plurality of the groove structures are arranged at intervals along a plane extension direction of the first surface.

Furthermore, the volume proportion of the plurality of trench structures in the gallium oxide epitaxial layer is less than 50%.

Furthermore, the dielectric structure layer is a p-type doped oxide.

Furthermore, the material of the dielectric structure layer includes NiO, CuAlO ₂ or LiGa ₅ O ₈ .

Furthermore, the surface of the dielectric structure layer facing away from the gallium oxide epitaxial layer is a continuous and flat plane.

Furthermore, the dielectric structure layer includes a first dielectric layer and a second dielectric layer, the first dielectric layer is continuously arranged on a selected surface of the gallium oxide epitaxial layer, the sidewalls and the bottom of the trench structure, and the second dielectric layer is stacked on the first dielectric layer, wherein the first dielectric layer and the second dielectric layer are made of the same material, and the p-type oxide carrier concentrations of the first dielectric layer and the second dielectric layer are different.

Furthermore, the p-type oxide carrier concentration of the second dielectric layer is greater than the p-type oxide carrier concentration of the first dielectric layer.

Furthermore, the p-type oxide carrier concentration of the first dielectric layer is 10 ¹⁶ cm ³ to 10 ¹⁷ cm ³ ; the p-type oxide carrier concentration of the second dielectric layer is 10 ¹⁸ cm ³ to 10 ¹⁹ cm ³ .

It should be noted that the p-type dielectric structure layer and the n-type gallium oxide epitaxial layer form a PN junction. The theoretical optimal solution is that the depletion region needs to be extended to the n-type gallium oxide epitaxial layer as much as possible. According to the Poisson equation, it is necessary to give priority to the dielectric structure layer with a high carrier concentration. Secondly, the dielectric structure layer with a high carrier concentration will also enable the device to obtain a good ohmic contact and reduce the on-resistance of the device. Therefore, a single-layer p-type dielectric structure layer with a high carrier concentration is usually selected. However, since the p-type dielectric structure layer has a high carrier concentration, the depletion region width of the single-layer p-type dielectric structure layer is very small, which easily leads to electric field concentration, making the device easy to break down under high blocking voltage. Therefore, in order to avoid the electric field concentration phenomenon, the present invention sets two dielectric layers: one layer has a low carrier concentration and the other layer has a high carrier concentration, wherein the first dielectric layer with a low carrier concentration can play a better role in constructing a PN junction, and the second dielectric layer with a high carrier concentration has the function of forming an ohmic contact and reducing the contact resistance.

Furthermore, the material of the first electrode (also called the top electrode or upper electrode) includes metal material or P-type conductive polysilicon. Furthermore, the first electrode includes a Ni/Au electrode, a Pt/Au electrode or a P-type conductive polysilicon electrode.

Furthermore, the material of the second electrode (also called the bottom electrode or the lower electrode) includes a metal material or N-type conductive polysilicon. Furthermore, the second electrode includes a Ti electrode, an Al electrode, a Mo electrode or an N-type conductive polysilicon electrode.

Another aspect of the present invention provides a gallium oxide power diode with bevel groove integration, comprising an epitaxial structure and a first electrode and a second electrode matching the epitaxial structure, wherein the epitaxial structure comprises a gallium oxide substrate, a gallium oxide epitaxial layer and a p-type dielectric structure layer stacked in sequence,

At least one trench structure is arranged in the gallium oxide epitaxial layer, the notch of the trench structure is flush with the selected surface of the gallium oxide epitaxial layer, the angle between the sidewall of the trench structure and the selected surface of the gallium oxide epitaxial layer is greater than 90°, the dielectric structure layer is continuously arranged on the selected surface of the gallium oxide epitaxial layer and the bottom of the trench structure; the first electrode is continuously arranged on the dielectric structure layer and the sidewall of the trench structure, and the second electrode is arranged on the substrate, wherein the selected surface is the surface of the gallium oxide epitaxial layer on the side facing away from the gallium oxide substrate.

Furthermore, the gallium oxide power diode includes a PN type power diode unit and a Schottky type power diode unit, wherein the portion with the dielectric structure layer is a PN type power diode, and the portion without the dielectric structure layer has a metal electrode in direct contact with the gallium oxide epitaxial layer to form a Schottky type power diode.

Furthermore, the angle between the sidewall of the groove structure and the selected surface is 100°~160°.

Furthermore, the ratio of the width of the groove bottom to the groove opening of the groove structure is (1.0-1.5): (1.8-10).

Furthermore, the ratio of the depth of the groove structure to the width of the groove bottom is (1-1.5): (10-50).

Furthermore, the ratio of the depth of the trench structure to the thickness of the gallium oxide epitaxial layer is 1/1 to 1/3.

Furthermore, the bottom of the groove structure is a plane.

Furthermore, the longitudinal cross-section of the groove structure is an inverted trapezoid.

Furthermore, the depth of the groove structure is 300nm-800nm, the width of the groove opening is 2μm-12μm, and the width of the groove bottom is 1μm-10μm.

Furthermore, a plurality of the groove structures are formed on a selected surface of the gallium oxide epitaxial layer, and the plurality of the groove structures are arranged at intervals along a plane extension direction of the first surface.

Furthermore, the dielectric structure layer is a p-type doped oxide.

Furthermore, the material of the dielectric structure layer includes NiO, CuAlO ₂ or LiGa ₅ O ₈ , but is not limited thereto.

Furthermore, the material of the first electrode (also called the top electrode or upper electrode) includes metal material or P-type conductive polysilicon. Furthermore, the first electrode includes a Ni/Au electrode, a Pt/Au electrode or a P-type conductive polysilicon electrode.

Furthermore, the material of the second electrode (also called the bottom electrode or the lower electrode) includes a metal material or N-type conductive polysilicon. Furthermore, the second electrode includes a Ti electrode, an Al electrode, a Mo electrode or an N-type conductive polysilicon electrode.

It should be noted that the above mainly introduces a solution in which each groove structure includes a single groove in the depth direction. Of course, each groove structure can also include multiple grooves in the depth direction. The multiple grooves contained in each groove structure are arranged step by step in the depth direction, that is, they are distributed in a stepped manner, wherein the angle between the side wall of each groove and the selected surface is 100°~160°, the ratio of the width of the groove bottom to the groove mouth is (1.0~1.5):(1.8~10), and the ratio of the depth of the groove to the width of its own groove bottom is (1~1.5):(10~50).

Compared with the prior art, the advantages of the present invention include:

1) The present invention provides a gallium oxide power diode with bevel groove integration, which effectively increases the pressure-bearing area of the drift region by using the bevel groove structure, improves the electric field distribution in the drift region and the interface, reduces leakage, and is conducive to improving the blocking voltage and reliability of the device;

2) The present invention provides a gallium oxide power diode with an integrated bevel groove. The introduction of the bevel groove structure can widen the current path, reduce the forward resistance of the device, and maintain a low on-state voltage drop of the device while increasing the breakdown voltage of the device.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a schematic structural diagram of a gallium oxide power diode with sloped trench integration provided in Example 1 of the present invention;

FIG2 is a schematic diagram of a preparation process of a gallium oxide power diode with bevel groove integration provided in Example 1 of the present invention;

FIG3 is a schematic structural diagram of a gallium oxide power diode with sloped trench integration provided in Example 2 of the present invention;

FIG. 4 is a schematic structural diagram of a gallium oxide power diode with sloped trench integration provided in Example 3 of the present invention.

Detailed ways

In view of the deficiencies in the prior art, the inventor of this case has proposed the technical solution of the present invention after long-term research and extensive practice. The technical solution, its implementation process and principle, etc. will be further explained in conjunction with the accompanying drawings and specific implementation cases. Unless otherwise specified, the semiconductor epitaxial growth process, metal deposition process, etching process, etc. used in the embodiments of the present invention can be known to those skilled in the art, and their specific process parameters are not limited here.

The present invention provides a gallium oxide power diode with an integrated bevel groove, which utilizes a bevel groove structure (i.e., a groove structure with a bevel, wherein the bevel refers to the side wall of the groove structure) to effectively increase the pressure-bearing area of the drift region and improve the electric field distribution at the drift region and the interface (the electric field change at the drift region and the interface is a physical effect brought about by the introduction of the bevel groove structure). The introduction of the bevel groove structure can also widen the current path, reduce the forward on-resistance of the device, and maintain a low on-state voltage drop of the device while increasing the breakdown voltage of the device.

Embodiment 1:

Please refer to FIG. 1 , a gallium oxide power diode includes a Ti/Au electrode, a gallium oxide single crystal substrate, a gallium oxide lightly doped epitaxial layer, a p-type NiO dielectric layer and a Ni/Au electrode sequentially arranged along the longitudinal direction of the gallium oxide power diode, wherein the Ti/Au electrode forms ohmic contact with the gallium oxide single crystal substrate, and the Ni/Au electrode forms ohmic contact with the p-type NiO dielectric layer.

In this embodiment, the carrier concentration of the gallium oxide single crystal substrate is about 10 ¹⁹ cm ^-3 , the thickness of the gallium oxide lightly doped epitaxial layer is 2 μm, the carrier concentration of the gallium oxide lightly doped epitaxial layer is 10 ¹⁶ cm ^-3 , and a plurality of spaced groove structures are further provided on the gallium oxide lightly doped epitaxial layer, the groove opening of the groove structure is located on a selected surface of the gallium oxide lightly doped epitaxial layer facing away from the gallium oxide single crystal substrate, the angle between the groove wall of the groove structure and the selected surface of the gallium oxide lightly doped epitaxial layer is 135°, the groove bottom of the groove structure is a plane, the width of the groove opening is 9 μm, the width of the groove bottom is 8 μm, the depth is 500 nm, and the spacing between two adjacent groove structures is 10 μm.

In this embodiment, the p-type NiO dielectric layer is continuously disposed on the selected surface of the gallium oxide lightly doped epitaxial layer and in the trench structure, the top surface of the p-type NiO dielectric layer facing away from the gallium oxide lightly doped epitaxial layer is a continuous and flat plane, the top surface height of the p-type NiO dielectric layer is higher than the height of the selected surface of the gallium oxide lightly doped epitaxial layer, and the carrier concentration of the p-type NiO dielectric layer is approximately 10 ¹⁹ cm ^-3 .

Please refer to FIG. 2 , a method for preparing a gallium oxide power diode includes the following steps:

1) Providing a gallium oxide epitaxial wafer, the gallium oxide epitaxial wafer comprising a stacked gallium oxide single crystal substrate and a gallium oxide lightly doped epitaxial layer, and cleaning the gallium oxide single crystal substrate with ozone plasma;

2) depositing a Ti/Au electrode on the surface of the gallium oxide single crystal substrate facing away from the gallium oxide lightly doped epitaxial layer;

3) using dry etching or wet etching to form a plurality of spaced trench structures on a selected surface of the gallium oxide lightly doped epitaxial layer facing away from the gallium oxide single crystal substrate;

4) sputtering to form a p-type NiO dielectric layer in the trench structure and on a selected surface of the gallium oxide lightly doped epitaxial layer, and forming a continuous and flat surface of the p-type NiO dielectric layer;

5) Ni/Au electrodes are deposited on the p-type NiO dielectric layer.

Comparative Example 1

The structure of a gallium oxide power diode in Comparative Example 1 is substantially the same as that in Example 1, except that the groove wall of the groove structure is perpendicular to the selected surface of the gallium oxide lightly doped epitaxial layer.

Embodiment 2:

Please refer to Figure 3, a gallium oxide power diode includes a Ti/Au electrode, a gallium oxide single crystal substrate, a gallium oxide lightly doped epitaxial layer, a lightly doped p-type NiO dielectric layer, a heavily doped p-type NiO dielectric layer and a Ni/Au electrode arranged in sequence along the longitudinal direction of the gallium oxide power diode, and the Ti/Au electrode forms ohmic contact with the gallium oxide single crystal substrate, and the Ni/Au electrode forms ohmic contact with the heavily doped p-type NiO dielectric layer.

In this embodiment, the carrier concentration of the gallium oxide single crystal substrate is about 10 ¹⁹ cm ^-3 , the thickness of the gallium oxide lightly doped epitaxial layer is 2 μm, the carrier concentration of the gallium oxide lightly doped epitaxial layer is 10 ¹⁶ cm ^-3 , and the upper surface of the gallium oxide lightly doped epitaxial layer is further provided with a plurality of spaced groove structures (that is, the aforementioned sidewalls are inclined groove structures, the same below), the groove opening of the groove structure is located on the selected surface of the gallium oxide lightly doped epitaxial layer facing away from the gallium oxide single crystal substrate, the groove wall of the groove structure and the selected surface of the gallium oxide lightly doped epitaxial layer form an angle of 110°, the groove bottom of the groove structure is a plane, the width of the groove opening is 2 μm, the width of the groove bottom is 1.7 μm, the depth is 300 nm, and the spacing between two adjacent groove structures is 10 μm.

In this embodiment, the lightly doped p-type NiO dielectric layer is continuously disposed on the selected surface of the gallium oxide lightly doped epitaxial layer and in the trench structure, the top surface of the lightly doped p-type NiO dielectric layer facing away from the gallium oxide lightly doped epitaxial layer is a continuous and flat plane, the carrier concentration of the lightly doped p-type NiO dielectric layer is about 10 ¹⁶ cm ^-3 , and the heavily doped p-type NiO dielectric layer is stacked on the lightly doped p-type NiO dielectric layer, and the carrier concentration of the heavily doped p-type NiO dielectric layer is about 10 ¹⁸ cm ^-3 .

Embodiment 3:

Please refer to Figure 4, a gallium oxide power diode includes a Ti/Au electrode, a gallium oxide single crystal substrate, a gallium oxide lightly doped epitaxial layer, a p-type NiO dielectric layer and a Ni/Au electrode arranged in sequence along the longitudinal direction of the gallium oxide power diode. The Ti/Au electrode forms ohmic contact with the gallium oxide single crystal substrate, and the Ni/Au electrode forms ohmic contact with the p-type NiO dielectric layer.

In this embodiment, the carrier concentration of the gallium oxide single crystal substrate is about 10 ¹⁹ cm ^-3 , the thickness of the gallium oxide lightly doped epitaxial layer is 2 μm, the carrier concentration of the gallium oxide lightly doped epitaxial layer is 10 ¹⁶ cm ^-3 , and the upper surface of the gallium oxide lightly doped epitaxial layer is further provided with a plurality of spaced groove structures (that is, the aforementioned sidewalls are inclined groove structures, the same below), the groove opening of the groove structure is located on the selected surface of the gallium oxide lightly doped epitaxial layer facing away from the gallium oxide single crystal substrate, the groove wall of the groove structure and the selected surface of the gallium oxide lightly doped epitaxial layer form an angle of 150°, the groove bottom of the groove structure is a plane, the width of the groove opening is 12 μm, the width of the groove bottom is about 9.5 μm, the depth is 800 nm, and the spacing between two adjacent groove structures is 10 μm.

In this embodiment, the p-type NiO dielectric layer is only arranged on the selected surface of the gallium oxide lightly doped epitaxial layer and the bottom of the trench structure, the Ni/Au electrode is arranged on the p-type NiO dielectric layer and in the trench structure, the Ni/Au electrode is also covered on the side wall of the structure, the Ni/Au electrode forms an ohmic contact with the p-type NiO dielectric layer, and the Ni/Au electrode forms a Schottky contact with the gallium oxide lightly doped epitaxial layer at the side wall of the trench structure.

By comparing the devices in the embodiments and the comparative examples, the introduction of the groove structure will realize a three-dimensional depletion region in the gallium oxide epitaxial layer. When the reverse bias is applied, there will be more areas that can bear the pressure, thereby improving the electric field distribution at the original drift region and the interface; at the same time, since the depletion region relies on the interface and mainly extends to the gallium oxide epitaxial layer, the introduction of the groove structure with the inclined sidewall will lead to the generation of more depletion regions compared to the groove structure with vertical sidewalls. In addition, when the device is forward-conducted, the PN junction is forward-biased, and the diffusion current will also flow through the depletion region into the P-type dielectric structure layer or the gallium oxide epitaxial layer. Therefore, the introduction of the groove structure with the inclined sidewall also expands the current path during forward conduction (the current path area increases). Therefore, the introduction of the groove structure with the inclined sidewall can both increase the breakdown voltage of the device and maintain a relatively low on-resistance.

It should be understood that the above embodiments are only for illustrating the technical concept and features of the present invention, and their purpose is to enable people familiar with the technology to understand the content of the present invention and implement it accordingly, and they cannot be used to limit the protection scope of the present invention. Any equivalent changes or modifications made according to the spirit of the present invention should be included in the protection scope of the present invention.

Claims (6)

1. A gallium oxide power diode with bevel groove integration, comprising an epitaxial structure and a first electrode and a second electrode matched with the epitaxial structure, wherein the epitaxial structure comprises a gallium oxide substrate, a gallium oxide epitaxial layer and a dielectric structure layer stacked in sequence, characterized in that: At least one groove structure is arranged in the gallium oxide epitaxial layer, the groove opening of the groove structure is flush with the selected surface of the gallium oxide epitaxial layer, the groove bottom of the groove structure is a plane, the longitudinal cross-section of the groove structure is an inverted trapezoid, the angle θ between the sidewall of the groove structure and the selected surface of the gallium oxide epitaxial layer is 100°~160°, the ratio of the width of the groove bottom of the groove structure to the groove opening is (1.0~1.5):(1.8~10 ); the ratio of the depth of the groove structure to the width of the groove bottom is (1~1.5):(10~50), the ratio of the depth of the groove structure to the thickness of the gallium oxide epitaxial layer is 1/1~1/3, and the dielectric structure layer is continuously arranged on the selected surface of the gallium oxide epitaxial layer, the sidewall of the groove structure and the groove bottom; The dielectric structure layer is a p-type doped oxide, and the dielectric structure layer includes a first dielectric layer and a second dielectric layer, wherein the first dielectric layer is continuously arranged on a selected surface of the gallium oxide epitaxial layer, a sidewall of the trench structure, and a bottom of the trench, and the second dielectric layer is stacked on the first dielectric layer, wherein the first dielectric layer and the second dielectric layer are made of the same material, a p-type oxide carrier concentration of the second dielectric layer is greater than a p-type oxide carrier concentration of the first dielectric layer, the first electrode is arranged on the dielectric structure layer, and the second electrode is arranged on the substrate, wherein the selected surface is a surface of the gallium oxide epitaxial layer that is away from the gallium oxide substrate. 2. The gallium oxide power diode with sloped groove integration according to claim 1, characterized in that the depth of the groove structure is 300nm~800nm, the width of the groove is 2μm~12μm, and the width of the groove bottom is 1μm~10μm. 3. The gallium oxide power diode with sloped groove integration according to claim 1, characterized in that a plurality of the groove structures are formed on a selected surface of the gallium oxide epitaxial layer, and the plurality of the groove structures are arranged at intervals along a plane extension direction of the selected surface. 4 . The gallium oxide power diode with sloped trench integration according to claim 1 , wherein the material of the dielectric structure layer comprises NiO, CuAlO ₂ or LiGa ₅ O ₈ . 5 . The gallium oxide power diode with sloped groove integration according to claim 1 , wherein the surface of the dielectric structure layer facing away from the gallium oxide epitaxial layer is a continuous and flat plane. 6. The gallium oxide power diode with bevel trench integration according to claim 1, characterized in that: the p-type oxide carrier concentration of the first dielectric layer is 10 ¹⁶ cm ³ to 10 ¹⁷ cm ³ ; the p-type oxide carrier concentration of the second dielectric layer is 10 ¹⁸ cm ³ to 10 ¹⁹ cm ³ .