CN111129166B - Gallium oxide-based semiconductor structure and preparation method thereof - Google Patents

Abstract

The invention discloses a gallium oxide-based semiconductor structure and a preparation method thereof. The gallium oxide-based semiconductor structure includes: a gallium oxide-based epitaxial layer having a plurality of channels, and the multiple channels are formed on the gallium oxide-based epitaxial layer The surfaces are separated from each other by a first distance; a plurality of low barrier Schottky electrodes are formed on the upper surface of the gallium oxide-based epitaxial layer between the plurality of channels; and high barrier Schottky electrodes are formed on the The upper surface of the gallium oxide-based epitaxial layer covers the plurality of channels and the plurality of low-barrier Schottky electrodes. The gallium oxide-based semiconductor structure combines the advantages of high and low potential barriers at the same time, has the advantages of low turn-on voltage and can maintain a small reverse leakage current, and can ensure that the on-state resistance will not increase significantly, even There will be a reduction effect, enabling the double barrier Schottky to be effectively used in high temperature fields.

Description

Gallium oxide-based semiconductor structure and preparation method thereof

technical field

The invention relates to the technical field of semiconductors, in particular to a gallium oxide-based semiconductor structure and a preparation method thereof.

Background technique

Gallium oxide (Ga ₂ O ₃ ), as a very popular emerging ultra-wide bandgap semiconductor material in the current research field, has an ultra-wide bandgap (4.8eV) and a large breakdown field strength (8MV/cm) , thermal stability and chemical stability are very good, the bandgap width and breakdown field strength are second only to diamond (in high-power and optical semiconductor devices, it is an excellent substitute material for diamond), and the preparation method is relatively simple; in addition, oxidation Under the same withstand voltage as GaN and SiC, gallium power devices have lower on-resistance, lower power consumption, and higher temperature resistance, which can greatly save the power loss during the operation of the above-mentioned high-voltage devices. Therefore, with the deepening of research, gallium oxide-based semiconductor technology has been rapidly developed, and it is more and more used in practical semiconductor devices, such as various diodes, transistors and photodetectors based on gallium oxide materials, etc. . However, there are still many deficiencies in existing gallium oxide-based semiconductor devices. Specifically, a Schottky diode semiconductor device can be described as an example:

A Schottky Barrier Diode (SBD for short), as a rectification device, is widely used in circuits. An idealized SBD should have zero turn-on voltage drop and zero reverse leakage current. However, in practical applications, the conduction voltage drop and reverse leakage current of SBD are often directly related to SBH. Choosing a higher SBH (Schottky barrier height, referred to as SBH, referring to the barrier height of the metal-semiconductor contact interface) can effectively reduce the reverse leakage current of the Schottky diode, but it will lead to a higher forward turn-on voltage; while choosing a higher Low SBH can obtain lower turn-on voltage, but will result in higher reverse leakage current. Higher turn-on voltage and reverse leakage current mean more energy is lost, so there needs to be a balance between reducing the turn-on voltage and reducing reverse leakage current.

In order to solve the energy loss problem caused by the high turn-on voltage and high leakage current of SBD, the SBD with trench MOS structure (metal-oxide-semiconductor, MOS for short, referring to metal-oxide-semiconductor structure) is proposed in the prior art: using The trench MOS structure leads the peak electric field from the metal-Ga ₂ O ₃ interface to the bottom of the trench when the diode is reverse biased, in order to effectively reduce the reverse leakage current and increase the breakdown voltage. However, while introducing the trench MOS structure, it reduces the area of the Schottky contact, thereby sacrificing the on-state resistance; in addition, since the depletion effect of the trench MOS structure is not obvious, the effect on reducing the leakage current is very limited ; Finally, according to the thermal field emission model, the reverse leakage current of ordinary Schottky diodes will be significantly degraded at high temperatures.

Contents of the invention

(1) Technical problems to be solved

In order to solve the problem of energy loss caused by high turn-on voltage and high leakage current of semiconductor devices in the prior art, while not sacrificing the good performance related to on-state resistance and reverse leakage current in the original device, the present invention discloses a A gallium oxide-based semiconductor structure and a preparation method thereof.

(2) Technical solution

One aspect of the present invention discloses a gallium oxide-based semiconductor structure. The semiconductor structure includes: a gallium oxide-based epitaxial layer with a plurality of channels formed on the upper surface of the gallium oxide-based epitaxial layer and separated from each other by a a distance; a plurality of low-barrier Schottky electrodes formed on the upper surface of the gallium oxide-based epitaxial layer between the plurality of channels; and a high-barrier Schottky electrode formed on the upper surface of the gallium oxide-based epitaxial layer, and Covering multiple channels and multiple low-barrier Schottky electrodes; the channel is recessed in the inner surface of the gallium oxide-based epitaxial layer as a high-barrier contact surface in contact with the high-barrier Schottky electrodes, two adjacent The upper surface of the gallium oxide-based epitaxial layer between the channels serves as a low barrier contact surface in contact with the low potential barrier Schottky electrode.

As an embodiment of the present invention, the high-barrier Schottky electrode is a metal oxide electrode; and the low-barrier Schottky electrode is a metal electrode, and the metal is Ni, Au, Pt, Cu, Mo, Ag, or W.

As an embodiment of the present invention, the depth of the channel is h, 1 μm≤h≤3 μm; the width of the channel is k, 1 μm≤k≤5 μm; the first distance is d, 1 μm≤d≤5 μm.

As an embodiment of the present invention, a first protective layer is further included between the low barrier Schottky electrode and the high barrier Schottky electrode.

As an embodiment of the present invention, the semiconductor structure further includes: a gallium oxide-based substrate layer located under the gallium oxide-based epitaxial layer, and an ohmic electrode located under the gallium oxide-based substrate layer.

As an embodiment of the present invention, the outer surface of the ohmic electrode is covered with a second protective layer.

Another aspect of the present invention discloses a method for preparing a gallium oxide-based semiconductor structure, which is used to prepare the above-mentioned gallium oxide-based semiconductor structure, including: forming a plurality of low-potential Barrier Schottky electrodes; use multiple low barrier Schottky electrodes as masks to etch the upper surface of the gallium oxide-based epitaxial layer to form multiple channels, and the gallium oxide-based epitaxial layer between two adjacent channels The upper surface of the layer serves as a low-barrier contact surface in contact with the low-barrier Schottky electrode; The Schottky electrodes simultaneously cover multiple trenches and multiple low barrier Schottky electrodes, and the inner surface of the trench serves as a high barrier contact surface in contact with the high potential barrier Schottky electrodes.

As an embodiment of the present invention, a plurality of low-barrier Schottky electrodes are formed on the upper surface of the gallium oxide-based epitaxial layer at a first distance by a lift-off method.

As an embodiment of the present invention, using a plurality of low-barrier Schottky electrodes as masks to etch the upper surface of the gallium oxide-based epitaxial layer to form a plurality of channels, including: using the low-barrier Schottky electrodes as masks A mold is used to perform dry etching on the gallium oxide-based epitaxial layer by using ICP, so as to form a plurality of trenches on the surface of the gallium oxide-based epitaxial layer by recessing.

As an embodiment of the present invention, forming a high barrier Schottky electrode on the upper surface of the gallium oxide-based epitaxial layer formed with multiple channels includes: using magnetron sputtering or pulsed laser deposition on multiple channels The inner surface forms a high barrier Schottky electrode simultaneously covering a plurality of low barrier Schottky electrodes.

(3) Beneficial effects

One aspect of the present invention discloses a gallium oxide-based semiconductor structure. The structure is provided with multiple channels on the gallium oxide-based epitaxial layer, and a low-barrier Schottky is formed between adjacent channels, and directly based on the above structure. Form a layer of high barrier Schottky electrode, cover the low barrier Schottky, and form a high barrier Schottky on the inner surface of the channel, which can form a high and low double barrier Schottky gallium oxide-based semiconductor structure, which combines the advantages of high and low potential barriers at the same time, has the advantage of lower turn-on voltage and can maintain a smaller reverse leakage current. In addition, the high and low double barrier contact can increase the Schottky contact area, so it can ensure that the on-state resistance will not increase significantly, or even reduce it. Metal oxide Schottkys have a large built-in potential that effectively depletes and pinches the reverse leakage of low SBH Schottkys. Metal oxide Schottky diodes have quite good working characteristics at high temperatures, so the double barrier Schottky can be effectively used in high temperature fields.

Another aspect of the present invention discloses a method for preparing a gallium oxide-based semiconductor structure, which is used to prepare a gallium oxide-based semiconductor structure with the above-mentioned high and low double barrier Schottky structure, wherein the low The barrier Schottky metal ensures that the structure has a low turn-on voltage and good on-state resistance. The preparation process is simple, the preparation cost is low, and it is beneficial to realize industrialized mass production.

Description of drawings

1 is a schematic diagram of the composition of a gallium oxide-based semiconductor structure in an embodiment of the present invention;

Fig. 2 is the comparison diagram of the I-V simulation curve of high and low double potential barrier Schottky structure and conventional structure SBD in the embodiment of the present invention;

3 is a schematic flow chart of a method for preparing a gallium oxide-based semiconductor structure in an embodiment of the present invention;

FIG. 4 is a schematic structural diagram of each preparation stage of the gallium oxide-based semiconductor structure in an embodiment of the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

One aspect of the present invention discloses a gallium oxide-based semiconductor structure. As shown in FIG. 1 , the semiconductor structure includes: a gallium oxide-based epitaxial layer 130 with multiple channels 131 formed on the The upper surface of the gallium-based epitaxial layer 130 is separated from each other by a first distance d; a plurality of low-barrier Schottky electrodes 120 formed on the upper surface of the gallium oxide-based epitaxial layer 130 between the plurality of channels 131; and a high potential Barrier Schottky electrode 110, formed on the upper surface of the gallium oxide-based epitaxial layer 130, and covering the plurality of channels 131 and the plurality of low-barrier Schottky electrodes 120; wherein, the channel 131 The gallium oxide-based epitaxial layer 130 is recessed on the inner surface of the gallium oxide-based epitaxial layer 130 as a high-barrier contact surface in contact with the high-barrier Schottky electrode 110, and the gallium oxide-based epitaxial layer 130 between two adjacent channels 131 The upper surface serves as a low-barrier contact surface in contact with the low-barrier Schottky electrode 120 .

Specifically, as an embodiment of the present invention, the upper surface of the gallium oxide-based epitaxial layer 130 is provided with a plurality of channels 131 formed by recessing at a first distance (which may be realized by a thin film etching process). For details, refer to FIG. 1 is shown in the dotted box. It should be noted here that the first distance is d, and d may be a variable of the distance value, that is, d is not a fixed distance value. In other words, the first distance d between the first two adjacent channels 131 and the first distance d' between the second adjacent two channels 131 may be inconsistent. As shown in FIG. 1 , when the trenches 131 are formed, the protrusions 132 with a width dimension of the first distance d are formed between adjacent trenches 131 at the same time. It should be noted that, since FIG. 1 is a lateral partial cross-sectional view of the gallium oxide-based semiconductor structure, only three protrusions 132 of the semiconductor structure and four channels 131 spaced apart from each other by the protrusions are shown. The mentioned first distance d and width dimension can be understood as the dimension that can be shown in the partial cross-sectional view.

As an embodiment of the present invention, the boss 132 of the gallium oxide-based epitaxial layer 130 is covered with a low-barrier Schottky electrode 120, and the low-barrier Schottky electrode 120 is only formed on the upper surface of the boss 132. , the low-barrier Schottky electrode 120 is only in contact with the upper surface of the protrusion 132 to form the low-barrier Schottky contact on the interface therebetween. In addition, on the gallium oxide-based epitaxial layer 130 formed with the low-barrier Schottky electrode 120, a layer of high-barrier Schottky electrode 110 is also covered, and the high-barrier Schottky electrode 110 is mainly formed in the channel 131 (as shown by the dotted box in FIG. 1 ), and the high barrier Schottky electrode 110 is in contact with the inner surface of the channel 131 to form the high barrier Schottky electrode 110 on the interface therebetween. touch. In addition, the thickness of the high-barrier Schottky electrode 110 is much greater than the sum of the depth of the channel 131 and the thickness of the low-barrier Schottky electrode 120 , and covers the low-barrier Schottky electrode 120 .

To sum up, the gallium oxide-based semiconductor structure of the present invention realizes high and low double barrier Schottky contact, increases the Schottky contact area, and thus can ensure that the on-state resistance will not increase significantly. The technical effect corresponding to this technical feature is illustrated by taking the applicable high and low double barrier Schottky diode of the present invention as an example: when the high and low double potential barrier Schottky diode is forward biased, the low potential barrier Schottky diode conducts at lower voltages, so the turn-on voltage of this structure will be roughly the same as that of a low-barrier Schottky diode. When the turn-on voltage of the high potential barrier is reached, the high and low double barrier Schottky conducts simultaneously, so the on-state resistance will not drop significantly. When the high-low double-barrier Schottky diode is reverse-biased, due to the depletion effect of the high-barrier Schottky channel, the reverse leakage of the low-barrier Schottky is pinched off. Therefore, the reverse leakage of the high and low double barrier Schottky diode will be of the same order as that of the high barrier Schottky diode.

As an embodiment of the present invention, as shown in Figure 1, the depth of the channel is h, 1 μm≤h≤3 μm; the width of the channel is k, 1 μm≤k≤5 μm; the first distance is d, 1 μm≤d≤5 μm . The aforementioned h, k, and d may form a structural size proportional relationship according to the aforementioned size range. Specifically, the size of the structure can be adjusted accordingly as the doping concentration of the gallium oxide-based epitaxial layer changes. Since the present invention introduces a double barrier Schottky structure by setting channels in a single structure, the contact area between the high and low Schottky electrodes and the gallium oxide-based epitaxial layer is increased, and the interface junction resistance is reduced, so that when When it is applied to a Schottky diode, the high and low double potential barrier Schottky diode device can have a smaller on-state resistance. As shown in Figure 2, when the trench depth h and width k are both set to 2 μm, and the doping concentration of the gallium oxide-based epitaxial layer is 3×10 ¹⁶ cm ^-3 , the voltage of the high-low double barrier Schottky diode device is comprehensive. When turned on, V _anode >2V, and its slope increases significantly. Therefore, by controlling the groove depth h and width k corresponding to the doping concentration of the gallium oxide-based epitaxial layer, not only can the contact area of the Schottky electrode be increased to ensure that the on-state resistance will not increase, but even the on-state resistance can be achieved. The effect of reducing the state resistance.

As an embodiment of the present invention, the high-barrier Schottky electrode is a metal oxide electrode, such as platinum oxide PtOx; metal oxide Schottky has a large built-in potential, which can effectively deplete and pinch off the low SBH ( SBH: Abbreviation of Schottkybarrier height, which refers to the barrier height of the metal-semiconductor contact interface) Schottky's reverse leakage. At the same time, since the high-barrier Schottky structure is made of metal oxide, the stepping can form a relatively high Schottky barrier height (SBH) (up to 2.0eV or more), and can also have very good high-temperature operation characteristics, so that the double-barrier Schottky gallium oxide semiconductor structure also has good application prospects at high temperatures.

As an embodiment of the present invention, the low-barrier Schottky electrode is a metal electrode, which can better realize the low-barrier Schottky contact with the gallium oxide-based epitaxial layer, and has a bottomed Schottky barrier height (SBH ), specifically, the metal electrode can use Ni, Au, Pt, Cu, Mo, Ag or W, etc.

As an embodiment of the present invention, as shown in FIG. 1, a layer of first protection layer 160 is further included between the low barrier Schottky electrode 120 and the high barrier Schottky electrode 110, and the first protection layer is used to isolate the low The barrier Schottky electrode 120 and the high barrier Schottky electrode 110 prevent direct contact between the two, and at the same time protect the low barrier Schottky electrode mainly made of metal materials during the preparation of the gallium oxide-based semiconductor structure 120 will not produce an oxidation reaction on the surface to become a metal oxide. Therefore, the first protective layer 160 completely covers the upper surface and the side surface of the low-barrier Schottky electrode 120, so that the low-barrier Schottky electrode 120 only passes through the lower surface and the boss 132 of the gallium oxide-based epitaxial layer 130. The top surfaces are in contact forming a low barrier Schottky. Therefore, the width dimension of the first protective layer is equal to the first distance d, which is a layer of protective film covering the outer surface of the low-barrier Schottky electrode 120 . Generally speaking, the first protective layer can be prepared by selecting metal gold Au with relatively stable properties.

As an embodiment of the present invention, as shown in FIG. 1 , the semiconductor structure further includes: a gallium oxide-based substrate layer 140 located under the gallium oxide-based epitaxial layer 130, and the gallium oxide-based substrate layer 140 is used to form the gallium oxide-based semiconductor structure. Provide substrate function, and the ohmic electrode 150 under the gallium oxide-based substrate layer 140 is used as the back electrode of the gallium oxide-based semiconductor structure to form an ohmic contact with the lower surface of the gallium oxide-based substrate layer, specifically, the ohmic electrode 150 can be made of metal, such as titanium Ti. As an embodiment of the present invention, the outer surface of the ohmic electrode 150 is covered with a layer of second protective layer 170, as shown in FIG. An oxidation reaction occurs on the surface to become a metal oxide. Therefore, the second protection layer 170 completely covers the lower surface and the side surface of the ohmic electrode 150 , so that the ohmic electrode 150 only contacts the lower surface of the gallium oxide-based substrate layer 140 through the upper surface to form an ohmic contact.

Another aspect of the present invention discloses a method for preparing a gallium oxide-based semiconductor structure, which is used to prepare the above-mentioned gallium oxide-based semiconductor structure. As shown in FIG. 3, the method includes the following steps:

S210, forming a plurality of low-barrier Schottky electrodes on the upper surface of the gallium oxide-based epitaxial layer at intervals of a first distance;

S220. Using multiple low-barrier Schottky electrodes as masks, etch the upper surface of the gallium oxide-based epitaxial layer to form multiple channels, and the upper surface of the gallium oxide-based epitaxial layer between two adjacent channels serves as a low barrier contact surface in contact with a low barrier Schottky electrode; and

S230, forming a high barrier Schottky electrode on the upper surface of the gallium oxide-based epitaxial layer formed with multiple channels, and the high barrier Schottky electrode simultaneously covers multiple channels and multiple low barrier Schottky electrodes , the inner surface of the channel serves as a high barrier contact surface to the high barrier Schottky electrode.

Specifically, as an embodiment of the present invention, etching may be performed on the upper surface of the gallium oxide-based epitaxial layer 130 to form a plurality of channels 131 separated by a first distance from each other. For details, refer to the dashed box shown in FIG. 1 . When the trenches 131 are formed, the protrusions 132 with a width dimension of the first distance d are formed between adjacent trenches 131 at the same time. In addition, a low barrier Schottky electrode 120 is correspondingly formed on the boss 132 of the gallium oxide-based epitaxial layer 130, and the low barrier Schottky electrode 120 is only formed on the upper surface of the boss 132. The Tertky electrode 120 is only in contact with the upper surface of the protrusion 132 to form the low-barrier Schottky contact on the interface therebetween. In addition, on the gallium oxide-based epitaxial layer 130 formed with the low-barrier Schottky electrode 120, a layer of high-barrier Schottky electrode 110 is directly prepared, and the high-barrier Schottky electrode 110 is mainly formed in the channel 131 (as shown by the dotted box in FIG. 1 ), and the high barrier Schottky electrode 110 is in contact with the inner surface of the channel 131 to form the high barrier Schottky electrode 110 on the interface therebetween. touch. In addition, the thickness of the high-barrier Schottky electrode 110 is much greater than the sum of the depth of the channel 131 and the thickness of the low-barrier Schottky electrode 120, and the low-barrier Schottky electrode 120 is covered (that is, it cannot be directly displayed from the top view angle). low barrier Schottky electrode 120).

To sum up, the gallium oxide-based semiconductor structure of the present invention realizes high and low double barrier Schottky contact, increases the Schottky contact area, and thus can ensure that the on-state resistance will not increase significantly. The technical effect corresponding to this technical feature is illustrated by taking the applicable high and low double barrier Schottky diode of the present invention as an example: when the high and low double potential barrier Schottky diode is forward biased, the low potential barrier Schottky diode conducts at lower voltages, so the turn-on voltage of this structure will be roughly the same as that of a low-barrier Schottky diode. When the turn-on voltage of the high potential barrier is reached, the high and low double barrier Schottky conducts simultaneously, so the on-state resistance will not drop significantly. When the high-low double-barrier Schottky diode is reverse-biased, due to the depletion effect of the high-barrier Schottky channel, the reverse leakage of the low-barrier Schottky is pinched off. Therefore, the reverse leakage of the high and low double barrier Schottky diode will be of the same order as that of the high barrier Schottky diode.

As an embodiment of the present invention, a plurality of low-barrier Schottky electrodes are formed on the upper surface of the gallium oxide-based epitaxial layer at a first distance by a lift-off method. The lift-off process method is a commonly used lift-off process in the field of microelectronic technology. Generally, photoresist is used for leveling, photolithography, and development for patterning, and then subsequent electrode deposition or etching and other related processes are performed on the semiconductor according to the patterning results. In the embodiment of the present invention, the lift-off process is used to realize the patterning treatment on the upper surface of the gallium oxide-based epitaxial layer, and then the result of the patterning treatment is formed on the upper surface of the gallium oxide-based epitaxial layer to form a plurality of For low barrier Schottky electrodes, the first distance is d. At the same time, when forming a plurality of low potential barrier Schottky electrodes, a first protection layer covering the outer surface of the low potential barrier Schottky electrodes is formed to prevent oxidation of the low potential barrier Schottky electrode surfaces. A low-barrier Schottky electrode forms a low-barrier Schottky contact on the contact surface of the gallium oxide-based epitaxial layer.

As an embodiment of the present invention, based on a plurality of low-barrier Schottky electrodes, a plurality of channels are formed by recessing the upper surface of the gallium oxide-based epitaxial layer, including: using the low-barrier Schottky electrodes as a mask, using ICP to The gallium oxide-based epitaxial layer is subjected to dry etching, so as to form a plurality of trenches on the surface of the gallium oxide-based epitaxial layer by recessing. On the upper surface of the gallium oxide-based epitaxial layer formed with multiple low-barrier Schottky electrodes, dry-etching the exposed upper surface of the gallium oxide-based epitaxial layer by using the multiple low-barrier Schottky electrodes as a mask, A plurality of channels recessed based on the upper surface may be formed.

As an embodiment of the present invention, forming high-barrier Schottky electrodes simultaneously covering multiple low-barrier Schottky electrodes on the inner surfaces of multiple trenches includes: using magnetron sputtering or pulsed laser deposition on The inner surfaces of the plurality of trenches form high barrier Schottky electrodes simultaneously covering the plurality of low barrier Schottky electrodes. On the basis of the gallium oxide-based epitaxial layer structure of multiple low-barrier Schottky electrodes formed by multiple channels and spaced channels, the preparation of high-barrier Schottky electrodes is directly carried out, covering the low-barrier Schottky electrodes and channels. A high barrier Schottky electrode forms a high barrier Schottky contact on the interface in the channel of the gallium oxide-based epitaxial layer.

In order to further achieve a clear description of the above-mentioned preparation method, the present invention specifically cites the following examples, which are described and explained in more detail in conjunction with Figures 4a-4e:

In an embodiment of the present invention, the gallium oxide-based substrate layer 140 is a gallium oxide Ga ₂ O ₃ wafer, the gallium oxide-based epitaxial layer 130 is an epitaxial layer structure of a gallium oxide wafer, and the metal of the low barrier Schottky electrode is Ni nickel , the first protective layer is gold Au, the oxide metal of the high barrier Schottky electrode is platinum oxide, the ohmic electrode is Ti titanium, and the second protective layer is gold Au.

The preparation method in the embodiment of the present invention is shown in Figure 4a-Figure 4e;

The Ga ₂ O ₃ wafer with the gallium oxide epitaxial layer 130 , the Ga ₂ O ₃ wafer can serve as the substrate layer 140 at the same time. The gallium oxide epitaxial layer 130 can have a thickness of more than 5 μm, as shown in FIG. 4a;

On the upper surface of the gallium oxide epitaxial layer 130, a lift-off process is used to directly grow multiple low-barrier metals at equal intervals as the low-barrier Schottky electrodes 120. There are multiple low-barrier Schottky electrodes 120, to The first distance d is a pitch, which is arranged at equal intervals on the upper surface of the gallium oxide epitaxial layer 130 and is in contact with the upper surface of the gallium oxide epitaxial layer 130 to form a low-barrier Schottky contact. Then form the first protective layer 160 covering the low barrier Schottky electrode 120 on the outer surface of the formed low barrier Schottky electrode 120, wherein the low barrier metal can be nickel Ni, and the first protective layer 160 can be Gold Au, as shown in Figure 4b;

Using the low-barrier Schottky electrode 120 and its first protective layer 160 on the upper surface of the gallium oxide epitaxial layer 130 shown in FIG. Dry etching to form a plurality of channels 131 corresponding to the low barrier Schottky electrode 120 and its first protective layer 160 (as shown in the dashed box in FIG. structure. Among them, the etching gas can be selected as BCl ₃ +Ar to ensure better etching verticality, as shown in Figure 4c;

On the upper surface of the above-mentioned gallium oxide epitaxial layer 130 forming the channel 131 and the low-barrier Schottky electrode 120 and its first protective layer 160 as shown in FIG. 4c above, a high-barrier Schottky electrode is grown by magnetron sputtering. The base electrode 110, the high barrier Schottky electrode uses platinum oxide PtO _x as the electrode formation material, fills the channel and covers the low barrier Schottky electrode 120 and its first protective layer 160, as shown in Figure 4d ;

On the basis of the above-mentioned structure shown in FIG. 4d, a metal back electrode titanium Ti is grown on the back of the structure by electron beam evaporation as the ohmic electrode 150, and finally a second protective layer of gold Au is covered on the outer surface of the ohmic electrode 150 as a protection against Oxidation of titanium electrodes. Wherein, the ohmic electrode 150 is in contact with the back surface of the gallium oxide substrate layer to form an ohmic contact.

The specific embodiments described above have further described the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (8)

1. A gallium oxide-based semiconductor structure, characterized in that, comprising: The gallium oxide-based epitaxial layer has a plurality of channels, and the multiple channels are formed on the upper surface of the gallium oxide-based epitaxial layer and are separated from each other by a first distance, wherein the material of the gallium oxide-based epitaxial layer is Ga ₂ O ₃ chip; a gallium oxide-based substrate layer located under the gallium oxide-based epitaxial layer; A plurality of low-barrier Schottky electrodes formed on the upper surface of the gallium oxide-based epitaxial layer between the plurality of channels, the low-barrier Schottky electrodes being Ni; and A high barrier Schottky electrode is formed on the upper surface of the gallium oxide-based epitaxial layer and covers the plurality of channels and the plurality of low barrier Schottky electrodes, wherein the high barrier Schottky The base electrode is PtO _x ; A first protection layer, located between the low potential barrier Schottky electrode and the high potential barrier Schottky electrode, wherein the first protection layer completely covers the upper surface and sides of the low potential barrier Schottky electrode surface, so that the low barrier Schottky electrode contacts the upper surface of the boss of the gallium oxide-based epitaxial layer through the lower surface to form a low barrier Schottky; Wherein, the channel is recessed in the inner surface of the gallium oxide-based epitaxial layer as a high-barrier contact surface in contact with the high-barrier Schottky electrode, and the gallium oxide-based epitaxial layer between two adjacent channels The upper surface of the epitaxial layer serves as a low barrier contact surface in contact with the low barrier Schottky electrode; Wherein, the gallium oxide-based semiconductor structure is applied to a high-low dual-barrier Schottky diode: when the high-low dual-barrier Schottky diode is forward-biased, the low-barrier Schottky conducts at a lower voltage, so The turn-on voltage of this structure will be basically consistent with the low barrier Schottky diode; when the turn-on voltage of the high barrier is reached, the high and low double barrier Schottky will be turned on at the same time, so the on-state resistance will not drop significantly; When the high-low double-barrier Schottky diode is reverse-biased, due to the depletion effect of the high-barrier Schottky channel, the reverse leakage of the low-barrier Schottky is pinched off, so the high-low double-barrier The reverse leakage of the Schottky diode will be of the same order as the high barrier Schottky diode; Among them, the formation of a high barrier Schottky electrode using PtOx can achieve a Schottky barrier height of 2.0 eV or more. 2. The gallium oxide-based semiconductor structure according to claim 1, wherein the depth of the channel is h, 1 μm≤h≤3 μm; the width of the channel is k, 1 μm≤k≤5 μm; The first distance is d, 1 μm≤d≤5 μm. 3. The gallium oxide-based semiconductor structure according to claim 1, wherein the semiconductor structure further comprises: An ohmic electrode located under the gallium oxide-based substrate layer. 4. The gallium oxide-based semiconductor structure according to claim 3, characterized in that, The outer surface of the ohmic electrode is covered with a second protective layer. 5. A method for preparing a gallium oxide-based semiconductor structure, for preparing the gallium oxide-based semiconductor structure according to any one of claims 1-4, characterized in that it comprises: forming a plurality of low-barrier Schottky electrodes on the upper surface of the gallium oxide-based epitaxial layer with a first distance; Using the plurality of low-barrier Schottky electrodes as a mask, the upper surface of the gallium oxide-based epitaxial layer is etched to form a plurality of channels, and the gallium oxide-based epitaxial layer between two adjacent channels is a surface serving as a low barrier contact to said low barrier Schottky electrode; and A high barrier Schottky electrode is formed on the upper surface of the gallium oxide-based epitaxial layer formed with multiple channels, and the high barrier Schottky electrode simultaneously covers the multiple channels and the multiple low barrier Schottky electrodes A base electrode, the inner surface of the channel serves as a high barrier contact surface in contact with the high barrier Schottky electrode. 6. The preparation method of the gallium oxide-based semiconductor structure according to claim 5, characterized in that, A plurality of low-barrier Schottky electrodes are formed on the upper surface of the gallium oxide-based epitaxial layer at a first distance by using a lift-off method. 7. The method for preparing a gallium oxide-based semiconductor structure according to claim 5, wherein the upper surface of the gallium oxide-based epitaxial layer is engraved using the plurality of low-barrier Schottky electrodes as a mask. Etching forms multiple channels, including: Using the low-barrier Schottky electrode as a mask, the gallium oxide-based epitaxial layer is dry-etched by ICP, and the upper surface of the gallium oxide-based epitaxial layer is recessed to form a plurality of channels. 8. The method for preparing a gallium oxide-based semiconductor structure according to claim 5, wherein the formation of a high-barrier Schottky electrode on the upper surface of the gallium oxide-based epitaxial layer formed with a plurality of channels comprises: High-barrier Schottky electrodes simultaneously covering the plurality of low-barrier Schottky electrodes are formed on the inner surfaces of the plurality of channels by magnetron sputtering or pulsed laser deposition.

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