CN110416319B - Double-sided Schottky-controlled fast recovery diode device and preparation method thereof - Google Patents

Abstract

The invention relates to a double-sided Schottky-controlled fast recovery diode device and a preparation method thereof, wherein the fast recovery diode device comprises a semiconductor substrate, a first semiconductor layer and a second semiconductor layer, wherein the semiconductor substrate comprises an N-type substrate and an N-type buffer layer, and an active region is arranged in the central region of the N-type substrate; on the cross section of the diode device, an active region comprises a plurality of active P columns and active N columns which are alternately distributed, anode metal is arranged on an N-type substrate, the active P columns are in ohmic contact with the anode metal on the N-type substrate, and the active N columns are in Schottky contact with the anode metal on the N-type substrate; and a plurality of cathode P-regions and cathode N+ regions which are alternately distributed are arranged on the N-type buffer layer, the cathode N+ regions are in ohmic contact with cathode metal, and the cathode P-regions are in Schottky contact with the cathode metal. The invention can obtain faster reverse recovery time, reduce dynamic loss, improve excellent softness and have high reliability.

Description

Fast recovery diode device and preparation method controlled by double-sided Schottky

technical field

The invention relates to a diode device and a preparation method, in particular to a double-sided Schottky-controlled fast recovery diode device and a preparation method, belonging to the technical field of microelectronics.

Background technique

With the development of power electronics technology, the application of new power electronic devices in various frequency conversion circuits and chopper circuits puts forward higher requirements for fast diodes that are connected in parallel and act as clamps or buffers to reduce diode inverse The reverse recovery charge produces the main power consumption in the power switch device, reduces the high induced voltage added to the power switch device caused by reverse recovery, and improves the service life and reliability of the power switch device. In order to achieve the above purpose, the diode must have a short reverse recovery time trr, a small reverse recovery current IRM and soft recovery characteristics.

In high-voltage current circuits, traditional PIN diodes have good reverse withstand voltage performance, and the forward voltage drop is very low under high on-state current density, showing a low resistance state. However, due to the long lifetime of the minority carrier, the switching speed of the diode is relatively low, especially the reverse recovery characteristics are poor, and it is increasingly unable to meet the development and requirements of power switching devices. Therefore, it is of practical significance to develop high frequency, high voltage, fast soft recovery and high power diodes.

At present, the manufacturing of domestic fast recovery diodes is basically common PIN/MPS and other structures, and the manufacturing technologies are mostly based on minority carrier lifetime control technologies such as heavy metal Au/Pt doping and electron irradiation, and these technologies have some unavoidable problems. Defects, such as large reverse bias leakage under high temperature of electron irradiation, poor softness and reverse recovery produce high induced voltage, which affects circuit reliability, heavy metal Pt doping high temperature performance degradation, negative temperature coefficient is not suitable for parallel circuits, etc.

Contents of the invention

The purpose of the present invention is to overcome the deficiencies in the prior art, to provide a double-sided Schottky-controlled fast recovery diode device and its preparation method, which can obtain a faster reverse recovery time, reduce dynamic loss, and improve softness Degree, small temperature coefficient, high reliability.

According to the technical solution provided by the present invention, the double-sided Schottky-controlled fast recovery diode device includes a semiconductor substrate, and the semiconductor substrate includes an N-type substrate and an N-type buffer layer adjacent to the N-type substrate, setting an active region in the central region of the N-type substrate;

On the cross-section of the diode device, the active region includes a number of alternately distributed active P columns and active N columns, and the active P columns and active N columns are located in the upper part of the N-type substrate; An anode metal is set on the substrate, the active P column is in ohmic contact with the anode metal on the N-type substrate, and the active N column is in Schottky contact with the anode metal on the N-type substrate;

A plurality of alternately distributed cathode P-regions and cathode N+regions are arranged on the N-type buffer layer, the cathode N+regions are in ohmic contact with the cathode metal, and the cathode P-regions are in contact with the cathode metal Schottky.

A field ring area is provided on the outer circle of the active area, and the field ring area includes a field ring P column, and the field ring P column is in ohmic contact with the anode metal.

The active P column includes an upper active P+ region and a lower active P- region, the active P- region is adjacent to the active P+ region, and the doping concentration of the active P+ region is greater than that of the active P+ region. The doping concentration of the - area, and the active P column is in ohmic contact with the anode metal through the active P+ area; the lateral width of the active N column is Wn, and the distance between adjacent active N columns is Wp.

The field ring P column and the active P column are the same process manufacturing layer, and the field ring P column includes a field ring P+ area located in the upper part and a field ring P- area located in the lower part, and the field ring P- area is adjacent to the field ring P+ area , and the field ring P column is in ohmic contact with the anode metal through the field ring P+ region.

A preparation method of a double-sided Schottky-controlled fast recovery diode device, the preparation method comprising the steps of:

Step 1, providing a semiconductor substrate with an N conductivity type, the semiconductor substrate comprising an N-type substrate;

Step 2, growing a field oxide layer on the front side of the N-type substrate, the field oxide layer covering the front side of the N-type substrate;

Step 3, selectively masking and etching the field oxide layer to obtain a field oxide layer window penetrating through the field oxide layer;

Step 4, using the above-mentioned field oxide layer window to perform P-type impurity ion implantation on the front side of the N-type substrate, and perform high-temperature well pushing after the implantation, so as to obtain the substrate P region in the upper part of the N-type substrate;

Step 5, carry out P-type impurity ion implantation again to above-mentioned substrate P district, to obtain P+ district in the upper part of substrate P district, utilize P+ district and be positioned at the substrate P district below P+ district, can obtain required Active P columns and field ring P columns, and in the N-type substrate, the N-type substrate between adjacent active P columns forms active N columns;

Step 6, remove the above-mentioned field oxide layer, and set an anode metal on the front side of the N-type substrate, the anode metal covers the front side of the N-type substrate, and the anode metal is in ohmic contact with the active P column and the field ring P column, The anode metal is in contact with the active N-pillar Schottky;

Step 7, thinning the back of the above-mentioned N-type substrate, and implanting N-type impurity ions on the back of the thinned N-type substrate, and obtaining an N-type buffer zone after activation;

Step 8, coating the back photoresist layer on the N-type buffer zone, and performing photoetching on the back photoresist layer to obtain a back photoresist layer window penetrating the back photoresist layer;

Step 9. Implanting N-type impurity ions into the N-type buffer zone by using the above-mentioned backside photoresist layer window;

Step 10, remove the photoresist layer on the back side, and implant P-type impurity ions into the N-type buffer zone. After activation, alternately distributed cathode P-regions and cathode N+ regions can be obtained, and pass through the N-type buffer zone Can form N-type buffer layer;

Step 11. A cathode metal is provided on the cathode P-region and the cathode N+ region, the cathode N+ region is in ohmic contact with the cathode metal, and the cathode metal is in Schottky contact with the cathode P-region.

The material of the semiconductor substrate includes silicon.

Advantages of the present invention: active P columns and active N columns are alternately distributed, and active P columns are in ohmic contact with anode metal, active N columns are in contact with anode metal Schottky; cathode P- regions and cathode N+ regions are alternately distributed , the cathode N+ region is in ohmic contact with the cathode metal, and the cathode P- region is in contact with the cathode metal Schottky, thereby greatly reducing the carrier injection efficiency, and the anode of the diode can pass through the lateral width Wn of the active N column, the diode The cathode can adjust the injection efficiency by the area of the cathode P-region, the larger the lateral width Wn of the active N column, the lower the anode hole injection efficiency, and the larger the area of the cathode P-region, the smaller the electron injection efficiency. Therefore, the carriers from the anode to the cathode can be smoothly and linearly distributed, so during the reverse recovery period, the amount of carriers extracted from the N-type substrate changes with time, and the rate of minority carrier extraction changes very little. Therefore, the voltage induced on the inductive load is very small, the dynamic loss is reduced, the oscillation of the circuit is controlled, and better reverse recovery softness is obtained.

Description of drawings

Fig. 1 is a sectional view of the present invention.

Fig. 2 is a schematic diagram of the paths of electrons and holes in the forward channel of the present invention.

3 to 11 are cross-sectional views of the process steps of the specific implementation of the present invention, wherein

Fig. 3 is a cross-sectional view of an N-type substrate of the present invention.

FIG. 4 is a cross-sectional view of the field oxide layer obtained in the present invention.

Fig. 5 is a cross-sectional view of the field oxide layer window obtained in the present invention.

FIG. 6 is a cross-sectional view of an active P column and an active N column obtained in the present invention.

FIG. 7 is a cross-sectional view of the present invention after removing the field oxide layer.

Fig. 8 is a cross-sectional view of the anode metal obtained in the present invention.

Fig. 9 is a cross-sectional view of an N-type buffer zone obtained in the present invention.

Fig. 10 is a cross-sectional view of the cathode P- region and the cathode N+ region obtained in the present invention.

Fig. 11 is a cross-sectional view of the cathode metal obtained in the present invention.

Explanation of reference numerals: 1-N-type substrate, 2-N-type buffer layer, 3-anode metal, 4-cathode metal, 5-field ring P-region, 6-field ring P+ region, 7-active N column , 8-cathode P-region, 9-cathode N+ region, 10-active region, 11-field ring region, 12-active P-region, 13-active P+ region, 14-field oxide layer, 15-field Oxide window and 16-N buffer.

Detailed ways

The present invention will be further described below in conjunction with specific drawings and embodiments.

As shown in Figure 1: In order to obtain a faster reverse recovery time, reduce dynamic loss, improve softness, and reduce high-temperature leakage, the present invention includes a semiconductor substrate, which includes an N-type substrate 1 and the The N-type buffer layer 2 adjacent to the N-type substrate 1 is provided with an active region 10 in the central area of the N-type substrate 1;

On the cross-section of the diode device, the active region 10 includes a number of alternately distributed active P columns and active N columns 7, the active P columns and active N columns 7 are located in the upper part of the N-type substrate 1 Anode metal 3 is set on N-type substrate 1, the active P column is in ohmic contact with anode metal 3 on N-type substrate 1, and active N column 7 is in contact with anode metal 3 on N-type substrate 1 teky contacts;

Several cathode P-regions 8 and cathode N+ regions 9 are arranged alternately on the N-type buffer layer 2, the cathode N+ regions 9 are in ohmic contact with the cathode metal 4, and the cathode P-regions 8 are in Schottky contact with the cathode metal 4.

Specifically, the material of the semiconductor substrate includes silicon. Of course, the semiconductor substrate can also use other commonly used semiconductor materials, which can be selected according to needs, and will not be repeated here. The active region 10 is located in the central area of the N-type substrate 1 , the thickness of the N-type substrate 1 is greater than that of the N-type buffer layer 2 , and the doping concentration of the N-type buffer layer 2 is greater than the strut concentration of the N-type substrate 1 .

In the embodiment of the present invention, the active P columns and active N columns 7 are alternately distributed in the N-type substrate 1, and the length direction of the active P columns and active N columns 7 is consistent with the thickness direction of the N-type substrate 1 , and the corresponding lengths of the active P column and the active N column 7 are smaller than the thickness of the N-type substrate 1 , and the active P column and the active N column 7 have the same length in actual implementation. The anode metal 3 is on the N-type substrate 1, the anode metal 3 is in ohmic contact with the active P column, and the active N column 7 forms a Schottky contact with the anode metal 3, and the anode terminal of the diode device can be formed through the anode metal 3.

The cathode P-region 8 and the cathode N+ region 9 are alternately distributed, the doping concentration of the cathode N+ region 9 is greater than the doping concentration of the N-type buffer layer 2, and the doping concentration of the active N column 7 is the same as that of the N-type substrate 1. Concentrations are the same. In order to form the cathode terminal of the diode device, the cathode metal 4 needs to be provided, the cathode N+ region 9 is in ohmic contact with the cathode metal 4, and the cathode P- region 8 is in Schottky contact with the cathode metal 4.

During specific implementation, the active P column includes an upper active P+ region 13 and a lower active P-region 12, the active P-region 12 is adjacent to the active P+ region 13, and the active P+ region The doping concentration of 13 is greater than that of the active P-region 12, and the active P column is in ohmic contact with the anode metal 3 through the active P+ region 13; the lateral width of the active N column 7 is Wn, and the adjacent active The distance between the N pillars 7 is Wp.

In the embodiment of the present invention, the depth of the active P+ region 13 is much smaller than that of the active P− region 12 , but the doping concentration of the active P− region 12 is much lower than that of the active P+ region 13 . Active P+ region 13 is located on top of active P− region 12 . The active N column 7 is located between two adjacent active P columns, the lateral width of the active N column 7 is Wn, and the distance between adjacent active N columns 7 is Wp (that is, the width of the active P column) .

In the embodiment of the present invention, after the anode metal 3 is in Schottky contact with the active N column 7, and the anode metal 3 is in ohmic contact with the active P column, the carrier injection efficiency can be controlled, thereby shortening the reverse recovery time trr, Improve recovery softness. The anode hole injection efficiency is adjusted by adjusting the lateral width Wn of the active N column 7. The larger the Wn, the lower the anode hole injection efficiency; in the same way, the cathode electron injection efficiency can be adjusted by adjusting the area of the cathode P-region 8, and the cathode electron injection efficiency can be adjusted. The larger the area of the P-region 8 is, the lower the cathode electron injection efficiency is.

Further, a field ring region 11 is provided on the outer periphery of the active region 10 , and the field ring region 11 includes a field ring P column, and the field ring P column is in ohmic contact with the anode metal 3 .

In the embodiment of the present invention, the specific coordination relationship between the field ring region 11 and the active region 10 is consistent with the existing ones, which are well known to those skilled in the art and will not be repeated here. During specific implementation, the field ring P column and the active P column are the same process manufacturing layer, and the field ring P column includes the field ring P+ area 6 located at the upper part and the field ring P- area 5 located at the lower part, and the field ring P- area 5 is adjacent to the field ring P+ region 6 , and the field ring P column is in ohmic contact with the anode metal 3 through the field ring P+ region 6 .

In actual implementation, the recovery performance of the fast recovery diode in the direction is essentially a minority carrier extraction process. In order to obtain a faster recovery speed, the carrier injection can be reduced in the forward conduction, and the total amount of carriers can be reduced by recombination extraction. The time of the corresponding reduction; in addition, in the reverse recovery process, speed up the composite speed, thereby reducing the recovery time.

In the embodiment of the present invention, the reverse recovery time is greatly reduced by reducing the carrier injection efficiency. The Schottky built-in potential formed with the anode metal 3 is far lower than that of the N substrate 1 and the active P-region 12, and most of the electrons are directly transferred from the N-type substrate 1 to the anode metal 3, and there is no electron accumulation, thus The minority carrier concentration of the cathode P-region 8 is greatly reduced, and the hole injection efficiency of the cathode P-region 8 is weakened, and the hole injection efficiency can be controlled by adjusting the lateral width Wp between adjacent active N pillars 7; the cathode is also Controlled by the Schottky between the cathode P-region 8 and the cathode metal 4, the N+ electron injection efficiency can be greatly reduced, so the reverse recovery time trr can be greatly reduced.

Due to the high concentration of carriers injected into the cathode and anode of the traditional PIN structure fast recovery diode, the injection efficiency is high. All forward conduction is that the carrier concentration presents a high-low-high valley distribution from the anode to the cathode. Near the cathode and anode The high carrier concentration leads to large variations in the carrier extraction rate, which can lead to severe voltage overshoots and violent oscillations for inductive loads.

As shown in Figure 2, the active P columns and the active N columns 7 are alternately distributed, and the active P columns are in ohmic contact with the anode metal 3, and the active N columns 7 are in Schottky contact with the anode metal 3; the cathode P-region 8 Alternately distributed with the cathode N+ regions 9, the cathode N+ regions 9 are in ohmic contact with the cathode metal 4, and the cathode P-regions 8 are in Schottky contact with the cathode metal 4, thereby greatly reducing the carrier injection efficiency, and the anode of the diode can be Through the lateral width Wn of the active N column 7, the cathode of the diode can adjust the injection efficiency through the area of the cathode P-region 8, the larger the lateral width Wn of the active N column 7, the smaller the anode hole injection efficiency, and the cathode P- The larger the area of the region 8, the smaller the electron injection efficiency. Therefore, the carriers from the anode to the cathode can be smoothly and linearly distributed, so during the reverse recovery period, the amount of carriers extracted from the N-type substrate changes with time, and the rate of minority carrier extraction changes very little. Therefore, the voltage induced on the inductive load is very small, and the control circuit oscillates, that is, better reverse recovery softness is obtained.

As shown in Figures 3 to 11, the above-mentioned double-sided Schottky-controlled fast recovery diode device can be specifically prepared through the following process steps. Specifically, the preparation method includes the following steps:

Step 1, providing a semiconductor substrate with N conductivity type, the semiconductor substrate includes an N-type substrate 1;

Specifically, the material of the semiconductor substrate may be silicon or other common materials, as shown in FIG. 3 .

Step 2, growing a field oxide layer 14 on the front side of the N-type substrate 1, the field oxide layer 14 covering the front side of the N-type substrate 1;

Specifically, the field oxide layer 14 is a silicon dioxide layer, and the field oxide layer 14 can be grown by thermal oxidation, as shown in FIG. 4 .

Step 3, selectively masking and etching the field oxide layer 14 to obtain a field oxide layer window 15 penetrating through the field oxide layer 14;

Specifically, in order to obtain the field oxide layer window 15, it is generally necessary to coat a photoresist layer on the field oxide layer 14. After photoetching the photoresist layer, the field oxide layer 14 can be etched to obtain the The oxide layer window 15 can expose the corresponding front area of the N-type substrate 1 through the field oxide layer window 15, and the rest of the N-type substrate 1 is covered by the field oxide layer 14, as shown in FIG. 5 . After the field oxide layer window 15 is obtained, the photoresist on the field oxide layer 14 generally needs to be removed.

Step 4, using the above-mentioned field oxide layer window 15 to perform P-type impurity ion implantation on the front side of the N-type substrate 1, and perform high-temperature push-in after the implantation, so as to obtain the substrate P region in the upper part of the N-type substrate 1;

Specifically, when performing P-type impurity ion implantation, P-type impurity ions can only be implanted in the region corresponding to the field oxide layer window 15, and the region covered by the field oxide layer 14 cannot be ion-implanted, and the P-type impurity ion implantation is performed. The process of the process and the process of pushing the well at high temperature are consistent with the existing ones, which can be selected according to the needs, and will not be repeated here.

Step 5, carry out P-type impurity ion implantation again to above-mentioned substrate P district, to obtain P+ district in the upper part of substrate P district, utilize P+ district and be positioned at the substrate P district below P+ district, can obtain required Active P columns and field ring P columns, and in the N-type substrate 1, the N-type substrate 1 between adjacent active P columns forms active N columns 7;

Specifically, the doping concentration of the P region of the substrate obtained in step 4 is generally disclosed. In order to form an ohmic contact, it is necessary to perform implantation of P-type impurity ions again. In the P region of the substrate, the required active P columns and field ring P columns can be obtained, and in the N-type substrate 1, the N-type substrate 1 between adjacent active P columns forms active N columns 7, P+ The doping concentration of the region is much higher than that of the P region of the substrate, and the specific process is consistent with the existing ones, which are well known to those skilled in the art, as shown in FIG. 6 .

Step 6, remove the above-mentioned field oxide layer 14, and set the anode metal 3 on the front of the N-type substrate 1, the anode metal 3 covers the front of the N-type substrate 1, and the anode metal 3 is connected with the active P column, the field The ring P-pillar is in ohmic contact, the anode metal 3 is in Schottky contact with the active N-pillar 7;

Specifically, the removal of the field oxide layer 14 is achieved by adopting commonly used technical means in the technical field, and the specific removal process is well known to those skilled in the technical field, and will not be repeated here. The situation after removing the field oxide layer 14 is shown in FIG. 7 .

In the embodiment of the present invention, the anode metal 3 is prepared by metal sputtering and other methods. After the anode metal 3 is obtained, the anode metal 3 is in ohmic contact with the active P column and the field ring P column, and the anode metal 3 is in ohmic contact with the active N column 7 Schott base contacts, as shown in Figure 8.

Step 7, thinning the back of the above-mentioned N-type substrate 1, and implanting N-type impurity ions on the back of the thinned N-type substrate 1, and obtaining an N-type buffer zone 16 after activation;

In the embodiment of the present invention, the thinning of the back side of the N-type substrate 1 is realized by using the technical means commonly used in the technical field. After the thinning, N-type impurity ions are inserted, so that An N-type buffer zone 16 is obtained, as shown in FIG. 9 . The doping concentration of the N-type buffer area 16 is greater than the doping concentration of the N-type substrate 1. After the implantation of N-type impurity ions, the activation method includes laser activation. Specifically, the implantation of N-type impurity ions and the activation process can be performed. Existing commonly used methods are adopted, which are well known to those skilled in the art, and will not be repeated here.

Step 8, coating the backside photoresist layer on the N-type buffer zone 16, and performing photoetching on the backside photoresist layer, so as to obtain a backside photoresist layer window penetrating the backside photoresist layer;

Specifically, common technical means in this technical field are used to realize the coating of the photoresist layer on the back side and obtain the window of the photoresist layer on the back side.

Step 9. Implanting N-type impurity ions into the N-type buffer zone by using the above-mentioned backside photoresist layer window;

Specifically, the backside photoresist layer can block the implantation of N-type impurity ions into the N-type buffer zone 16 by using the backside photoresist layer outside the window.

Step 10, remove the above photoresist layer on the back side, and implant P-type impurity ions into the N-type buffer zone. After activation, alternately distributed cathode P-regions 8 and cathode N+ regions 9 can be obtained, and through the N-type The buffer zone 16 can form an N-type buffer layer 2;

Specifically, the removal of the photoresist layer on the back is achieved by using commonly used technical means in this technical field, and then the general injection of P-type impurity ions is performed. The implantation dose of P-type impurity ions is much smaller than that of N-type impurity ions in step 9. Dose injection, so that alternately distributed cathode P-regions 8 and cathode N+ regions 9 can be obtained after activation, and an N-type buffer layer 2 can be formed through an N-type buffer layer 16, as shown in FIG. 10 . The activation method includes laser activation, and the specific process conditions and processes of laser activation are well known to those skilled in the art, and will not be repeated here.

Step 11. Set the cathode metal 4 on the cathode P-region 8 and the cathode N+ region 9, the cathode N+ region 9 is in ohmic contact with the cathode metal 4, and the cathode metal 4 is in Schottky contact with the cathode P-region 8.

During specific implementation, the preparation of the cathode metal 4 is realized by using the technical means commonly used in this technical field. The prepared cathode metal 4 is in ohmic contact with the cathode N+ region 9 and is in contact with the cathode P-region 8 Schottky, thereby forming the required cathode terminal of the diode device.

Compared with the existing fast recovery diode device technology, because there is no traditional technology such as heavy metal doping or electron irradiation, and electron irradiation will introduce a large number of defects, resulting in large high-temperature leakage, and the heavy metal doping technology will vibrate with the increase of temperature. As it becomes more intense, the carrier energy becomes larger, and when the energy reaches a certain level, it is easier to break free from the capture of the recombination center introduced by the doped heavy metal, so that the conduction voltage drop becomes smaller at high temperature, and the negative temperature coefficient is obvious. Therefore, compared with the traditional fast recovery diode, the present invention has the advantages of lower high temperature leakage, smaller temperature coefficient and the like.

Claims (5)

1. A double-sided Schottky-controlled fast recovery diode device, comprising a semiconductor substrate, the semiconductor substrate comprising an N-type substrate (1) and an N-type buffer layer adjacent to the N-type substrate (1) ( 2), setting an active region (10) in the central region of the N-type substrate (1); its features are: On the cross-section of the diode device, the active region (10) includes a number of alternately distributed active P columns and active N columns (7), and the active P columns and active N columns (7) are located in the N-type The upper part of the substrate (1); the anode metal (3) is set on the N-type substrate (1), and the active P column is in ohmic contact with the anode metal (3) on the N-type substrate (1), with The source N column (7) is in Schottky contact with the anode metal (3) on the N-type substrate (1); A number of alternately distributed cathode P-regions (8) and cathode N+ regions (9) are arranged on the N-type buffer layer (2), the cathode N+ regions (9) are in ohmic contact with the cathode metal (4), and the cathode P-regions (8) contact with the cathode metal (4) Schottky; A field ring area (11) is provided on the outer circle of the active area (10), and the field ring area (11) includes a field ring P column, and the field ring P column is in ohmic contact with the anode metal (3). 2. The double-sided Schottky-controlled fast recovery diode device according to claim 1, characterized in that: the active P column includes an upper active P+ region (13) and a lower active P- region (12), the active P-region (12) is adjacent to the active P+ region (13), the doping concentration of the active P+ region (13) is greater than the doping concentration of the active P-region (12), And the active P column is in ohmic contact with the anode metal (3) through the active P+ region (13); the lateral width of the active N column (7) is Wn, and the distance between adjacent active N columns (7) is Wp. 3. The double-sided Schottky-controlled fast recovery diode device according to claim 1, characterized in that: the field ring P column and the active P column are manufactured in the same process, and the field ring P column includes an upper The field ring P+ area (6) and the field ring P- area (5) at the lower part, the field ring P- area (5) is adjacent to the field ring P+ area (6), and the field ring P column passes through the field ring P+ area (6 ) in ohmic contact with the anode metal (3). 4. a kind of preparation method of the fast recovery diode device of double-sided Schottky control, it is characterized in that, described preparation method comprises the steps: Step 1. Provide a semiconductor substrate with N conductivity type, the semiconductor substrate includes an N-type substrate (1); Step 2, growing a field oxide layer (14) on the front side of the N-type substrate (1), and the field oxide layer (14) covers the front side of the N-type substrate (1); Step 3, selectively masking and etching the field oxide layer (14) to obtain a field oxide layer window (15) penetrating through the field oxide layer (14); Step 4. Perform P-type impurity ion implantation on the front side of the N-type substrate (1) by using the above-mentioned field oxide layer window (15), and perform high-temperature well pushing after the implantation, so that the upper part of the N-type substrate (1) Obtain the substrate P region; Step 5, carry out P-type impurity ion implantation again to above-mentioned substrate P district, to obtain P+ district in the upper part of substrate P district, utilize P+ district and be positioned at the substrate P district below P+ district, can obtain required Active P columns and field ring P columns, and in the N-type substrate (1), the N-type substrates (1) between adjacent active P columns form active N columns (7); Step 6, removing the aforementioned field oxide layer (14), and setting an anode metal (3) on the front side of the N-type substrate (1), the anode metal (3) covering the front side of the N-type substrate (1), and The anode metal (3) is in ohmic contact with the active P column and the field ring P column, and the anode metal (3) is in Schottky contact with the active N column (7); Step 7. Thinning the back of the above-mentioned N-type substrate (1), and implanting N-type impurity ions on the back of the thinned N-type substrate (1), and obtaining an N-type buffer zone ( 16); Step 8, coating the back photoresist layer on the N-type buffer zone, and performing photoetching on the back photoresist layer to obtain a back photoresist layer window penetrating the back photoresist layer; Step 9. Implanting N-type impurity ions into the N-type buffer zone by using the above-mentioned backside photoresist layer window; Step 10, removing the above photoresist layer on the back side, and implanting P-type impurity ions into the N-type buffer zone, and after activation, alternately distributed cathode P- regions (8) and cathode N+ regions (9) can be obtained, And the N-type buffer layer (2) can be formed through the N-type buffer zone (16); Step 11, setting cathode metal (4) on the cathode P- area (8) and cathode N+ area (9), the cathode N+ area (9) is in ohmic contact with the cathode metal (4), and the cathode metal (4) is in ohmic contact with the cathode metal (4) Cathode P-region (8) Schottky contact. 5. The method for preparing a double-sided Schottky-controlled fast recovery diode device according to claim 4, wherein the material of the semiconductor substrate comprises silicon.

Images