CN110504000B

CN110504000B - Method for identifying probe card information of wafer-level test tester

Info

Publication number: CN110504000B
Application number: CN201910788131.3A
Authority: CN
Inventors: 唐鹿俊; 郑鹏飞
Original assignee: Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Current assignee: Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Priority date: 2019-08-26
Filing date: 2019-08-26
Publication date: 2021-04-13
Anticipated expiration: 2039-08-26
Also published as: CN110504000A

Abstract

The invention discloses a method for identifying probe card information by a wafer-level test tester, which comprises the following steps of 1, designing and manufacturing a probe card, and arranging a storage chip for storing probe card information in the probe card; step 2, inputting correct probe card information into the memory chip by using a writing algorithm and completing verification; and 3, identifying probe card information in the storage chip by using a reading algorithm to judge whether the probe card information is a matched probe card. The invention can reduce the loss caused by changing the wrong probe card to the maximum extent, and the tester can automatically acquire the correct information in the memory chip of the probe card.

Description

Method for identifying probe card information of wafer-level test tester

Technical Field

The invention relates to the field of semiconductor integrated circuits, in particular to a method for identifying probe card information by a tester for wafer level testing.

Background

In the field of integrated circuit chip testing, a method for establishing wafer-level chip testing capability on a testing machine is to customize a probe card for a chip, the probe card of the testing machine is connected with a loading plate of the testing machine through a metal contact, and the bottom surface of the probe card is connected with chip pins through probes, so that the probe card becomes a bridge beam connected between a signal channel of the testing machine and the chip pins to be tested, and is further applied to preliminary measurement of the electrical performance of the chip before chip packaging, and after a bad chip is screened out, the subsequent packaging engineering is carried out. Therefore, when testing different chips, the corresponding probe card must be replaced for testing, and it is important to identify the correctness of the replaced probe card.

In wafer level chip testing, in order to ensure that the probe card used is completely matched with the tested item, a simple and reliable method for identifying the probe card information is required.

However, in the wafer level chip test, the probe card is identified by scanning a bar code attached to a probe card cassette, acquiring the entered bar code information from a probe card management system, and inputting the probe card information into a test machine. When an operator replaces the wrong probe card due to misoperation, the subsequent chip test is influenced and even the probe card is damaged, and the project schedule is slowed down.

Disclosure of Invention

The invention aims to provide a method for identifying probe card information by a test machine for wafer level test, which can reduce the loss caused by replacing a wrong probe card to the maximum extent, and the test machine can automatically acquire correct information in a memory chip of the probe card.

In order to solve the technical problem, the method for identifying the probe card information by the wafer-level test machine is realized by adopting the following technical scheme:

step 1, designing and manufacturing a probe card, and arranging a storage chip for storing probe card information in the probe card;

step 2, inputting correct probe card information into the memory chip by using a writing algorithm and completing verification;

and 3, identifying probe card information in the storage chip by using a reading algorithm to judge whether the probe card information is a matched probe card.

By adopting the method, a memory chip is designed and added on the probe card for storing the information of the probe card in the production and manufacturing stage of the probe card, and the information of the probe card is automatically acquired and identified by the tester through the cooperation with a test algorithm, so that the risk caused by the replacement of the wrong probe card by an operator is greatly reduced, and the risks of damage to the probe card, machine time waste, project schedule delay and the like caused by the replacement of the wrong probe card are reduced to the maximum extent.

The method can save the operation time of operators, and the probe card information does not need to be manually re-entered among product test items.

Drawings

The invention will be described in further detail with reference to the following detailed description and accompanying drawings:

FIG. 1 is a schematic diagram of a memory chip design;

fig. 2 is a schematic diagram of a test flow.

Detailed Description

The method for identifying the information of the probe card by the tester for the wafer level test considers that the test is influenced or even the probe card is damaged and the project schedule is slowed down after the wrong probe card is placed by mistake of an operator in the wafer level test, so that a memory chip is additionally arranged in the probe card in the design stage of the probe card and is used for storing the information of the probe card.

The method for identifying the probe card information by the wafer-level test machine comprises the following specific implementation processes in the following embodiments:

step 1, designing and manufacturing a probe card, and arranging a storage chip for storing probe card information in the probe card.

And 2, developing a probe card information reading and writing algorithm (namely a test algorithm) matched with the probe card.

And 3, inputting correct probe card information into the memory chip by using a writing algorithm and verifying the information.

And 4, identifying probe card information in the storage chip by using a reading algorithm, and judging whether the probe card information is a matched probe card.

Fig. 1 is a schematic diagram of a design principle of the memory chip, in which a pin of a memory chip a0 (device address signal) and a pin of VCC (power input) are pulled high, a pin of a1 and a2 (device address signal), a pin of WP (write protection) and a pin of VSS (power ground) are pulled low, a pin of a memory chip SCL (chip clock signal) is connected to a signal channel of a test machine load board CSCL (test machine clock channel), a pin of a memory chip SDA (chip data transmission signal) is connected to a signal channel of a test machine load board CSDA (test machine data transmission channel), and the memory chip can be read and written by a test machine. The black dots of fig. 1 are identification points of the chip direction.

When writing, the tester is firstly responsible for converting input probe card information character data into binary data through an ASCII (American standard code for information interchange) code, and then the tester sends the chip address and the probe card information binary data to the storage chip, and finally the storage chip stores the probe card information at a destination address. When reading, the tester sends chip address data to the memory chip, the memory chip reads binary data at the destination address and returns to the tester, and the tester converts the binary data into character data through ASCII (American Standard code for information interchange) codes. And finally, comparing the read character data with the written probe card information to judge whether the probe card is a matched probe card.

When the probe card is used, correct probe card information needs to be stored into the memory chip through a writing algorithm at a card checking stage, an operator only needs to automatically read and identify the probe card information in the memory chip through a specified reading algorithm to judge whether the probe card is a matched probe card or not in the later use, and the subsequent test is carried out when the probe card is judged to be correct. As shown in fig. 2, if the probe card passes the test procedure, the test procedure is performed normally, and if the probe card fails, the probe card is a wrong probe card, and the probe card needs to be replaced to perform the identification again. Therefore, the design method for identifying the probe card information by the tester for wafer level test can achieve the purpose that the tester can automatically acquire the information of the identification probe card only by adding a memory chip on the probe card and matching with a test algorithm (namely, a writing algorithm and a reading algorithm).

The present invention has been described in detail with reference to the specific embodiments, but these are not to be construed as limiting the invention. Many variations and modifications may be made by one of ordinary skill in the art without departing from the principles of the present invention, which should also be considered as within the scope of the present invention.

Claims

1. A method for identifying probe card information by a tester for wafer level testing is characterized by comprising the following steps:

when writing, the test machine firstly converts input probe card information character data into binary data through ASCII codes, then the test machine sends chip address and probe card information binary data to the storage chip, and finally the storage chip stores probe card information at a destination address;

and 3, identifying probe card information in the storage chip by using a reading algorithm, and judging whether the probe card information is a matched probe card.

2. The method of claim 1, wherein: if the probe card is identified to pass, normal test is carried out, and if the probe card is identified not to pass, the probe card is a wrong probe card, and the probe card needs to be replaced for re-identification.

3. The method of claim 1, wherein: the pins A0 and VCC of the memory chip are connected with a power supply, the pins A1, A2, WP and VSS are grounded, the pin SCL is connected with a CSCL signal channel of a load board of a tester, the pin SDA is connected with a CSDA signal channel of the load board of the tester, and the memory chip is read and written by the tester.

4. A method according to claim 1 or 3, characterized by: when the probe card is read, the tester sends chip address data to the storage chip, the storage chip returns to the tester after reading binary data at a destination address, the tester converts the binary data into character data through ASCII codes, and finally, whether the probe card is a matched probe card is judged by comparing the read character data with written probe card information.

5. The method of claim 1, wherein: when the probe card is used, correct probe card information needs to be stored into the memory chip through a writing algorithm at a card checking stage, whether the probe card is a matched probe card is judged only by automatically reading and identifying the probe card information in the memory chip through a specified reading algorithm in the later use, and the subsequent test is carried out when the probe card is judged to be correct.