CN112798998B - Wafer test probe card state exception handling method - Google Patents
Wafer test probe card state exception handling method Download PDFInfo
- Publication number
- CN112798998B CN112798998B CN202011638400.7A CN202011638400A CN112798998B CN 112798998 B CN112798998 B CN 112798998B CN 202011638400 A CN202011638400 A CN 202011638400A CN 112798998 B CN112798998 B CN 112798998B
- Authority
- CN
- China
- Prior art keywords
- probe card
- test
- information
- card state
- file
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 104
- 239000000523 sample Substances 0.000 title claims abstract description 93
- 238000000034 method Methods 0.000 title claims abstract description 47
- 230000002159 abnormal effect Effects 0.000 claims description 11
- 238000012545 processing Methods 0.000 claims description 9
- 230000005856 abnormality Effects 0.000 abstract description 4
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000011282 treatment Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 4
- 230000006870 function Effects 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000013507 mapping Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The invention provides a wafer test probe card state exception handling method, which comprises the steps of selecting a test plan and a wafer to be tested, reading probe card information, and copying and placing a probe card state file into a local catalog; updating the current machine probe card state information into a probe card state file on a server; judging whether the updating of the probe card state file on the server is successful or not, and if so, directly continuing; if not, the test system gives an alarm, judges whether to continue to execute the test flow, and if so, updates the current machine probe card state information to a local file; and after the test is finished, updating the local probe card state file to the server. The method can carry out special treatment on the abnormality with some detail errors, does not need to stop the test midway, feeds back the abnormality information to the user in real time, shortens the test time and is beneficial to improving the test efficiency.
Description
Technical Field
The invention belongs to the technical field of semiconductor device testing, and particularly relates to a method for processing abnormal states of a probe card in wafer testing.
Background
WAT (WAFER ACCEPTANCE TEST Wafer acceptance Test) is an electrical Test performed on Wafer Scribe Line (Test Key) by matching a tester with a probe station after all the process steps of a semiconductor silicon Wafer are completed, and whether the process steps are normal and stable is monitored through electrical parameters. Through analysis of WAT data, problems in the semiconductor manufacturing process can be found, and the semiconductor manufacturing process is guided to be adjusted, so that higher yield is achieved.
With the rapid development of integrated circuits, the number of tests in the WAT test process is increased, the required test time is long, and some anomalies and errors, such as software blocking caused by software content leakage, file read-write errors, errors in the interaction process of tester software and hardware modules, and the like, are unavoidable in the test process, and influence the smooth progress of the whole test flow. The test machine must restart the test flow for some fatal errors, but the whole test flow operation and test results are not affected in practice for some detailed errors or some minor exceptions which are not urgent, for example, writing of certain files fails due to authority problems, but file writing failure does not affect the whole test flow operation. If the whole test is re-performed due to some detail errors or some small anomalies, a great deal of labor cost and time cost are consumed, and the test efficiency is greatly reduced. In addition, for some abnormal situations, for example, when the test result is incorrect due to some abnormal reasons, whether the test result is correct or not can be known after the wafer test of the current batch is completed, and then the test is invalid, so that labor cost and time cost are wasted, and a method for processing some special abnormal details is needed, so that the test efficiency of the wafer is improved, and the problem of quick positioning can be realized.
Disclosure of Invention
The present invention has been made in view of some and/or all of the above-mentioned problems of the prior art, and an object of the present invention is to provide a method for processing status anomalies of a wafer test probe card, which is capable of performing special processing on anomalies with some detail errors, without stopping the test in the middle, and feeding the anomaly information back to a user in real time.
The application provides a wafer test probe card state exception handling method, which comprises the following steps that S1, a test plan and a wafer to be tested are selected, probe card information is read, a probe card state file is copied, and the copied probe card state file is put into a local catalog; s2, updating the current machine probe card state information into a probe card state file on the server; s3, judging whether the updating of the probe card state file on the server is successful, and if so, directly continuing to step S4; if not, the test system gives an alarm, judges whether to continue the test flow or not, and if not, terminates the test; if the execution is continued, continuing to step S4; step S4 is: and updating the current machine probe card state information to a local file, and continuing to execute the test flow until the test is finished. Normally, the method further includes step S5 after the end: and after the test is finished, updating the local probe card state file to the server. The wafer of the present application may be a complete or partially complete wafer of various substrates carrying chips or devices. The probe card is generally internally provided with an RFID chip, and reading the probe card information at this time means reading information stored in the probe card RFID. The application is illustrated by way of example of reading probe card RFID information and is not intended to be limiting of application to RFID scenarios only.
In the process of reading the RFID information of the probe card, if the reading of the RFID information fails, whether the reading is retried is selected, if not, the testing is stopped, an alarm is sent out, if yes, the position of the probe card is calibrated, and the reading of the RFID information is carried out again. The threshold value can be set for the retry number, and the probe card is reminded to be replaced after the retry exceeds the specified threshold value. To consider efficiency, the general threshold is set to 3 times.
In a specific embodiment, in the step S1, the RFID information of the probe card is read, and part or all of the information of the probe card to be tested is obtained, and comparison with the pre-stored ID information of the probe card may also be performed. The exception handling method in reading the probe card RFID information comprises the following steps: reading RFID information and comparing the probe card ID information; judging whether the probe card ID information comparison is successful or not, and if so, directly continuing the step S2; if the comparison fails, before continuing the step S2, selecting whether to re-perform the information comparison, if not, terminating the test flow and giving an alarm, if so, replacing the correct probe card, re-reading the RFID information and performing the probe card ID information comparison until the comparison is successful. In another specific implementation case, in the step S3, when the update of the probe card status file fails, the test system pops up an inquiry window while sending out an alarm, and the operator decides whether the current error needs to terminate the test.
The invention has the following beneficial effects: according to the wafer test probe card state exception handling method, whether the update of the probe card state file on the server is successful or not is judged, different treatments can be carried out through the identification of the judging result, the condition that the test process is not normally terminated due to Foup (front opening wafer transfer box) which is not normally withdrawn due to the fact that the file cannot be written when the test is finished is avoided, meanwhile, the test process is prevented from going through again due to some detail errors, the test time is greatly saved, and the test efficiency is improved.
Drawings
Fig. 1 is a process diagram of a method for handling abnormal states of a wafer test probe card according to an embodiment of the invention.
Fig. 2 is a schematic diagram of an exception handling procedure in reading probe card RFID information in the second embodiment of the present invention.
Detailed Description
The foregoing and/or additional aspects and advantages of the present invention will be apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings. In the figures, parts of the same structure or function are denoted by the same reference numerals, and not all illustrated parts are denoted by the associated reference numerals throughout the figures, if necessary, for the sake of clarity.
The operations of the embodiments are depicted in the following embodiments in a particular order to provide a better understanding of the details of the embodiments and to provide a thorough understanding of the present invention, however, the description of these orders does not necessarily correspond one-to-one to the wafer test probe card state exception handling method of the present invention, and is not intended to limit the scope of the present invention.
It should be noted that the flowcharts and block diagrams in the figures illustrate the operational processes that may be implemented by the methods according to the embodiments of the present invention. It should also be noted that in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the intervening blocks, depending upon the objectives sought to be achieved by the steps involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and manual operations.
Example 1
As shown in fig. 1, in a first embodiment of the present invention, a method for processing abnormal states of a wafer test probe card specifically includes the following steps: s1, selecting a test plan and a wafer to be tested, reading the RFID information of the probe card, copying the status file of the probe card, and placing the copied status file of the probe card into a local directory. And S2, updating the current machine probe card state information into a probe card state file on the server. S3, judging whether the updating of the probe card state file on the server is successful, and if so, directly continuing to step S4; if not, the test system gives an alarm, judges whether to continue the test flow or not, and if not, terminates the test; if the execution is continued, continuing to step S4; step S4 is: updating the current machine probe card state information to a local file, and continuing to execute the test flow until the test is finished; and S5, after the test is finished, updating the local probe card state file to the server (after the abnormality is relieved). In this embodiment, the exception includes some errors, such as: fatal errors: means that software memory leakage causes software blocking, software crash and the like; IO error: refers to file read-write, input and output errors; general errors: refers to a general error encountered by software in the use or running process; hardware-related errors: refers to errors encountered in the interaction process of the software and the hardware modules of the tester; EAP-related error: refers to errors encountered by GEM communications between tester software and EAP; GPIB-related errors: refers to the error encountered by the tester as a GPIB communication between the controller and Prober.
In this embodiment, when the test system issues an alarm when the update of the probe card status file on the server is unsuccessful, it is better to respond according to the common working mode of the tester. For example, when the tester is in an off-line mode, an operator operates the tester software to manually complete the setup process before the test is started, or to perform the setup of the software after the test plan is selected. In the process, an alarm is sent out, and meanwhile, a pop-up inquiry window informs an operator of current warning information, and the operator determines whether the current error needs to terminate the test or not. It can be understood that if there is no update judgment and corresponding processing of the status file of the probe card, before the test is started, the tester software updates the status file of the probe card in the test process and at the end of the test, the status file is placed on another server, data sharing is performed by the network mapping disk and the tester, when the network is interrupted or the server is abnormally shut down, the status file of the probe card cannot be written into the network mapping disk, the tester software can give alarm information and stop the test, so that Foup cannot exit normally due to the fact that the file cannot be written when the test is ended, and the test process is terminated.
According to the wafer test probe card state exception handling method, the problem that writing in the probe card state file abnormally affects normal test is avoided, an inquiry window is popped up while an alarm is sent, an operator determines whether the current error needs to terminate the test or not, if not, the test can be continuously executed, the probe card state file is still in local backup, and after the test is finished, the server is relieved abnormally, the local probe card state file of the machine is updated to the server. No substantial effect is caused on the whole test process. Of course, this is a preferred example of the present invention, and the present invention is not limited thereto, for example, in other cases, the test machine software is controlled by the EAP sending command, and all alarm information is sent to the EAP in the form of a command during the whole test.
Example two
The second embodiment of the present invention is basically the same as the first embodiment, and if an abnormality occurs in the process of reading the RFID information of the probe card in the step S1, the method further includes: if the reading of the RFID information fails, whether retrying is selected, if not, the test is stopped and an alarm is sent out, if yes, the position of the probe card is calibrated, and the reading of the RFID information is carried out again; and comparing the ID information of the probe card after the RFID information is successfully read, and if the comparison is successful, continuing to execute the test flow until the test is finished. If the probe card ID information comparison fails, whether to retry the information comparison is selected, if not, the test is stopped and an alarm is given, if yes, the correct probe card is replaced, the RFID information is read again, and the probe card ID information comparison is carried out.
The above embodiments are preferred examples of the present invention, and are not intended to limit the scope of the present invention. It should also be understood that the details of these implementations are not to be taken as limiting the invention.
The technical solutions between the embodiments may be combined with each other, but it is necessary to base the implementation on the basis of those skilled in the art that when the combination of technical solutions contradicts or cannot be implemented, it should be considered that the combination of technical solutions does not exist and is not within the scope of protection claimed by the present invention.
Claims (9)
1. The wafer test probe card state exception handling method is characterized by comprising the following steps:
S1, selecting a test plan and a wafer to be tested, reading probe card information, copying a probe card state file, and placing the copied probe card state file into a local directory;
s2, updating the current machine probe card state information into a probe card state file on the server;
S3, judging whether the updating of the probe card state file on the server is successful, and if so, directly continuing to step S4; if not, the test system gives an alarm, judges whether to continue the test flow or not, and if not, terminates the test; if the execution is continued, continuing to step S4;
Step S4 is: updating the current machine probe card state information to a local file, and continuing to execute the test flow until the test is finished;
And S5, after the test is finished, updating the local probe card state file to the server after the server is abnormally relieved.
2. The method according to claim 1, wherein if the read information fails, it is selected whether to retry, if not, the test is terminated and an alarm is given, if yes, the probe card position is calibrated, and the information read is resumed.
3. The method for handling abnormal states of a wafer test probe card according to claim 2, wherein the number of retries is provided with a threshold value, and the probe card is reminded to be replaced after the number of retries exceeds the threshold value.
4. A method of handling status anomalies in a wafer test probe card according to claim 3, wherein the threshold is 3.
5. The method for processing abnormal states of a wafer test probe card according to claim 1, wherein after reading the probe card information in step S1, the method further comprises the steps of: the read probe card information will be compared with pre-stored probe card ID information.
6. The method for processing abnormal states of a wafer test probe card according to claim 5, wherein the method for reading the probe card and comparing the abnormal states comprises: reading information and comparing the probe card ID information; judging whether the probe card ID information comparison is successful or not, and if so, directly continuing the subsequent test; if the comparison fails, whether the information comparison is carried out again is selected, if not, the test flow is terminated and an alarm is given, if so, the correct probe card is replaced, the information is read again, and the probe card ID information comparison is carried out until the comparison is successful.
7. The method according to claim 1, wherein in the step S3, when the update of the probe card status file fails, the test system pops up an inquiry window while sending out an alarm, and the operator determines whether the current error requires termination of the test.
8. The method of claim 1, further comprising performing a software setup after selecting the test plan.
9. The method for processing abnormal states of a wafer test probe card according to claim 1, wherein the probe card information is probe card RFID information.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011638400.7A CN112798998B (en) | 2020-12-31 | 2020-12-31 | Wafer test probe card state exception handling method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011638400.7A CN112798998B (en) | 2020-12-31 | 2020-12-31 | Wafer test probe card state exception handling method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112798998A CN112798998A (en) | 2021-05-14 |
| CN112798998B true CN112798998B (en) | 2024-08-16 |
Family
ID=75808941
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011638400.7A Active CN112798998B (en) | 2020-12-31 | 2020-12-31 | Wafer test probe card state exception handling method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112798998B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN118707159A (en) * | 2024-08-30 | 2024-09-27 | 杭州积海半导体有限公司 | WAT testing system, method and readable storage medium |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103645858A (en) * | 2013-11-08 | 2014-03-19 | 上海华力微电子有限公司 | Method and device for saving WAT test curve data |
| CN106776911A (en) * | 2016-11-30 | 2017-05-31 | 上海华力微电子有限公司 | Lot abnormality processings optimization method and system that the alarm of WAT boards causes |
| CN108139449A (en) * | 2016-01-11 | 2018-06-08 | 特因泰什工业公司 | For the improved quality control testing systems and application method of portable charging apparatus |
| CN110504000A (en) * | 2019-08-26 | 2019-11-26 | 上海华力集成电路制造有限公司 | The method that wafer-level test identifies probe card information with test machine |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01145577A (en) * | 1987-12-01 | 1989-06-07 | Tokyo Electron Ltd | Manufacture of probe card |
| CN102053217A (en) * | 2009-11-05 | 2011-05-11 | 上海华虹Nec电子有限公司 | Method for quickly processing wafer after sort interruption under working condition |
| CN103942127B (en) * | 2014-02-21 | 2016-08-24 | 上海华力微电子有限公司 | The backup architecture of a kind of WAT test and backup method |
| US9214091B2 (en) * | 2014-02-28 | 2015-12-15 | Pearson Education, Inc. | Digital content and assessment delivery |
| KR102202074B1 (en) * | 2014-06-30 | 2021-01-13 | 세메스 주식회사 | System and method for testing a wafer using probe card |
| CN104237823B (en) * | 2014-07-31 | 2017-04-12 | 上海华力微电子有限公司 | Method for effectively verifying probe card abnormality |
| CN104749544B (en) * | 2015-04-02 | 2017-11-21 | 北京航空航天大学 | A kind of Electro Magnetic Compatibility current probe transfer impedance temperature error modification method |
| CN105866652B (en) * | 2016-03-24 | 2019-01-18 | 上海华力微电子有限公司 | Automatic wafer calibration method |
| US10083110B2 (en) * | 2016-08-16 | 2018-09-25 | American Express Travel Related Services Company, Inc. | Systems and methods for software testing and test management |
| CN106452975B (en) * | 2016-11-18 | 2019-10-11 | 上海斐讯数据通信技术有限公司 | A kind of method and system of test router |
| CN108334370B (en) * | 2017-05-26 | 2021-02-09 | 中国电子科技集团公司第四十一研究所 | Software automatic incremental updating and upgrading method of distributed test system |
| CN111163134A (en) * | 2019-12-11 | 2020-05-15 | 浙江极智通信科技股份有限公司 | Equipment testing method and system |
| CN111273170A (en) * | 2020-02-10 | 2020-06-12 | 东莞美泰电子有限公司 | Keyboard character key module testing device and method |
-
2020
- 2020-12-31 CN CN202011638400.7A patent/CN112798998B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103645858A (en) * | 2013-11-08 | 2014-03-19 | 上海华力微电子有限公司 | Method and device for saving WAT test curve data |
| CN108139449A (en) * | 2016-01-11 | 2018-06-08 | 特因泰什工业公司 | For the improved quality control testing systems and application method of portable charging apparatus |
| CN106776911A (en) * | 2016-11-30 | 2017-05-31 | 上海华力微电子有限公司 | Lot abnormality processings optimization method and system that the alarm of WAT boards causes |
| CN110504000A (en) * | 2019-08-26 | 2019-11-26 | 上海华力集成电路制造有限公司 | The method that wafer-level test identifies probe card information with test machine |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112798998A (en) | 2021-05-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6367041B1 (en) | Self-adaptive test program | |
| US20030109945A1 (en) | Apparatus and method for automatically controlling semiconductor manufacturing process in semiconductor factory automation system | |
| US10955468B2 (en) | Wafer probe resumption of die testing | |
| CN112798998B (en) | Wafer test probe card state exception handling method | |
| CN109545264B (en) | Wafer level testing method and device for FLASH chip with FLASH memory | |
| US6963213B1 (en) | Auto-recovery wafer testing apparatus and wafer testing method | |
| US6792386B2 (en) | Method and system for statistical comparison of a plurality of testers | |
| US20070276623A1 (en) | Semiconductor Component Test Process and a System for Testing Semiconductor Components | |
| CN113012410B (en) | Wafer test early warning method | |
| CN111078476B (en) | Network card drive firmware stability test method, system, terminal and storage medium | |
| CN117896302A (en) | Timely response method based on equipment operation state monitoring | |
| CN106919463A (en) | A kind of spacecraft BC ends 1553B bus chip RAM method for reconfiguration | |
| US7230442B2 (en) | Semi-conductor component testing process and system for testing semi-conductor components | |
| CN116594996A (en) | Data tracing method and device for semiconductor test and electronic equipment | |
| US6766285B1 (en) | Predictive processing method in a semiconductor processing facility | |
| CN112650538A (en) | Starting method and device of network equipment | |
| CN109541426B (en) | A method for automatically reading parameters by a tester in wafer testing | |
| JP2001005693A (en) | System and method for automatically restoring fault and recording medium recording automatic fault restoration program | |
| KR20170088604A (en) | Wafer test apparatus and test method of the same | |
| CN111985010A (en) | Interception verification method and device for notebook hard disk, computer equipment and storage medium | |
| US6883113B2 (en) | System and method for temporally isolating environmentally sensitive integrated circuit faults | |
| US20070152732A1 (en) | Method and apparatus to detect electrical overstress of a device | |
| TWI769896B (en) | Destructive program function verification method and system thereof | |
| CN115113613A (en) | Equipment control system test method, device, electronic equipment and storage medium | |
| CN117170950A (en) | SSD link protection method and device in high-low temperature incubator test |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20230915 Address after: Room 1106, Floor 1, Building A, Paradise Software Park, No. 3, Xidoumen Road, Xihu District, Hangzhou City, Zhejiang Province, 310012 Applicant after: Hangzhou Guangli Test Equipment Co.,Ltd. Address before: 310012 building F1, 15 / F, building a, Paradise Software Park, 3 xidoumen Road, Xihu District, Hangzhou City, Zhejiang Province Applicant before: Hangzhou Guangli Microelectronics Co.,Ltd. |
|
| TA01 | Transfer of patent application right | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |