CN109959817A - A kind of undervoltage detection circuit can be applied to low voltage environment - Google Patents
A kind of undervoltage detection circuit can be applied to low voltage environment Download PDFInfo
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- CN109959817A CN109959817A CN201910354502.7A CN201910354502A CN109959817A CN 109959817 A CN109959817 A CN 109959817A CN 201910354502 A CN201910354502 A CN 201910354502A CN 109959817 A CN109959817 A CN 109959817A
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- 239000013256 coordination polymer Substances 0.000 claims abstract description 14
- 239000003990 capacitor Substances 0.000 claims abstract description 11
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- 238000010586 diagram Methods 0.000 description 2
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- 238000007599 discharging Methods 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R19/16504—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the components employed
- G01R19/16519—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the components employed using FET's
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Abstract
The present invention provides a kind of undervoltage detection circuits that can be applied to low voltage environment, including PMOS tube PM1；NMOS tube NM1 and NM2；Phase inverter I1 and I2；Capacitor CP and supply voltage VDD, capacitor CP mono- terminate supply voltage VDD, and the other end accesses the source of NM2, and wherein NM2 is Low threshold NMOS tube.The present invention can apply in low voltage environment and in normal operation without quiescent dissipation.
Description
Technical field
The invention belongs to IC design fields, and in particular to a kind of under-voltage detection electricity that can be applied to low voltage environment
Road.
Background technique
As shown in Figure 1, using three series resistances, branch pressure voltage is generated in common lower electric undervoltage detection circuit structure,
Comparator positive input connects a dividing point, and negative input connects reference data voltage, and the output of comparator is by anti-
Phase device shaping, generate brown-out detection signal, and be low level when it is effective.Meanwhile the grid of signal end connection NMOS tube, NMOS tube
Drain and divider resistance second dividing point connect.The source of NMOS tube and one end of third resistance are grounded jointly.When
After detection signal becomes low level, NMOS tube is disconnected, and is increased by first dividing point, and hesitation is generated.
The resistance and comparator of common lower power detection circuit structure, DC power is consumed in normal work, improves electricity
Resistance can reduce the quiescent dissipation of electric resistance partial pressure part, but also inevitably increase resistor area, in low-power consumption application not
It is too suitable.Also, under the relatively low application of supply voltage, the working condition of reference data voltage and comparator it is difficult to ensure that,
This is applicable in this structure less under low voltage application.
Summary of the invention
In order to solve the problems in the existing technology, the invention proposes a kind of can apply in low voltage environment zero
Power consumption undervoltage detection circuit.Technical scheme is as follows:
A kind of undervoltage detection circuit can be applied to low voltage environment, comprising:
PM1 connects supply voltage VDD, output voltage VP；
NM2, input voltage VP；
NM1, NM2, output voltage VQ；
CP, a termination supply voltage VDD, the other end are connected with NM1, NM2 respectively；
Second level phase inverter, is connected in series by I1 and I2, and input voltage VP signal exports under-voltage control signal；
The PM1 respectively with NM2, second level inverter series；
Described NM1, NM2 and second level phase inverter are sequentially connected in series；
The NM2 uses Low threshold NMOS device.
Specifically, the grid (G) of the PM1 is grounded, source electrode (S) is connect with supply voltage VDD, the drain electrode (D) of the PM1
It drains and connects with NM2, and connect with the input terminal of phase inverter I1；The source electrode (S) of the NM1 is grounded, grid (G) and drain electrode
(D) it connects, and is connect jointly with the source electrode of NM2 (S)；The grid (G) of the NM2 is grounded, and one end of source electrode (S) and capacitor CP connect
It connects, the other end of the capacitor CP is connect with supply voltage VDD；The phase inverter I1 output end and phase inverter I2 input terminal connect
It connects, the phase inverter I2 output end exports under-voltage control signal s_uvb.
Further, the typical threshold voltage of the NM2 is 300~500mV.
Based on the above-mentioned technical proposal, the technical effect achieved by the present invention are as follows:
1. the present invention is suitable for the under-voltage detection application of low voltage environment, the voltage overturning point of supply voltage VDD is depended on
The size selection of PM1 and NM2 can be determined that the approximate near threshold voltage in PMOS of overturning point, suitable low pressure is answered by emulation
With.
2. the undervoltage detection circuit that can be applied to low voltage environment of the invention, when working properly, supply voltage VDD is
The gate source voltage of high level, NM1 is only more slightly higher than ground potential, and the gate source voltage of NM2 is negative voltage at this time, more helps to end, lead to
Road is without quiescent dissipation.
Detailed description of the invention
Fig. 1 is existing common lower electric undervoltage detection circuit structural schematic diagram；
Fig. 2 is the structural schematic diagram of the undervoltage detection circuit that can be applied to low voltage environment of the invention.
Specific embodiment
The contents of the present invention are further described with reference to the accompanying drawings of the specification, it is clear that described embodiment is only
It is only a part of the embodiment of the present invention, instead of all the embodiments.
As shown in Fig. 2, present embodiments providing a kind of undervoltage detection circuit that can be applied to low voltage environment, including PMOS
Pipe PM1；NMOS tube NM1 and NM2；Phase inverter I1 and I2；Capacitor CP and supply voltage VDD.
PM1 connects supply voltage VDD, output voltage VP；
NM2, input voltage VP；
NM1, NM2, output voltage VQ；
CP, a termination supply voltage VDD, the other end are connected with NM1, NM2 respectively；
Second level phase inverter, is connected in series by I1 and I2, and input voltage VP signal exports under-voltage control signal；
PM1 respectively with NM2, second level inverter series；
NM1, NM2 and second level phase inverter are sequentially connected in series；
NM2 uses Low threshold NMOS device.
Specifically, the grid (G) of PM1 is grounded, source electrode (S) is connect with supply voltage VDD, and the drain electrode (D) of PM1 and NM2 leak
Pole connection, and connect with the input terminal of phase inverter I1.The source electrode (S) of NM1 is grounded, and grid (G) is connect with drain electrode (D), and altogether
It is connect with the source electrode (S) with NM2.The grid (G) of NM2 is grounded, and source electrode (S) is connect with one end of capacitor CP, and capacitor CP's is another
End is connect with supply voltage VDD.Phase inverter I1 output end is connect with phase inverter I2 input terminal, the phase inverter I2 output end output
Under-voltage control signal s_uvb.
Preferably, the typical threshold voltage of NM2 is 300~500mV.
Based on above-mentioned structure, the present invention is suitable for the under-voltage detection application of low voltage environment, when supply voltage VDD is height
When level, PM1 conducting, VP current potential is equal with power supply potential, grid (G) ground connection of NM2, the grid source electricity that source level (S) voltage is NM1
Pressure, due to there is no DC current to flow through, the gate source voltage of the NM1 only (Asia depending on leakage current and NM1 more slightly higher than ground potential
Threshold operative state), the gate source voltage of NM2 is negative voltage at this time, more helps to end, to guarantee access without quiescent dissipation.
The both ends capacitor CP are approximately pressure difference of the supply voltage VDD to ground.NM1 and NM2 uses typical threshold voltage in the Low threshold of 400mV
NMOS device；Therefore s_uvb is high potential, and chip works normally.
When supply voltage VDD decline, VP follows supply voltage VDD to decline, and VQ keeps low potential, as supply voltage VDD
When reaching the Near Threshold of PM1, PM1 progresses into closed state, and VP and VQ progress into high-impedance state.As supply voltage VDD
Further decline, when reaching turnover voltage, since the charge holding of capacitor CP acts on, and VP, VQ access are logical without charge discharging resisting
Road, so that VQ voltage is approached to negative voltage, the source and drain of NM1 is exchanged at this time, and gate source voltage is equal, is complete switched off, and the grid source of NM2
There are pressure differences for voltage, and due to being Low threshold device, when VQ arrival -400mv, NM2 are connected, VP pulled down to low potential, even
Negative voltage, for VP after the shaping of I1 and I2, output s_uvb is low potential, provides brown-out detection signal.
The voltage overturning point of the undervoltage detection circuit that can be applied to low voltage environment of the invention, supply voltage VDD depends on
It in the size selection of PM1 and NM2, can be determined by emulation, but its overturning point is approximate in PMOS near threshold voltage, is suitble to low pressure
Using.The threshold difference that common NMOS tube and PMOS are not much different, can make this detection circuit be difficult to trigger, and NM2 uses low threshold
It is worth device, can declines in VDD and trigger this undervoltage detection circuit afterwards to a certain degree.
Embodiments of the present invention are explained in detail above in conjunction with attached drawing, but the present invention is not limited to above-mentioned implementations
Mode within the knowledge of a person skilled in the art can also be in the premise for not departing from spirit of the invention
Under make a variety of changes.
Claims (3)
1. a kind of undervoltage detection circuit that can be applied to low voltage environment characterized by comprising
PM1 connects supply voltage VDD, output voltage VP；
NM2, input voltage VP；
NM1, NM2, output voltage VQ；
CP, a termination supply voltage VDD, the other end are connected with NM1, NM2 respectively；
Second level phase inverter, is connected in series by I1 and I2, and input voltage VP signal exports under-voltage control signal；
The PM1 respectively with NM2, second level inverter series；
Described NM1, NM2 and second level phase inverter are sequentially connected in series；
The NM2 uses Low threshold NMOS device.
2. undervoltage detection circuit according to claim 1, it is characterised in that: the grid (G) of the PM1 is grounded, source electrode (S) with
Supply voltage VDD connection, the drain electrode (D) of the PM1 and NM2 drain electrode connect, and connect with the input terminal of phase inverter I1；It is described
The source electrode (S) of NM1 is grounded, and grid (G) is connect with drain electrode (D), and is connect jointly with the source electrode of NM2 (S)；The grid of the NM2
(G) it is grounded, source electrode (S) is connect with one end of capacitor CP, and the other end of the capacitor CP is connect with supply voltage VDD；It is described anti-
Phase device I1 output end is connect with phase inverter I2 input terminal, and the phase inverter I2 output end exports under-voltage control signal s_uvb；.
3. a kind of undervoltage detection circuit that can be applied to low voltage environment according to claim 1, which is characterized in that described
The typical threshold voltage of NM2 is 300~500mV.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910354502.7A CN109959817B (en) | 2019-04-29 | 2019-04-29 | Undervoltage detection circuit applicable to low-voltage environment |
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| CN201910354502.7A CN109959817B (en) | 2019-04-29 | 2019-04-29 | Undervoltage detection circuit applicable to low-voltage environment |
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| CN109959817B CN109959817B (en) | 2024-05-10 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113849029A (en) * | 2021-09-26 | 2021-12-28 | 电子科技大学 | A self-biased reference source undervoltage detection circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113849029A (en) * | 2021-09-26 | 2021-12-28 | 电子科技大学 | A self-biased reference source undervoltage detection circuit |
| CN113849029B (en) * | 2021-09-26 | 2022-08-26 | 电子科技大学 | Under-voltage detection circuit of self-biased reference source |
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| CN109959817B (en) | 2024-05-10 |
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