CN105182833B - A kind of dual power supply and power-off time sequence control device and method - Google Patents
A kind of dual power supply and power-off time sequence control device and method Download PDFInfo
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- CN105182833B CN105182833B CN201510660897.5A CN201510660897A CN105182833B CN 105182833 B CN105182833 B CN 105182833B CN 201510660897 A CN201510660897 A CN 201510660897A CN 105182833 B CN105182833 B CN 105182833B
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- 230000000694 effects Effects 0.000 claims description 14
- 239000003990 capacitor Substances 0.000 claims 1
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- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
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- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
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Abstract
The present invention relates to dual power supply and power-off time sequence control device and method, the device includes PMOS field-effect tube, NMOS field-effect tube, the first NPN triode, the second NPN triode, PNP triode, first resistor, second resistance, the first capacitance, the second capacitance, the 3rd capacitance and the 4th capacitance, each hardware element has specific connection relation, sequential and shut-off sequential are connected with hardware element logic control positive-negative powers such as NMOS field-effect tube by PMOS field-effect tube, the device avoids positive and negative power supply from powering and power off timing error, ensures equipment normal work.
Description
Technical field
The present invention relates to automatic monitoring technical fields such as the water conservancy hydrology, town and country flood control, communal facility safety, geological disasters,
Be especially applied to above-mentioned field and without reliable source of power guarantee field data collection terminal device (hereinafter referred to as acquisition terminal or
Acquisition terminal equipment) negative and positive dual power power supply and power-off time sequence control device and method.
Background technology
Under normal circumstances, positive supply, the on and off sequential of negative supply are：When opening power supply, positive electricity is connected in first control
Source, after waiting positive voltage foundation to stablize, then controls connection negative supply；During power cutoff, negative supply is first turned off, waits negative electricity
Source current path is in safe range, then controls shut-off positive supply.
Usually, acquisition terminal performs relative program by internal MCU, comes by defined timing control PIO port levels
Control positive and negative power supply opens and turns off sequential.But in the wild may compared with (thunderous electrical interference etc.) under bad electromagnetic environment, program
It is out of control to cause positive-negative power to be switched on and off sequential entanglement, cmos device circuit generation bolt-lock effect in acquisition terminal is caused electricity
Road can not work normally, and acquisition terminal equipment can be damaged when serious.
The content of the invention
The present invention is directed to the prior art by programme-control dual power supply and cut-out, in the wild compared with bad electromagnetic environment
May cause because of program out of control cmos device bolt-lock in addition damage acquisition terminal equipment the problem of, there is provided a kind of dual power supply and
Time sequence control device is powered off, controls positive-negative power to connect sequential with hardware circuits such as NMOS field-effect tube by PMOS field-effect tube
And shut-off sequential, the device can power and power off timing error to avoid positive and negative power supply, ensure equipment normal work.The present invention
Further relate to a kind of dual power supply and power-off sequential control method.
Technical scheme is as follows：
A kind of dual power supply and power-off time sequence control device, it is characterised in that including PMOS field-effect tube, NMOS effects
Ying Guan, the first NPN triode, the second NPN triode, PNP triode, first resistor, second resistance, the first capacitance, the second electricity
Appearance, the 3rd capacitance and the 4th capacitance,
The PMOS field-effect tube is the control main switch of positive supply, and the source electrode of PMOS field-effect tube connects positive supply, grid
Pole connects the collector of the first NPN triode, drain electrode connection positive supply output；The NMOS field-effect tube is the control of negative supply
Main switch, the source electrode connection negative supply of NMOS field-effect tube, grid connect the collector of PNP triode, drain electrode connection negative supply
Output；The base stage connection power switch control signal line of first NPN triode, emitter ground connection；The PNP triode
Base stage is connected with the collector of the second NPN triode, and the emitter of PNP triode connects one end and second of first resistor at the same time
One end of resistance, the other end ground connection of the first resistor, another termination positive supply output of the second resistance；Described second
The base stage connection power switch control signal line of NPN triode, emitter ground connection；
First capacitance is arranged between the source electrode and grid of PMOS field-effect tube, and second capacitance is arranged at PMOS
Between the grid of field-effect tube and drain electrode, the 3rd capacitance is arranged between the source electrode and grid of NMOS field-effect tube, described
4th capacitance is arranged between grid and the drain electrode of NMOS field-effect tube.
The dual power supply and power-off time sequence control device further includes 3rd resistor, the 3rd resistor and the first electricity
Appearance is arranged in parallel between the source electrode and grid of PMOS field-effect tube.
The dual power supply and power-off time sequence control device further include the 4th resistance and the 5th resistance, and described first
The base stage of NPN triode connects power switch control signal line by the 4th resistance, and the base stage of first NPN triode also connects
Connect one end of the 5th resistance, the other end ground connection of the 5th resistance.
The dual power supply and power-off time sequence control device further include the 6th resistance and the 7th resistance, and described first
The emitter of NPN triode is grounded again after connecting the 6th resistance, and the emitter of first NPN triode is also connected with the 7th resistance
One end, the 7th resistance the other end connection negative supply output.
The dual power supply and power-off time sequence control device further includes the 8th resistance, the 8th resistance and the 3rd electricity
Appearance is parallel between the source electrode and grid of NMOS field-effect tube.
The dual power supply and power-off time sequence control device further includes the 9th resistance, second NPN triode
Base stage connects power switch control signal line by the 9th resistance.
A kind of dual power supply and power-off sequential control method, it is characterised in that use PMOS field-effect tube as positive supply
Control main switch, utilize the grid and control positive electricity of the first NPN triode and first group of Capacity control PMOS field-effect tube
Opening and disconnecting in source；Control main switch of the NMOS field-effect tube for negative supply is used, utilizes PNP triode and second group of capacitance
The grid and control negative supply for controlling NMOS field-effect tube are opened and disconnected, in power switch control signal and PNP triode
Between use the second NPN triode；
When opening power supply, power switch control signal makes the first NPN triode turn on and increase to first group of capacitance charging
Source-gate voltage of big PMOS field-effect tube turns on PMOS field-effect tube, so as to establish positive supply output voltage；Power switch
Control signal controls the conducting of the second NPN triode at the same time, when the positive voltage of foundation reaches and opens negative supply threshold value, PNP
Triode ON simultaneously turns on NMOS field-effect tube to second group of capacitance charging to increase source-gate voltage of NMOS field-effect tube,
So as to establish negative supply output voltage；
During shut-off power supply, power switch control signal makes the cut-off of the second NPN triode and then PNP triode is ended, and second
Group capacitance group electric discharge with reduce source-gate voltage of NMOS field-effect tube make NMOS field-effect tube turn off, negative supply output voltage by
Gradually go up to zero；The first NPN triode of control is held on power switch control signal at the same time and then PMOS field-effect tube is kept
Conducting is to maintain positive supply output voltage, and when negative supply output voltage gradually gos up to 0, the first NPN triode is ended, and first
Group capacitance electric discharge turns off PMOS field-effect tube to reduce source-gate voltage of PMOS field-effect tube, and positive supply output voltage is gradual
Zero.
Using the first NPN triode and first group of capacitance and first group of resistance cooperating to control PMOS field-effect tube
Grid and control positive supply being opened and disconnecting, and limits the rush of current that positive supply opens moment；Using PNP triode and
Second group of capacitance and second group of capacitance cooperating are to control the grid of NMOS field-effect tube and control negative supply to open through and off
Open, and limit the rush of current that negative supply opens moment.
When opening power supply, source-gate voltage using the Miller effect control PMOS field-effect tube of first group of capacitance gradually increases
Greatly, PMOS field-effect tube is made slowly to turn on；Utilize source-grid electricity of the Miller effect control NMOS field-effect tube of second group of capacitance
Pressure gradually increase, makes NMOS field-effect tube slowly turn on.
When by MCU, to control power switch control signal level be logic 1 or effective negative supply output voltage, open just
Power supply powered electronic switchs；By MCU control power switch control signal level for logic 1 and positive supply output voltage it is effective
When, open negative supply powered electronic switch；Negative supply is turned off when to control power switch control signal level be logical zero by MCU
Powered electronic switchs；When by MCU, to control power switch control signal level be logical zero and invalid negative supply output voltage, close
Disconnected positive supply powered electronic switch.
The technique effect of the present invention is as follows：
Dual power supply of the present invention and power-off time sequence control device, including PMOS field-effect tube, NMOS field-effects
Pipe, the first NPN triode, the second NPN triode, PNP triode, first resistor, second resistance, the first capacitance, the second capacitance,
The hardware element of the specific connection relation such as the 3rd capacitance and the 4th capacitance, PMOS field-effect tube are the control main switch of positive supply,
NMOS field-effect tube is the control main switch of negative supply, and the first NPN triode, the first capacitance and the second Capacity control PMOS are imitated
Tube grid is answered, and controls opening and disconnecting for positive supply, PNP triode, first resistor, second resistance, the 3rd capacitance and the 4th
Capacity control NMOS fet gates, and control opening and disconnecting for negative supply.Imitated by PMOS field-effect tube and NMOS
Should each hardware element cooperating logic control positive-negative power such as pipe connect sequential and shut-off sequential so that when opening power supply,
Because positive supply output voltage is not set up, forbid opening negative supply, only after positive voltage output voltage is built up, just open negative electricity
Source；When turning off power supply, because negative supply output voltage is not yet returned to zero, positive supply continues to keep open-minded, when negative supply exports
After voltage return zero, then turn off positive supply.In this way, reliably keeping opening and turning off sequential relationship stringent during power supply, avoid
The prior art by programme-control dual power supply and cut-out can in the wild compared with bad electromagnetic environment since program out of control can
The problem of causing sequential entanglement and circuit locking bolt occurs or even damages acquisition terminal equipment, which can be to avoid positive and negative
Power supply is powered and power-off timing error, avoids circuit locking bolt effect, ensures equipment normal work.
Dual power supply of the present invention and power-off time sequence control device also set up 3rd resistor, when turning off power supply, the first electricity
Hold and the electric charge of the second capacitance storage can be discharged by 3rd resistor, then cause source-gate voltage of PMOS field-effect tube gradually to drop
It is low, when source-gate voltage of PMOS field-effect tube is less than its turn-on threshold voltage, the shut-off of PMOS field-effect tube, positive supply output
For voltage return to zero, structure is simple and easy to implement for this, is worked by separated hardware element logic control, ensure that dual power supply
And power-off sequential accuracy.
Dual power supply of the present invention and power-off sequential control method, with dual power supply of the present invention and disconnected
Electric time sequence control device is corresponding, it will be appreciated that to be the method realized above-mentioned dual power supply and power off time sequence control device, or
Person is not understood as above-mentioned dual power supply and powers off the method for work of time sequence control device, uses PMOS field-effect tube as positive supply
Control main switch, utilize the grid and control positive electricity of the first NPN triode and first group of Capacity control PMOS field-effect tube
Opening and disconnecting in source；Control main switch of the NMOS field-effect tube for negative supply is used, utilizes PNP triode and second group of capacitance
The grid and control negative supply for controlling NMOS field-effect tube are opened and disconnected, in power switch control signal and PNP triode
Between use the second NPN triode；Power switch control signal is detected by separated hardware element at the same time and positive supply exports
Voltage, negative supply output voltage, realize and open power supply in positive and negative power supply and turn off the accurate control of power supply timing, ensure equipment
Normal work, the drawbacks of overcoming the prior art completely, improve the water conservancy hydrology, town and country flood control, communal facility safety, geology
The security performance of the automatic monitoring technical such as disaster field application.
Brief description of the drawings
Fig. 1 is dual power supply of the present invention and the preferred structure schematic diagram for powering off time sequence control device.
Fig. 2 is that dual power supply of the present invention and power-off time sequence control device open shut-off working timing figure.
Fig. 3 is dual power supply of the present invention and the schematic diagram for powering off sequential control method.
Each label lists as follows in figure：
ON_OFF- power switches；M1-PMOS field-effect tube；M2-NMOS field-effect tube；The first NPN triodes of Q1-；
Q2-PNP triodes；The second NPN triodes of Q3-.
Embodiment
The present invention will be described below in conjunction with the accompanying drawings.
The invention discloses a kind of dual power supply and power-off time sequence control device, its preferred structure as shown in Figure 1, including
PMOS field-effect tube M1, NMOS field-effect tube M2, the first NPN triode Q1, PNP triode Q2, the second NPN triode Q3,
One resistance R1, second resistance R2, the first capacitance C1, the second capacitance C2, the 3rd capacitance C3 and the 4th capacitance C4, PMOS field-effect tube
M1 is the control main switch of positive supply (+6V), and the source electrode of PMOS field-effect tube M1 connects positive supply, and grid connects the first NPN tri-
The collector of pole pipe Q1, drain electrode connection positive supply output；NMOS field-effect tube M2 is the control main switch of negative supply (- 6V),
The source electrode connection negative supply of NMOS field-effect tube M2, the collector of grid connection PNP triode Q2, drain electrode connection negative supply are defeated
Go out；The base stage connection power switch ON_OFF control signal wires of first NPN triode Q1, emitter ground connection；PNP triode Q2's
Base stage is connected with the collector of the second NPN triode Q3, and the emitter of PNP triode Q2 connects one end of first resistor R1 at the same time
With one end of second resistance R2, the other end of first resistor R1 is grounded, another termination positive supply output of second resistance R2；Second
The base stage connection power switch control signal line of NPN triode Q3, emitter ground connection；First capacitance C1 is arranged at PMOS field-effects
Between the source electrode and grid of pipe M1, the second capacitance C2 is arranged between grid and the drain electrode of PMOS field-effect tube M1, the 3rd capacitance
C3 is arranged between the source electrode and grid of NMOS field-effect tube M2, the 4th capacitance C4 be arranged at NMOS field-effect tube M2 grid and
Between drain electrode.
3rd resistor R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th are further included in embodiment illustrated in fig. 1
Resistance R7, the 8th resistance R8 and the 9th resistance R9,3rd resistor R3 and the first capacitance C1 are arranged in parallel in PMOS field-effect tube M1
Source electrode and grid between, the base stage of the first NPN triode Q1 passes through the 4th resistance R4 connection power switches ON_OFF control letters
Number line, the base stage of the first NPN triode Q1 are also connected with one end of the 5th resistance R5, the other end ground connection of the 5th resistance R5, and first
The emitter of NPN triode Q1 is grounded again after connecting the 6th resistance R6, and the emitter of the first NPN triode Q1 is also connected with the 7th electricity
One end of R7 is hindered, the other end connection negative supply output of the 7th resistance R7, the 8th resistance R8 and the 3rd capacitance C3 are parallel to NMOS
Between the source electrode and grid of field-effect tube M2, the base stage of the second NPN triode Q3 passes through the 9th resistance R9 connection power switch controls
Signal wire processed.
Dual power supply and power-off time sequence control device shown in Fig. 1, PMOS field-effect tube M1 is the control of positive supply (+6V)
Main switch processed；NMOS field-effect tube M2 is the control main switch of negative supply (- 6V)；Using the first NPN triode Q1, resistance R3,
R4, R5, R6, R7, capacitance C1, C2 co- controlling PMOS field-effect tube M1 grids, control opening and disconnecting for positive supply, and limit
Open the rush of current of moment；Using PNP triode Q2, resistance R1, R2, R8, capacitance C3, C4 control NMOS field-effect tube M2 grid
Pole, controls opening and disconnecting for negative supply, and limits the rush of current for opening moment.
The specific works of device as shown in Figure 1 of the invention are as follows：When needing to open power supply, MCU control ON_OFF control letters
Number it is logical one (CMOS logic level, 3.3V), turns on the first NPN triode Q1, charge to capacitance C1, C2, PMOS imitates
Should pipe M1 sources-gate voltage gradually increase, PMOS field-effect tube M1 gradually becomes conducting state by off state, and+6V supplies electricity output
Voltage gradually rises to+6V by 0V；ON_OFF control signals control the second NPN triode Q3 conductings at the same time, but because+6V exports electricity
Pressure is not yet established, and PNP triode Q2 keeps cut-off, and NMOS field-effect tube M2 is held off.When+6V output voltages rise to necessarily
Degree, magnitude of voltage reaches PNP triode Q2 triode cut-in voltages V between resistance R1, R2be_Q2(0.7V or so), PNP triode Q2
Conducting, charges to capacitance C3, C4, and NMOS field-effect tube M2 gate source voltages gradually increase, and M2 is by off state for NMOS field-effect tube
Conducting state is gradually become, -6V power supply output voltages gradually decrease to -6V by 0V.
When needing the shut-off to power, it is logical zero (CMOS logic level, 0V) that MCU, which controls ON_OFF control signals, second
NPN triode Q3 ends immediately, causes PNP triode Q2 also to end immediately.Capacitance C3, C4 storing charge are put by resistance R8
Electricity, causes the gate source voltage of NMOS field-effect tube M2 gradually to reduce, when the gate source voltage of NMOS field-effect tube M2 is opened less than it
Open threshold voltage VthWhen (1V or so), NMOS field-effect tube M2 shut-offs, -6V electric power output voltages are gradually gone up to 0V by -6V；
ON_OFF control signals output " 0 " logic level of MCU, causes the first NPN triode Q1 base level VbFor 0V, but at this time-
6V electric power output voltages still maintain -6V or so, cause the partitioned level between resistance R6, R7 to be less than-Vbe_Q1(about -0.7V),
First NPN triode Q1 maintains conducting, and control PMOS field-effect tube M1 continues to be held on, and+6V electric power output voltages are after continuation of insurance
Hold as+6V；When -6V electric power output voltages are gradually become close to 0V, the partitioned level between resistance R6, R7 is changed to above -
Vbe_Q1(about -0.7V), the cut-off of the first NPN triode Q1, capacitance C1, C2 storing charge are discharged by resistance R3, cause PMOS
Source-gate voltage of field-effect tube M1 gradually reduces, when source-gate voltage of PMOS field-effect tube M1 is less than its turn-on threshold voltage Vth
When (1V or so), PMOS field-effect tube M1 shut-offs ,+6V electric power output voltages are gradually returned to 0V by+6V.
Fig. 2 is that dual power supply of the present invention and power-off time sequence control device open shut-off working timing figure.Opening confession
When electric, controlled in T1 moment switch power supply, positive supply delays firing current and changes from small to big, and gradually builds up positive voltage, until reaching
Positive supply opens peak point current, positive supply steady state output voltage；Reached during positive voltage is established in T2 moment grids
To when opening negative supply threshold value, negative supply delays firing current and changes from small to big, and gradually builds up negative supply voltage, is opened until reaching negative supply
Open peak point current, negative supply steady state output voltage.When turning off power supply, in the powered-down source control of T3 moment, negative supply delays closing electricity
Stream closes positive supply from large to small up to being zero, and when T4 moment grids reach and close positive supply threshold value, and positive supply delays closing electricity
Stream is from large to small until be zero.During+6V power supplies, -6V power supplies is opened, supply current is limited in particular value
Within (such as 200mA), avoid because capacitive load produces excessive dash current.To sum up, dual power supply of the present invention and power-off when
The beneficial effect of sequence control device is：When opening power supply ,+6V power supplys powered electronic switch is first opened, because+6V power supplys export electricity
Pressure is not set up, and is forbidden opening -6V power supplys powered electronic switch, only after+6V voltage outputs Voltage Establishment is good, is just opened -6V
Power supply powered electronic switchs；When turning off power supply, -6V power supplys powered electronic switch is first turned off, because of -6V electric power output voltages not yet
0V is returned ,+6V power supplys powered electronic switch continues to keep open-minded, after -6V electric power output voltages disappear (returning 0V), then turns off
+ 6V power supplys powered electronic switchs.In this way, reliably ensureing to open and turn off sequential relationship stringent during power supply, circuit bolt is avoided
Effect is locked, ensures equipment normal work.
The invention further relates to a kind of dual power supply and power-off sequential control method, this method double electricity above-mentioned with the present invention
Source powers and power-off time sequence control device is corresponding, it will be appreciated that to be to realize dual power supply of the present invention and power-off timing control dress
The method put.This method uses control main switch of the PMOS field-effect tube for positive supply, using the first NPN triode, first group
Capacitance and first group of resistance cooperating to control the grid of PMOS field-effect tube and control opening and disconnecting for positive supply, and
Limitation positive supply opens the rush of current of moment；Control main switch of the NMOS field-effect tube for negative supply is used, utilizes tri- poles of PNP
Pipe, second group of capacitance and second group of capacitance cooperating with control the grid of NMOS field-effect tube and control negative supply open and
Disconnect, and limit the rush of current that negative supply opens moment；Second is used between power switch control signal and PNP triode
NPN triode.Its hardware circuit diagram realized refers to Fig. 1.When opening power supply, power switch control signal makes the first NPN tri-
Pole pipe turns on and turns on PMOS field-effect tube to first group of capacitance charging to increase source-gate voltage of PMOS field-effect tube, from
And establish positive supply output voltage；Power switch control signal controls the conducting of the second NPN triode at the same time, in the positive supply of foundation
When voltage reaches unlatching negative supply threshold value, PNP triode conducting is simultaneously charged to increase NMOS field-effect tube to second group of capacitance
Source-gate voltage turns on NMOS field-effect tube, so as to establish negative supply output voltage；During shut-off power supply, power switch control letter
Number make that the second NPN triode is ended and then PNP triode is ended, second group of capacitance group electric discharge is to reduce NMOS field-effect tube
Source-gate voltage turns off NMOS field-effect tube, and negative supply output voltage gradually gos up to zero；Power switch control signal is at the same time
Control that the first NPN triode is held on and then PMOS field-effect tube is held on to maintain positive supply output voltage, in negative electricity
Source output voltage, which gradually gos up to the first NPN triode when 0, to be ended, and first group of capacitance discharges to reduce PMOS field-effect tube
Source-gate voltage turns off PMOS field-effect tube, and positive supply output voltage is gradually zeroed.
This method of the present invention controls PMOS field-effect tube when opening power supply, using the Miller effect of first group of capacitance
Source-gate voltage gradually increases, and PMOS field-effect tube is slowly turned on；NMOS are controlled using the Miller effect of second group of capacitance
Source-gate voltage of effect pipe gradually increases, and NMOS field-effect tube is slowly turned on.It is slow by the grid voltage of field-effect tube
Change, makes field-effect tube slowly turn on, limits the charging current to capacitive load, avoids the formation of the high current for opening power supply moment
Impact.
This method detects power switch control signal and positive supply output voltage, negative electricity at the same time by separated hardware element
Source output voltage, realizes and opens power supply in positive and negative power supply and turn off the accurate control of power supply timing.Its principle is as shown in figure 3, work as
When by MCU, to control power switch control signal level be logical one level (3.3V), or -6V power supply output voltages
Effectively (output -6V) when, delay startup, circuit logic control+6V power supplies powered electronic switch it is open-minded；Electricity is controlled by MCU
It is slow to open when source switch control signal level is logical one level, and during+6V power supplies output voltage effective (output+6V)
Dynamic, circuit logic control -6V power supplies powered electronic switch is open-minded.When pass through MCU control power switch control signal level
For logical zero level (0V) when, circuit logic control -6V power supply powered electronic switch OFFs；It is electric when being controlled by MCU
When source switch control signal level is logical zero level, and during -6V power supply output voltages invalid (output 0V), circuit is patrolled
Collect control+6V power supply powered electronic switch OFFs.
It should be pointed out that embodiment described above can make those skilled in the art that the present invention be more fully understood
Create, but do not limit the invention in any way is created.Therefore, although this specification referring to the drawings creates the present invention with embodiment
Make and have been carried out being described in detail, it will be understood by those skilled in the art, however, that still can modify to the invention
Or equivalent substitution, in short, the technical solution of all spirit and scope for not departing from the invention and its improvement, it should all contain
Cover among the protection domain of the invention patent.
Claims (10)
1. a kind of dual power supply and power-off time sequence control device, it is characterised in that including PMOS field-effect tube, NMOS field-effects
Pipe, the first NPN triode, the second NPN triode, PNP triode, first resistor, second resistance, the first capacitance, the second capacitance,
3rd capacitance and the 4th capacitance,
The PMOS field-effect tube is the control main switch of positive supply, and the source electrode of PMOS field-effect tube connects positive supply, and grid connects
Connect the collector of the first NPN triode, drain electrode connection positive supply output；The NMOS field-effect tube is opened for the control master of negative supply
Close, the source electrode connection negative supply of NMOS field-effect tube, grid connects the collector of PNP triode, drain electrode connection negative supply output；
The base stage connection power switch control signal line of first NPN triode, emitter ground connection；The base stage of the PNP triode
It is connected with the collector of the second NPN triode, the emitter of PNP triode connects one end and the second resistance of first resistor at the same time
One end, the first resistor the other end ground connection, the second resistance another termination positive supply output；2nd NPN
The base stage connection power switch control signal line of triode, emitter ground connection；
First capacitance is arranged between the source electrode and grid of PMOS field-effect tube, and second capacitance is arranged at PMOS effects
Should pipe grid and drain electrode between, the 3rd capacitance is arranged between the source electrode and grid of NMOS field-effect tube, the described 4th
Capacitance is arranged between grid and the drain electrode of NMOS field-effect tube；
When opening power supply, power switch control signal makes the first NPN triode turn on and charge to the first capacitance and the second capacitance
PMOS field-effect tube is turned on to increase source-gate voltage of PMOS field-effect tube, so as to establish positive supply output voltage；Power supply
Switch controlling signal controls the conducting of the second NPN triode at the same time, when the positive voltage of foundation reaches and opens negative supply threshold value,
PNP triode turns on and makes NMOS to the 3rd capacitance and the charging of the 4th capacitance with the source-gate voltage for increasing NMOS field-effect tube
Effect pipe turns on, so as to establish negative supply output voltage；
During shut-off power supply, power switch control signal ends the second NPN triode and then PNP triode is ended, the 3rd capacitance
Discharge with the 4th capacitance turns off NMOS field-effect tube to reduce source-gate voltage of NMOS field-effect tube, negative supply output voltage
Gradually go up to zero；The first NPN triode of control is held on power switch control signal at the same time and then PMOS field-effect tube is protected
Conducting is held to maintain positive supply output voltage, when negative supply output voltage gradually gos up to 0, the first NPN triode is ended, the
One capacitance and the electric discharge of the second capacitance turn off PMOS field-effect tube to reduce source-gate voltage of PMOS field-effect tube, and positive supply is defeated
Go out voltage to be gradually zeroed.
2. dual power supply according to claim 1 and power-off time sequence control device, it is characterised in that further include the 3rd electricity
Resistance, the 3rd resistor and the first capacitance are arranged in parallel between the source electrode and grid of PMOS field-effect tube.
3. dual power supply according to claim 1 or 2 and power-off time sequence control device, it is characterised in that further include the
Four resistance and the 5th resistance, the base stage of first NPN triode connect power switch control signal line, institute by the 4th resistance
The base stage for stating the first NPN triode is also connected with one end of the 5th resistance, the other end ground connection of the 5th resistance.
4. dual power supply according to claim 3 and power-off time sequence control device, it is characterised in that further include the 6th electricity
Resistance and the 7th resistance, the emitter of first NPN triode are grounded again after connecting the 6th resistance, first NPN triode
Emitter be also connected with one end of the 7th resistance, the other end connection negative supply output of the 7th resistance.
5. dual power supply according to claim 1 or 2 and power-off time sequence control device, it is characterised in that further include the
Eight resistance, the 8th resistance and the 3rd capacitance are parallel between the source electrode and grid of NMOS field-effect tube.
6. dual power supply according to claim 1 or 2 and power-off time sequence control device, it is characterised in that further include the
Nine resistance, the base stage of second NPN triode connect power switch control signal line by the 9th resistance.
7. a kind of dual power supply and power-off sequential control method, it is characterised in that use PMOS field-effect tube as positive supply
Main switch is controlled, utilizes the grid and control positive supply of the first NPN triode and first group of Capacity control PMOS field-effect tube
Open and disconnect；Control main switch of the NMOS field-effect tube for negative supply is used, utilizes PNP triode and second group of capacitance control
The grid of NMOS field-effect tube processed and control negative supply are opened and disconnected, power switch control signal and PNP triode it
Between use the second NPN triode；
When opening power supply, power switch control signal makes the first NPN triode turn on and increase to first group of capacitance charging
Source-gate voltage of PMOS field-effect tube turns on PMOS field-effect tube, so as to establish positive supply output voltage；Power switch control
Signal processed controls the conducting of the second NPN triode at the same time, when the positive voltage of foundation reaches and opens negative supply threshold value, PNP tri-
Pole pipe turns on and turns on NMOS field-effect tube to second group of capacitance charging to increase source-gate voltage of NMOS field-effect tube, from
And establish negative supply output voltage；
During shut-off power supply, power switch control signal makes the cut-off of the second NPN triode and then PNP triode is ended, second group of electricity
Discharge capacitor turns off NMOS field-effect tube to reduce source-gate voltage of NMOS field-effect tube, and negative supply output voltage gradually gos up
To zero；Power switch control signal at the same time control the first NPN triode be held on so that PMOS field-effect tube be held on
Positive supply output voltage is maintained, first NPN triode is ended when negative supply output voltage gradually gos up to 0, first group of capacitance
Electric discharge turns off PMOS field-effect tube to reduce source-gate voltage of PMOS field-effect tube, and positive supply output voltage is gradually zeroed.
8. dual power supply according to claim 7 and power-off sequential control method, it is characterised in that utilize the first NPN
Triode and first group of capacitance and first group of resistance cooperating are to control the grid of PMOS field-effect tube and control positive supply
Open and disconnect, and limit the rush of current that positive supply opens moment；Utilize PNP triode and second group of capacitance and second group
Capacitance cooperating is to control the grid of NMOS field-effect tube and control negative supply to open and disconnect, and it is open-minded to limit negative supply
The rush of current of moment.
9. dual power supply and power-off sequential control method according to claim 7 or 8, it is characterised in that open power supply
When, source-gate voltage using the Miller effect control PMOS field-effect tube of first group of capacitance gradually increases, and makes PMOS field-effects
Pipe slowly conducting；Source-gate voltage using the Miller effect control NMOS field-effect tube of second group of capacitance gradually increases, and makes
NMOS field-effect tube slowly turns on.
10. dual power supply and power-off sequential control method according to claim 7 or 8, it is characterised in that pass through MCU
When to control power switch control signal level be logic 1 or effective negative supply output voltage, open positive supply powered electronic and open
Close；When to control power switch control signal level be logic 1 and effective positive supply output voltage by MCU, negative supply confession is opened
Electric electronic switch；Negative supply powered electronic is turned off when to control power switch control signal level be logical zero by MCU to switch；It is logical
Cross MCU and control power switch control signal level when being logical zero and invalid negative supply output voltage, turn off positive supply powered electronic
Switch.
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| CN201510660897.5A CN105182833B (en) | 2015-10-14 | 2015-10-14 | A kind of dual power supply and power-off time sequence control device and method |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107425835B (en) * | 2016-05-23 | 2023-01-17 | 中兴通讯股份有限公司 | Startup and shutdown circuit |
| CN110244636B (en) * | 2019-06-25 | 2020-11-27 | 北京机械设备研究所 | Dual-power on-off control circuit for servo system |
| CN111555255A (en) * | 2020-03-31 | 2020-08-18 | 惠州市德赛西威汽车电子股份有限公司 | Accurate control circuit and method for discharge time and time sequence of power supply system |
| CN118137650B (en) * | 2024-05-06 | 2024-07-05 | 深圳市积加创新技术有限公司 | Positive and negative symmetrical dual-power switch control circuit of amplifier |
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| US6188210B1 (en) * | 2000-01-13 | 2001-02-13 | Ophir Rf, Inc. | Methods and apparatus for soft start and soft turnoff of linear voltage regulators |
| CN1674438A (en) * | 2004-03-23 | 2005-09-28 | 华为技术有限公司 | Circuit for positive power source inputting load electrifying slow starting |
| CN202309659U (en) * | 2011-11-17 | 2012-07-04 | 中兴通讯股份有限公司 | Power input load power-on slow starter |
| CN205015670U (en) * | 2015-10-14 | 2016-02-03 | 基康仪器股份有限公司 | Dual power supply and outage time schedule control device |
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| US6188210B1 (en) * | 2000-01-13 | 2001-02-13 | Ophir Rf, Inc. | Methods and apparatus for soft start and soft turnoff of linear voltage regulators |
| CN1674438A (en) * | 2004-03-23 | 2005-09-28 | 华为技术有限公司 | Circuit for positive power source inputting load electrifying slow starting |
| CN202309659U (en) * | 2011-11-17 | 2012-07-04 | 中兴通讯股份有限公司 | Power input load power-on slow starter |
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