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CN103871855B - A kind of preparation method of integrated circuit Dual Gate Oxide - Google Patents

A kind of preparation method of integrated circuit Dual Gate Oxide Download PDF

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CN103871855B
CN103871855B CN201210548973.XA CN201210548973A CN103871855B CN 103871855 B CN103871855 B CN 103871855B CN 201210548973 A CN201210548973 A CN 201210548973A CN 103871855 B CN103871855 B CN 103871855B
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gate oxide
oxide layer
photoresist
field
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CN103871855A (en
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潘光燃
高振杰
文燕
石金成
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Shenzhen Founder Microelectronics Co Ltd
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Peking University Founder Group Co Ltd
Shenzhen Founder Microelectronics Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0144Manufacturing their gate insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

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  • Physics & Mathematics (AREA)
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  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

本发明涉及半导体集成电路技术领域,公开了一种集成电路双栅氧的制备方法,包括:在场区的衬底表面形成场氧化层;在场区的场氧化层表面形成第一层多晶硅;在高压MOS管有源区和低压MOS管有源区的衬底表面形成厚栅氧化层;在完成上述步骤的集成电路半成品表面涂覆光刻胶;对涂覆光刻胶的集成电路半成品进行曝光显影,使所述第一层多晶硅的表面覆盖一层场区光刻胶,所述高压MOS管有源区厚栅氧化层的表面覆盖一层有源区光刻胶。采用本发明技术方案,当刻蚀掉低压MOS管的厚栅氧化层时,场区光刻胶可有效保护第一层多晶硅之下的场氧化层不被横向刻蚀,避免产生空洞,大大提高了产品的可靠性。

The invention relates to the technical field of semiconductor integrated circuits, and discloses a method for preparing an integrated circuit double gate oxide, comprising: forming a field oxide layer on the surface of the substrate in the field region; forming a first layer of polysilicon on the surface of the field oxide layer in the field region; Form a thick gate oxide layer on the substrate surface of the active area of the MOS tube and the active area of the low-voltage MOS tube; coat photoresist on the surface of the semi-finished integrated circuit that has completed the above steps; expose and develop the semi-finished integrated circuit coated with photoresist The surface of the first layer of polysilicon is covered with a layer of photoresist in the field area, and the surface of the thick gate oxide layer in the active area of the high voltage MOS transistor is covered with a layer of photoresist in the active area. By adopting the technical scheme of the present invention, when the thick gate oxide layer of the low-voltage MOS transistor is etched away, the field photoresist can effectively protect the field oxide layer under the first layer of polysilicon from being etched laterally, avoiding voids, and greatly improving product reliability.

Description

一种集成电路双栅氧的制备方法A kind of preparation method of integrated circuit double gate oxide

技术领域technical field

本发明涉及半导体集成电路技术领域,特别是涉及一种集成电路双栅氧的制备方法。The invention relates to the technical field of semiconductor integrated circuits, in particular to a method for preparing integrated circuit double gate oxides.

背景技术Background technique

在集成电路中,低压MOS管和高压MOS管由于各自栅极的耐压条件不同,二者所对应的栅氧化层的厚度也不同,通常栅极电压为5V,对应的栅氧化层厚度为15~20nm,因而高压MOS管对应的栅氧化层厚度更大。若在集成电路中存在两种厚度的栅氧化层,则称为双栅氧。In integrated circuits, due to the different withstand voltage conditions of the respective gates of the low-voltage MOS transistor and the high-voltage MOS transistor, the thickness of the gate oxide layer corresponding to the two is also different. Usually, the gate voltage is 5V, and the corresponding gate oxide layer thickness is 15V. ~20nm, so the thickness of the gate oxide layer corresponding to the high-voltage MOS transistor is larger. If there are gate oxide layers of two thicknesses in the integrated circuit, it is called double gate oxide.

根据集成电路的功能需要,除低压MOS管、高压MOS管器件外还需要设计高值电阻(简称为高阻)和电容等。MOS管的栅极、高阻及电容的上下极板可以用多晶硅制作。According to the functional requirements of integrated circuits, in addition to low-voltage MOS tubes and high-voltage MOS tubes, high-value resistors (referred to as high-resistance) and capacitors need to be designed. The gate of the MOS tube, the upper and lower plates of the high resistance and the capacitor can be made of polysilicon.

在现有技术中,在制作集成电路双栅氧时,先形成厚栅氧化层;然后刻蚀掉需要制作薄栅氧化层区域的厚栅氧化层;再形成薄栅氧化层。如图1所示,采用现有技术,在刻蚀掉厚栅氧化层时,覆盖有第一层多晶硅5的场氧化层2会发生横向腐蚀,然后制备薄栅氧化层4,图1为现有技术制作完成的集成电路双栅氧的示意图,衬底1之上分别覆盖有场氧化层2,厚栅氧化层3和薄栅氧化层4,第一层多晶硅5之下的场氧化层2产生空洞8。In the prior art, when making double gate oxides for integrated circuits, a thick gate oxide layer is formed first; then the thick gate oxide layer in the area where a thin gate oxide layer needs to be formed is etched away; and a thin gate oxide layer is formed again. As shown in Figure 1, using the existing technology, when the thick gate oxide layer is etched away, the field oxide layer 2 covered with the first layer of polysilicon 5 will be etched laterally, and then a thin gate oxide layer 4 will be prepared, as shown in Figure 1. A schematic diagram of an integrated circuit with double gate oxides produced by existing technologies, the substrate 1 is covered with a field oxide layer 2, a thick gate oxide layer 3 and a thin gate oxide layer 4, and the field oxide layer 2 under the first layer of polysilicon 5 A cavity 8 is produced.

现有技术的缺陷在于,在刻蚀掉厚栅氧化层的过程中,第一层多晶硅下方的场氧化层会发生横向刻蚀,产生空洞,最终导致产品缺陷,影响产品的可靠性。The defect of the prior art is that in the process of etching away the thick gate oxide layer, the field oxide layer under the first layer of polysilicon will be etched laterally, resulting in voids, which eventually lead to product defects and affect the reliability of the product.

发明内容Contents of the invention

本发明的目的是提供一种集成电路双栅氧的制备方法,用以改善现有技术中存在的第一层多晶硅之下的场氧化层横向刻蚀产生空洞的问题,提高产品的可靠性。The purpose of the present invention is to provide a method for preparing integrated circuit double gate oxide, which is used to improve the problem of voids caused by lateral etching of the field oxide layer under the first layer of polysilicon in the prior art, and improve product reliability.

本发明集成电路双栅氧的制备方法,包括:The preparation method of integrated circuit double gate oxide of the present invention comprises:

在场区的衬底表面形成场氧化层;forming a field oxide layer on the surface of the substrate in the field region;

在场区的场氧化层表面形成第一层多晶硅;forming a first layer of polysilicon on the surface of the field oxide layer in the field region;

在高压MOS管有源区和低压MOS管有源区衬底表面形成厚栅氧化层;Form a thick gate oxide layer on the surface of the substrate in the active area of the high-voltage MOS tube and the active area of the low-voltage MOS tube;

在完成上述步骤的集成电路半成品表面涂覆光刻胶;Coating photoresist on the surface of the integrated circuit semi-finished product after completing the above steps;

对涂覆光刻胶的集成电路半成品进行曝光显影,使第一层多晶硅表面覆盖有一层场区光刻胶,所述高压MOS管有源区厚栅氧化层的表面覆盖一层有源区光刻胶。Expose and develop the semi-finished integrated circuit coated with photoresist, so that the surface of the first layer of polysilicon is covered with a layer of field photoresist, and the surface of the thick gate oxide layer in the active region of the high-voltage MOS tube is covered with a layer of photoresist in the active region. Engraving.

所述的集成电路双栅氧的制备方法,在对涂覆光刻胶的集成电路半成品进行曝光显影之后,还包括:The preparation method of the integrated circuit double gate oxide also includes:

刻蚀掉低压MOS管有源区的衬底表面的厚栅氧化层;Etching away the thick gate oxide layer on the substrate surface of the active region of the low-voltage MOS transistor;

去除所述场区光刻胶和所述有源区光刻胶;removing the photoresist in the field region and the photoresist in the active region;

在低压MOS管有源区的衬底表面形成薄栅氧化层;Form a thin gate oxide layer on the substrate surface of the active region of the low-voltage MOS transistor;

在所述薄栅氧化层和高压MOS管有源区厚栅氧化层的表面形成第二层多晶硅。A second layer of polysilicon is formed on the surface of the thin gate oxide layer and the thick gate oxide layer in the active region of the high voltage MOS transistor.

优选的,场区光刻胶的每个边超出第一层多晶硅对应的边0.5~2.0微米。Preferably, each side of the photoresist in the field region exceeds the corresponding side of the first layer of polysilicon by 0.5-2.0 microns.

优选的,所述第一层多晶硅作为高阻和/或多晶硅电容下极板。Preferably, the first layer of polysilicon serves as a high-resistance and/or lower plate of a polysilicon capacitor.

在本发明集成电路双栅氧的制备方法中,由于第一层多晶硅上覆盖有场区光刻胶,因此,当刻蚀掉低压MOS管的厚栅氧化层时,场区光刻胶可有效保护第一层多晶硅之下的场氧化层不被横向刻蚀,避免产生空洞,大大提高了产品的可靠性。In the method for preparing integrated circuit double gate oxide of the present invention, since the first layer of polysilicon is covered with a field photoresist, when the thick gate oxide layer of the low-voltage MOS transistor is etched away, the field photoresist can effectively Protect the field oxide layer under the first layer of polysilicon from being etched laterally, avoid voids, and greatly improve product reliability.

附图说明Description of drawings

图1为现有技术的集成电路双栅氧结构示意图;FIG. 1 is a schematic diagram of a double gate oxide structure of an integrated circuit in the prior art;

图2为本发明集成电路双栅氧的制备方法流程示意图;2 is a schematic flow chart of a method for preparing an integrated circuit double gate oxide of the present invention;

图3a到图3e为本发明集成电路双栅氧的制备方法具体实施例的工艺示意图。3a to 3e are process schematic diagrams of a specific embodiment of the method for preparing integrated circuit double gate oxides according to the present invention.

附图标记:Reference signs:

1-衬底2-场氧化层3-厚栅氧化层4-薄栅氧化层1-substrate 2-field oxide layer 3-thick gate oxide layer 4-thin gate oxide layer

5-第一层多晶硅6-高阻7-双多晶电容下极板8-空洞5-First layer of polysilicon 6-High resistance 7-Double polycrystalline capacitor lower plate 8-Void

9-第二层多晶硅10-有源区光刻胶11-场区光刻胶9-The second layer of polysilicon 10-Active area photoresist 11-Field area photoresist

21-场区22-高压MOS管有源区23-低压MOS管有源区21-field area 22-high voltage MOS tube active area 23-low voltage MOS tube active area

具体实施方式detailed description

为了解决现有技术中存在的第一层多晶硅之下的场氧化层发生横向刻蚀,易产生空洞,导致产品缺陷的技术问题,本发明提供了一种集成电路双栅氧的制备方法。In order to solve the technical problem in the prior art that the field oxide layer under the first layer of polysilicon is etched laterally, voids are easily generated, and product defects are caused, the invention provides a method for preparing an integrated circuit double gate oxide.

如图2所示,本发明集成电路双栅氧的制备方法流程示意图,包括:As shown in Figure 2, the schematic flow chart of the preparation method of the integrated circuit double gate oxide of the present invention includes:

步骤101、在场区的衬底表面形成场氧化层;Step 101, forming a field oxide layer on the surface of the substrate in the field region;

步骤102、在场区的场氧化层上形成第一层多晶硅;Step 102, forming a first layer of polysilicon on the field oxide layer in the field region;

步骤103、在高压MOS管有源区和低压MOS管有源区衬底表面形成厚栅氧化层。Step 103 , forming a thick gate oxide layer on the surface of the substrate in the active region of the high-voltage MOS transistor and the active region of the low-voltage MOS transistor.

步骤104、在完成上述步骤的集成电路半成品表面涂覆光刻胶;Step 104, coating photoresist on the surface of the semi-finished integrated circuit after the above steps;

步骤105、对涂覆光刻胶的集成电路半成品进行曝光显影,使第一层多晶硅的表面覆盖一层场区光刻胶,所述高压MOS管有源区厚栅氧化层的表面覆盖一层有源区光刻胶。Step 105, exposing and developing the photoresist-coated integrated circuit semi-finished product, so that the surface of the first layer of polysilicon is covered with a layer of field photoresist, and the surface of the thick gate oxide layer in the active region of the high-voltage MOS transistor is covered with a layer Active area photoresist.

在本发明技术方案中,由于在第一层多晶硅表面覆盖有一层场区光刻胶,在后续的刻蚀步骤中,避免了对第一层多晶硅之下的场氧化层发生横向刻蚀,因而减少了空洞的产生,提高了产品的可靠性。In the technical solution of the present invention, since the surface of the first layer of polysilicon is covered with a layer of field photoresist, in the subsequent etching step, the lateral etching of the field oxide layer under the first layer of polysilicon is avoided, thus The generation of voids is reduced, and the reliability of the product is improved.

本发明集成电路双栅氧的制备方法,在步骤105之后,还包括:The method for preparing the integrated circuit double gate oxide of the present invention, after step 105, further includes:

刻蚀掉低压MOS管有源区的衬底表面的厚栅氧化层;Etching away the thick gate oxide layer on the substrate surface of the active region of the low-voltage MOS transistor;

去除场区光刻胶和有源区光刻胶;Remove the photoresist in the field area and the photoresist in the active area;

在低压MOS管有源区的衬底表面形成薄栅氧化层;Form a thin gate oxide layer on the substrate surface of the active region of the low-voltage MOS transistor;

在薄栅氧化层和高压MOS管有源区厚栅氧化层的表面形成第二层多晶硅。A second layer of polysilicon is formed on the surface of the thin gate oxide layer and the thick gate oxide layer in the active region of the high voltage MOS transistor.

优选的,所述第一层多晶硅作为高阻和/或多晶硅电容下极板,第一层多晶硅根据集成电路设计的需要,可以用来制备不同的器件。Preferably, the first layer of polysilicon is used as a high-resistance and/or lower plate of a polysilicon capacitor, and the first layer of polysilicon can be used to prepare different devices according to the needs of integrated circuit design.

优选的,场区光刻胶的每个边超出第一层多晶硅对应的边0.5~2.0微米。Preferably, each side of the photoresist in the field region exceeds the corresponding side of the first layer of polysilicon by 0.5-2.0 microns.

在本发明优选的方案中,场区光刻胶覆盖第一层多晶硅,场区光刻胶的每个边超出第一层多晶硅对应的边0.5~2.0微米,在刻蚀掉低压MOS管有源区的衬底表面的厚栅氧化层时,更有效地防止了第一层多晶硅之下的场区氧化层横向刻蚀,提高了产品的可靠性。In the preferred solution of the present invention, the photoresist in the field area covers the first layer of polysilicon, and each side of the photoresist in the field area exceeds the corresponding side of the first layer of polysilicon by 0.5 to 2.0 microns. When the thick gate oxide layer on the substrate surface of the region is used, it can more effectively prevent the lateral etching of the field region oxide layer under the first layer of polysilicon, and improve the reliability of the product.

如图3a到图3e所示为本发明集成电路双栅氧的制备方法的具体实施例,其主要制作工艺流程如下:As shown in Figure 3a to Figure 3e is a specific embodiment of the preparation method of integrated circuit double gate oxide of the present invention, its main production process is as follows:

如图3a所示,在衬底1上人为划分出高压MOS管有源区22、低压MOS管有源区23和场区21,在场区21的衬底1表面形成场氧化层2;As shown in FIG. 3a, a high-voltage MOS transistor active region 22, a low-voltage MOS transistor active region 23, and a field region 21 are artificially divided on the substrate 1, and a field oxide layer 2 is formed on the surface of the substrate 1 in the field region 21;

根据集成电路的设计,在需要制作多晶硅器件的场区21的场氧化层2上形成第一层多晶硅5,第一层多晶硅5可以作为高阻6和多晶硅电容的下极板7;According to the design of the integrated circuit, the first layer of polysilicon 5 is formed on the field oxide layer 2 of the field region 21 of the polysilicon device, and the first layer of polysilicon 5 can be used as the lower plate 7 of the high resistance 6 and the polysilicon capacitor;

在高压MOS管有源区22和低压MOS管有源区23衬底1表面形成厚栅氧化层3。A thick gate oxide layer 3 is formed on the surface of the substrate 1 in the active region 22 of the high voltage MOS transistor and the active region 23 of the low voltage MOS transistor.

如图3b所示,在完成上述步骤的集成电路半成品的表面涂覆光刻胶;As shown in Figure 3b, photoresist is coated on the surface of the integrated circuit semi-finished product after completing the above steps;

对涂覆光刻胶的集成电路半成品进行曝光显影,使第一层多晶硅5的表面覆盖一层场区光刻胶11,并且使得高压MOS管有源区22的厚栅氧化层3表面覆盖一层有源区光刻胶10,其中,场区光刻胶11覆盖第一层多晶硅5,优选的,场区光刻胶11的每个边超出第一层多晶硅5对应的边0.5~2.0微米。Expose and develop the photoresist-coated integrated circuit semi-finished product, so that the surface of the first layer of polysilicon 5 is covered with a layer of field photoresist 11, and the surface of the thick gate oxide layer 3 of the high-voltage MOS tube active region 22 is covered with a A layer of active region photoresist 10, wherein the field region photoresist 11 covers the first layer of polysilicon 5, preferably, each side of the field region photoresist 11 exceeds the corresponding side of the first layer of polysilicon 5 by 0.5 to 2.0 microns .

如图3c所示,刻蚀掉低压MOS管有源区23的衬底1表面的厚栅氧化层3,并且,没有被光刻胶覆盖的场区的场氧化层2也被腐蚀掉一定厚度,该厚度一般等于厚栅氧化层3厚度的1.05~1.25倍,在场区光刻胶11下方的场氧化层2也被横向腐蚀掉一小部分,一般小于0.2微米。As shown in Figure 3c, the thick gate oxide layer 3 on the surface of the substrate 1 in the active region 23 of the low-voltage MOS transistor is etched away, and the field oxide layer 2 in the field region not covered by the photoresist is also etched to a certain thickness , the thickness is generally equal to 1.05 to 1.25 times the thickness of the thick gate oxide layer 3, and a small part of the field oxide layer 2 under the photoresist 11 in the field area is also laterally etched away, generally less than 0.2 microns.

如图3d所示,去除第一层多晶硅5表面的场区光刻胶11并去除高压MOS管有源区厚栅氧化层表面的有源区光刻胶10,在去除光刻胶后,第一层多晶硅5与场氧化层2不会产生空洞,场氧化层表面是平滑的台阶,避免了最终产品的可靠性风险;As shown in Figure 3d, remove the field region photoresist 11 on the surface of the first layer of polysilicon 5 and remove the active region photoresist 10 on the surface of the thick gate oxide layer in the active region of the high-voltage MOS transistor. After removing the photoresist, the first A layer of polysilicon 5 and field oxide layer 2 will not produce voids, and the surface of the field oxide layer is a smooth step, which avoids the reliability risk of the final product;

在低压MOS管有源区23的衬底1表面形成薄栅氧化层4;Forming a thin gate oxide layer 4 on the surface of the substrate 1 in the active region 23 of the low-voltage MOS transistor;

如图3e所示,在薄栅氧化层4和高压MOS管有源区厚栅氧化层3的表面形成第二层多晶硅9,该层多晶硅可以用于形成低压MOS管和高压MOS管的栅极。As shown in Figure 3e, a second layer of polysilicon 9 is formed on the surface of the thin gate oxide layer 4 and the thick gate oxide layer 3 in the active region of the high-voltage MOS transistor, and this layer of polysilicon can be used to form the gates of the low-voltage MOS transistor and the high-voltage MOS transistor .

在本实施例中,采用第一层多晶硅制作高阻和电容的下极板,但是本发明并不限于这一实施例,第一层多晶硅制作的器件和其在场区的位置可根据集成电路的设计有所不同,例如第一层多晶硅仅用于制作高阻或者仅用于制作电容的下极板,同理,第二层多晶硅也不限于只是制作MOS的栅极,还可以用于制作电容的上极板。只要集成电路的双栅氧在第一层多晶硅之后制备就适用于本发明。In this embodiment, adopt the first layer of polysilicon to make the lower plate of high resistance and capacitance, but the present invention is not limited to this embodiment, the device that the first layer of polysilicon is made and its position in the field area can be according to the integrated circuit The design is different. For example, the first layer of polysilicon is only used to make high resistance or the lower plate of the capacitor. Similarly, the second layer of polysilicon is not limited to just making the gate of the MOS, and can also be used to make capacitors. of the upper plate. As long as the double gate oxide of the integrated circuit is prepared after the first layer of polysilicon, it is applicable to the present invention.

可见,在本发明的技术方案中,由于第一层多晶硅上覆盖有场区光刻胶,因此,当刻蚀掉低压MOS管的厚栅氧化层时,场区光刻胶可有效保护第一层多晶硅之下的场氧化层不被横向刻蚀,避免产生空洞,减少了产品的缺陷,大大提高了产品的可靠性。It can be seen that in the technical solution of the present invention, since the first layer of polysilicon is covered with field photoresist, when the thick gate oxide layer of the low-voltage MOS transistor is etched away, the field photoresist can effectively protect the first layer of polysilicon. The field oxide layer under the polysilicon layer is not etched laterally, avoiding voids, reducing product defects, and greatly improving product reliability.

显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these modifications and variations.

Claims (3)

1.一种集成电路双栅氧的制备方法,其特征在于,包括:1. A method for preparing an integrated circuit double gate oxide, characterized in that, comprising: 在场区的衬底表面形成场氧化层;forming a field oxide layer on the surface of the substrate in the field region; 在场区的场氧化层表面形成第一层多晶硅;forming a first layer of polysilicon on the surface of the field oxide layer in the field region; 在高压MOS管有源区和低压MOS管有源区的衬底表面形成厚栅氧化层;Form a thick gate oxide layer on the substrate surface of the active area of the high-voltage MOS tube and the active area of the low-voltage MOS tube; 在完成上述步骤的集成电路半成品表面涂覆光刻胶;Coating photoresist on the surface of the integrated circuit semi-finished product after completing the above steps; 对涂覆光刻胶的集成电路半成品进行曝光显影,使所述第一层多晶硅的表面覆盖一层场区光刻胶,所述高压MOS管有源区厚栅氧化层的表面覆盖一层有源区光刻胶,所述场区光刻胶的每个边超出第一层多晶硅对应的边0.5~2.0微米。Expose and develop the photoresist-coated integrated circuit semi-finished product, so that the surface of the first layer of polysilicon is covered with a layer of field-region photoresist, and the surface of the thick gate oxide layer in the active region of the high-voltage MOS transistor is covered with a layer of The photoresist in the source region, each side of the photoresist in the field region exceeds the corresponding side of the first layer of polysilicon by 0.5-2.0 microns. 2.权利要求1所述的集成电路双栅氧的制备方法,其特征在于,对涂覆光刻胶的集成电路半成品进行曝光显影之后,还包括:2. The preparation method of integrated circuit double gate oxide according to claim 1, characterized in that, after exposing and developing the semi-finished integrated circuit product coated with photoresist, further comprising: 刻蚀掉低压MOS管有源区的衬底表面的厚栅氧化层;Etching away the thick gate oxide layer on the substrate surface of the active region of the low-voltage MOS transistor; 去除所述场区光刻胶和所述有源区光刻胶;removing the photoresist in the field region and the photoresist in the active region; 在低压MOS管有源区的衬底表面形成薄栅氧化层;Form a thin gate oxide layer on the substrate surface of the active region of the low-voltage MOS transistor; 在所述薄栅氧化层和高压MOS管有源区厚栅氧化层的表面形成第二层多晶硅。A second layer of polysilicon is formed on the surface of the thin gate oxide layer and the thick gate oxide layer in the active region of the high voltage MOS transistor. 3.如权利要求1所述的集成电路双栅氧的制备方法,其特征在于,所述第一层多晶硅作为高阻和/或多晶硅电容下极板。3. The method for preparing integrated circuit double-gate oxides according to claim 1, wherein the first layer of polysilicon is used as a high-resistance and/or lower plate of a polysilicon capacitor.
CN201210548973.XA 2012-12-17 2012-12-17 A kind of preparation method of integrated circuit Dual Gate Oxide Expired - Fee Related CN103871855B (en)

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