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CN101807533B - 半导体管芯封装及其制作方法 - Google Patents

半导体管芯封装及其制作方法 Download PDF

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Publication number
CN101807533B
CN101807533B CN201010147483.XA CN201010147483A CN101807533B CN 101807533 B CN101807533 B CN 101807533B CN 201010147483 A CN201010147483 A CN 201010147483A CN 101807533 B CN101807533 B CN 101807533B
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CN
China
Prior art keywords
substrate
lead frame
frame structure
moulding material
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201010147483.XA
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English (en)
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CN101807533A (zh
Inventor
O·全
Y·崔
B·H·古伊
M·C·B·伊斯塔西欧
D·钟
T·T·肯恩
S·南
R·约什
C-L·吴
V·伊尔
L·Y·里姆
B-O·李
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Fairchild Semiconductor Corp
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Fairchild Semiconductor Corp
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Publication of CN101807533A publication Critical patent/CN101807533A/zh
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Publication of CN101807533B publication Critical patent/CN101807533B/zh
Expired - Fee Related legal-status Critical Current
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  • Engineering & Computer Science (AREA)
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Perforating, Stamping-Out Or Severing By Means Other Than Cutting (AREA)

Abstract

公开了半导体管芯封装。一种示例性半导体管芯封装包括预模制衬底。该预模制衬底可具有附连到其的半导体，并且可在该半导体管芯上设置包封材料。

Description

半导体管芯封装及其制作方法
本申请是申请日为2006年6月19日，发明名称为“半导体管芯封装及其制作方法”的第200680024215.0号中国专利申请的分案申请。
相关申请的交叉引用
本发明是非临时的，并要求以下美国临时申请的优先权：2005年7月22日提交的60/701,781；2005年6月30日提交的60/696,320；2005年6月30日提交的60/696,027；2005年6月30日提交的60/696,350；2005年7月22日提交的60/702,076；2005年6月30日提交的60/696,305；以及2005年12月21日提交的60/753,040。这些美国临时申请通过引用通用地整体结合于此。
本发明的背景
各种半导体管芯封装是众所周知的。
虽然这些封装是有益的，但是可对它们进行改进。例如，进行上述许多封装是很困难和/或昂贵的。
因此，期望提供经改进的半导体封装、用于制作半导体管芯封装的方法、这些管芯封装的元件、以及使用这些半导体管芯封装的电气组件。可期望以较低的成本来制造这些经改进的半导体管芯封装和/或期望其具有较好的功能。
本发明的概述
本发明的实施例涉及半导体管芯封装、用于制作半导体管芯封装的方法、以及包括该半导体管芯封装的电子组件。
本发明的一个实施例涉及一种方法，包括：获得包括引线框架和模塑材料(moldingmaterial)的预模制衬底(premoldedsubstrate)，其中该引线框架结构包括第一导电部分、第二导电部分以及在该第一导电部分与该第二导电部分之间的中间部分；切割该中间部分以使该第一导电部分与该第二导电部分电隔离；将半导体管芯附连到该衬底；以及将该第一和第二导电部分电耦合到该半导体管芯。
本发明的另一个实施例涉及一种半导体管芯封装，包括：包括引线框架和模塑材料的预模制衬底，其中该引线框架结构包括第一导电部分、第二导电部分以及在该第一导电部分与该第二导电部分之间的腔体；在该预模制衬底上的半导体管芯；以及覆盖该半导体管芯并填充该第一导电部分与该第二导电部分之间的腔体的包封材料。
本发明的另一个实施例涉及一种方法，包括：获得包括第一表面和第二表面的预模制衬底，其中该预模制衬底包括引线框架结构和模塑材料，其中该引线框架结构包括焊盘区，其中该焊盘区的外表面和该模塑材料的外表面基本上共面，并且与该预模制衬底的第二表面重合；以及将至少两个半导体管芯附连到预模塑衬底的第一表面。
本发明的另一个实施例涉及一种半导体管芯封装，包括：包括第一表面和第二表面的预模制衬底，其中该预模制衬底包括引线框架结构和模塑材料，其中该引线框架结构包括焊盘区，其中该焊盘区的外表面和该模塑材料的外表面基本上共面，并且与该预模制衬底的第二表面重合；以及附连到预模塑衬底的第一表面的至少两个半导体管芯。
本发明的另一个实施例涉及一种用于形成半导体管芯封装的方法，该方法包括：形成衬底，其中形成衬底包括：(i)将引线框架结构放置在至少第一模塑管芯与第二模塑管芯之间，(ii)使该引线框架结构与该第一和第二模塑管芯接触，以及(iii)在该引线框架结构周围形成模塑材料；将半导体管芯附连到该衬底；以及将该半导体管芯包封到包封材料中。
本发明的另一个实施例涉及一种半导体管芯封装，包括：衬底，其中形成的衬底包括引线框架结构和模塑材料，其中该衬底形成至少一个凹面结构；以及在该衬底上的半导体管芯。
本发明的另一个实施例涉及一种方法，包括：获得包括引线框架结构和模塑材料的衬底，其中该模塑材料与该引线框架结构的表面基本上共面，并且其中该衬底包括第一管芯附连区和第二管芯附连区；将第一半导体管芯附连到该第一管芯附连区；以及将第二半导体管芯附连到该第二管芯附连区。
本发明的另一个实施例涉及一种半导体管芯封装，包括：包括引线框架结构和模塑材料的衬底，其中该模塑材料与该引线框架结构的表面基本上共面，并且其中该衬底包括第一管芯附连区和第二管芯附连区；在该第一管芯附连区上的第一半导体管芯；以及在该第二管芯附连区上的第二半导体管芯。
本发明的另一个实施例涉及一种用于半导体管芯封装的衬底的制作方法，该方法包括：获得第一引线框架结构和第二引线框架结构；使用粘合层将该第一和第二引线框架结构附连在一起；以及将模塑材料涂敷到该第一引线框架结构、该第二引线框架结构或该粘合层。
本发明的另一个实施例涉及一种半导体管芯封装，包括：包括引线框架和模塑材料的预模制衬底，其中该引线框架结构的外表面和该模塑材料的外表面基本上共面；以及在该预模制衬底上的半导体管芯；附连到该预模制衬底的引线，其中这些引线从该预模制衬底独立地形成。
本发明的另一个实施例涉及一种方法，包括：获得包括导电管芯附连表面的衬底；将包括高压侧晶体管输入的高压侧晶体管附连到该衬底，其中该高压侧晶体管输入被耦合到该导电管芯附连表面；以及将包括低压侧晶体管输出的低压侧晶体管附连到该衬底，其中该低压侧晶体管输入被耦合到该导电管芯附连表面。
本发明的另一个实施例涉及一种半导体管芯封装，包括：包括导电管芯附连表面的衬底；包括高压侧晶体管输入的高压侧晶体管，其中该高压侧晶体管输入被耦合到该导电管芯附连表面；以及包括低压侧晶体管输出的低压侧晶体管，其中该低压侧晶体管输入被耦合到该导电管芯附连表面。
以下详细描述本发明的这些以及其它实施例。
附图的简要描述
图1A-1H示出了根据本发明的实施例在半导体管芯封装的形成期间的元件的横截面视图。
图1I是根据本发明的实施例的半导体管芯封装的仰视图。
图1J是在制造期间衬底的组件的俯视图。
图1K是包括基准凹槽的导轨的侧面横截面视图。
图1L示出了具有切割线的衬底的俯视图。
图2A示出了根据本发明的另一半导体管芯封装的仰视图。
图2B示出了图2A中所示的半导体管芯封装的侧面横截面视图。
图2C示出了根据本发明的实施例的引线框架结构的仰视图。
图2D示出了根据本发明的另一实施例的半导体管芯封装的仰视图。
图2E示出了根据本发明的另一实施例的另一半导体管芯封装的侧面横截面视图。
图3A-3C示出了半导体管芯封装在其被组装时的俯视图。
图3D示出了半导体管芯封装的仰视图。
图3E示出了根据本发明的实施例的衬底的侧面横截面视图。
图4A-4C示出了根据本发明的实施例的另一半导体管芯封装的俯视图。
图4D示出了根据本发明的实施例的衬底的平面仰视图。
图4E示出了根据本发明的实施例的衬底的侧面横截面视图。
图5示出了引线框架结构阵列的立体图。
图6A-6I示出了管芯封装在形成它们时的立体图。
图7A-7C示出了另一半导体管芯封装在其形成时的侧面横截面视图。
图7D示出了使用图7A-7C中所示的工艺形成的半导体管芯封装的立体图。
图8A-8D示出了另一半导体管芯封装在其形成时的侧面横截面图。
图8E示出了使用图8A-8D中所示的工艺形成的半导体管芯封装的立体图。
图9A-9D示出了正在形成的另一半导体管芯封装的横截面视图。
图9E示出了根据本发明的实施例的另一半导体管芯封装的立体图。
图10A-10D示出了另一半导体管芯封装在其形成时的横截面视图。
图10E示出了根据本发明的实施例的另一半导体管芯封装的立体图。
图11A-11D示出了另一半导体管芯封装在其形成时的横截面视图。
图11E示出了导体管芯封装的立体仰视图。
图12A-12D示出了另一半导体管芯封装在其形成时的横截面视图。
图12E示出了图12D中所示的导体管芯封装的仰视立体图。
图13A-13D示出了另一半导体管芯封装在其形成时的横截面视图。
图13E示出了图13D中所示的导体管芯封装的立体仰视图。
图14A-14D示出了另一半导体管芯封装在其形成时的横截面视图。
图14E示出了图14D中所示的导体管芯封装的立体图。
图15A-15D示出了另一半导体管芯封装在其形成时的横截面视图。
图15E示出了图15D中所示的导体管芯封装的立体仰视图。
图16A-16D示出了另一半导体管芯封装在其形成时的横截面视图。
图16E示出了图16D中所示的导体管芯封装的立体仰视图。
图17A-17D示出了另一半导体管芯封装在其形成时的横截面视图。
图17E示出了图17D中所示的导体管芯封装的立体仰视图。
图18A-1是引线框架结构的立体仰视图。
图18A-2是已被部分蚀刻的引线框架结构的立体俯视图。
图18B-1是预模制衬底的立体仰视图。
图18B-2是预模制衬底的立体俯视图。
图18C是其上安装有半导体管芯的预模制衬底的立体仰视图。
图18D是包括预模制衬底的半导体管芯封装的立体俯视图。
图19A是包括安装在其上的半导体管芯的预模制引线框架衬底的立体俯视图。
图19B是示出了图18A中所示的预模制引线框架衬底的立体仰视图。
图20A是根据本发明的实施例的预模制衬底的平面俯视图。
图20B是根据本发明的实施例的预模制衬底的立体俯视图。
图20C是根据本发明的实施例的预模制衬底的侧面横截面视图。
图20D是根据本发明的实施例的预模制衬底的立体仰视图。
图20E是根据本发明的实施例的预模制衬底的平面俯视图。
图20F是根据本发明的实施例的预模制衬底的侧面横截面视图。
图20G是根据本发明的实施例的预模制衬底的立体俯视图。
图20H是根据本发明的实施例的预模制衬底的立体仰视图。
图21A是框架结构的立体仰视图。
图21B和21C是根据本发明的预模制衬底的立体图。
图21D和21E示出了安装在框架中的预模制衬底的立体俯视图。半导体管芯安装在该预模制衬底上。
图21F示出了安装在框架中的预模制衬底的立体仰视图。
图21G示出了安装到框架的预模制衬底的侧视图。
图22A-22D分别示出了根据本发明的实施例的模制管芯封装的侧面横截面视图、背面立体图、立体俯视图和正视图。
图23是与图24C中所示的封装相对应的同步降压(buck)变换器的电路图。
图24A示出了根据本发明的实施例的半导体管芯封装的侧视图。
图24B示出了根据本发明的实施例的半导体管芯封装的平面俯视图。
图24C示出了根据本发明的实施例的半导体管芯封装的立体图。
图24D示出了引线框架结构的立体仰视图。
图24E是根据本发明的实施例的半导体管芯封装的立体侧视图。
图25示出了本发明的另一实施例的侧视图。在此实施例中，模塑材料被沉积在引线框架内，并且使芯片与引线框架结构的导电区隔离。
详细描述
本发明的实施例涉及半导体管芯封装以及用于制作半导体管芯的方法。根据本发明的实施例的半导体管芯封装包括衬底以及安装在该衬底上的半导体管芯。半导体管芯可使用粘合剂或任何其它合适的附连材料来附连到衬底上。在半导体管芯封装中，该半导体管芯的底面和/或顶面可电耦合到衬底的导电区。包封材料可包封半导体管芯。如以下进一步详细描述的，在不同的实施例中，根据本发明的实施例的衬底可具有不同的构造。
衬底可具有任何合适的构造。然而，在本发明的优选实施例中，衬底包括引线框架结构和模塑材料。通常，引线框架结构的至少一个表面基本上与模塑材料的外表面共面。在某些实施例中，引线框架结构的两个相对主表面基本上与衬底中的模塑材料的相对外表面共面。在其它实施例中，引线框架结构的仅一个主表面基本上与模塑材料的外表面共面。
术语“引线框架结构”可指从引线框架获得的结构。引线框架结构可通过例如本领域中公知的冲压工艺来形成。示例性引线框架结构还可通过蚀刻连续导电片以形成预定图案而形成。因而，在本发明的实施例中，半导体管芯封装中的引线框架结构可以是连续金属结构或非连续金属结构。
根据本发明的实施例的引线框架结构最初可以是通过系杆连接在一起的引线框架结构阵列中的许多引线框架结构之一。在制作半导体管芯封装的过程期间，引线框架结构阵列可被切割成彼此独立的各个引线框架结构。作为此切割的结果，最终半导体管芯封装中的引线框架结构的部分(诸如源极引线和栅极引线)可在电和机械上分开。在一个实施例中，当制造根据本发明的实施例的半导体管芯封装时，不使用引线框架结构阵列。
根据本发明的实施例的引线框架结构可包括任何合适的材料、可具有任何合适的形式、以及可具有任何合适的厚度。示例性引线框架结构材料包括诸如铜、铝、金等金属以及其合金。引线框架结构还可包括诸如金、铬、银、钯、镍等的电镀层的电镀层。
根据本发明的实施例的引线框架结构还可具有任何合适的构造。例如，引线框架结构还可具有任何合适的厚度，包括约小于1mm(例如约小于0.5mm)的厚度。另外，引线框架结构可具有形成管芯附连焊盘(DAP)的管芯附连区。引线可远离管芯附连区侧向延伸。它们还可具有与形成管芯附连区的表面共面和/或不共面的表面。例如，在某些例子中，引线可相对于管芯附连区向下弯曲。
如果引线框架结构的引线不侧向向外延伸通过模塑材料，则衬底可被认为是“无引线(leadless)”衬底，并且包含该衬底的封装可被认为是“无引线”封装。如果引线框架结构的引线延伸通过模塑材料，则衬底可以是“带引线(leaded)”衬底，而封装可以是“带引线封装”。
用在衬底中的模塑材料可包括任何合适的材料。合适的模塑材料包括基于联苯的材料和多功能交联环氧树脂复合材料。合适的模塑材料可以液体形式或半固体形式沉积在引线框架结构内，并且之后进行固化以使它们硬化。
安装在衬底上的半导体管芯可包括任何合适的半导体器件。合适的器件可包括垂直器件或水平器件。垂直器件至少在管芯的一侧具有输入，而在管芯的另一侧具有输出，从而电流可垂直流过管芯。水平器件在管芯的一侧具有至少一个输入，而在管芯的同一侧具有至少一个输出，从而电流可水平流过管芯。在2004年12月29日提交的美国专利申请No.11/026,276中也描述了示例性半导体器件，该申请通过引用通用地整体结合于此。
垂直功率晶体管包括VDMOS晶体管和垂直双极性晶体管。VDMOS晶体管是具有通过扩散形成的两个或多个半导体区的MOSFET。它具有源区、漏区、和栅极。器件是垂直的，因为源区和漏区出于半导体管芯的相对表面上。栅极可以是沟道栅结构或平面栅结构，并且与源区形成于同一表面上。沟道栅结构是较佳的，因为沟道栅结构较窄，并且占据比平面栅结构小的空间。在工作期间，VDMOS器件中从源区到漏区的电流基本上与管芯表面垂直。
包封材料可用于包封半导体管芯。包封材料可包括与先前所述的模塑材料相同或不同类型的材料。在一个实施例中，包封材料覆盖或至少部分地覆盖衬底以及衬底上的一个或多个半导体管芯。包封材料可用于保护一个或多个半导体管芯免受由于曝露于周围环境而导致的潜在损坏。
任何合适的工艺可用于包封半导体管芯和/或支承半导体管芯的衬底。例如，半导体管芯和衬底可被置于模塑管芯中，而包封材料可围绕半导体管芯和/或衬底形成。对于本领域普通技术人员而言，具体模塑条件是众所周知的。
I.包括具有切割隔离区的衬底的管芯封装
随着微引线封装(MLP)元件的特征尺寸变得越来越小，设计受到了蚀刻或半蚀刻框架技术的金属对金属间隙和尺寸容限能力的限制。本发明的实施例公开了能够容纳用于外露焊盘的两行的预模制框架布置。与相同数量的引线的单行MLP相比，双行MLP具有较小的封装尺寸。在本发明的实施例中，对引线框架结构进行预模制，然后将其分割以隔离两个导电焊盘。
本发明的一个实施例涉及一种方法，包括获得包括引线框架和模塑材料的预模制衬底，其中该引线框架结构包括第一导电部分、第二导电部分以及在该第一导电部分与该第二导电部分之间的中间部分。衬底中的模塑材料的厚度基本上等于引线框架的厚度。例如，模塑材料的厚度可基本上等于第一导电部分和/或第二导电部分的厚度。
然后，切割中间部分以使第一导电部分与第二导电部分电隔离。第一和第二导电部分可在管芯封装中形成不同的端子。例如，第一和第二导电部分可选自下组：栅极引线、源极引线和漏极引线，其中第一和第二导电部分可以不同。多组第一和第二导电部分可形成导电区的行。
在切割了引线框架结构之后，将至少一个半导体管芯附连到衬底上。合适的粘合剂或焊料可用于将半导体管芯附连到衬底上。半导体管芯可以是上述类型。例如，引线框架结构可以是包括功率MOSFET的半导体管芯。
在将半导体管芯附连到衬底上之后，半导体管芯可电耦合到第一和第二导电部分。例如，半导体管芯以及第一和第二导电部分可被引线接合在一起。或者，导电接线柱可用于将半导体管芯电耦合到第一和第二导电部分。
在将半导体管芯电耦合到预模制衬底中的第一和第二部分之后，包封材料可被沉积到半导体管芯上以对其进行包封。该包封材料可以是与上述模塑材料相同或不同的材料。
所形成的半导体管芯封装可具有不延伸通过模塑材料的外表面的引线。在某些实施例中，所形成的半导体管芯封装可被称为“微引线封装”或MLP封装。
可参照附图1A-1L描述示例性方法和管芯封装。
图1A示出了根据本发明的实施例的引线框架结构14。此示例中的引线框架结构14不带管芯附连焊盘(DAP)。如以下将说明的，包括引线框架结构14的衬底将具有由模塑材料形成的管芯附连区。引线框架结构14具有与该引线结构14的第二表面14(f)相对的第一表面14(e)。
引线框架结构14包括第一导电部分14(a)、第二导电部分14(b)和在该第二导电部分14(a)与该第二导电部分14(b)之间的中间部分14(c)。如所示，第一和第二导电部分14(a)、14(b)的厚度大致相同，但是中间部分14(c)的厚度小于第一和第二导电部分14(a)、14(b)的厚度。作为这些不同厚度的结果，间隙16由第一导电部分14(a)、第二导电部分14(b)以及中间部分14(c)来限定。
引线框架14可使用任何合适的工艺来形成。例如，引线框架结构14可使用光刻胶和蚀刻工艺、或者冲压工艺来形成。这些工艺和其它工艺对于本领域普通技术人员是众所周知的。例如，图1A中所示的间隙16可使用众所周知的光刻和蚀刻工艺来形成。在示例性光刻和蚀刻工艺中，可使用一层光刻胶来覆盖裸金属结构(未示出)。可对该层光刻胶成像并显影。金属结构的外露部分可使用湿法蚀刻和干法蚀刻工艺来蚀刻。腔体16可使用湿法或干法蚀刻工艺来形成。
如图1A中所示，在形成引线框架结构14之后，可将一片带12附连到引线框架结构14的第一表面14(a)上。该片带12覆盖引线框架结构14的第一表面14(e)，从而用于形成衬底的模塑材料不覆盖该第一表面14(e)。
如图1B中所示，在将带12附连到引线框架结构14的第一表面14(e)之后，诸如环氧模塑材料的模塑材料18可在引线框架结构14上沉积并固化。模塑材料18填充引线框架结构14的间隙16以及各个第一和第二导电部分14(a)、14(b)之间的空隙。可移除多余的模塑材料，使得第二表面14(f)不被模塑材料覆盖。然而，在此示例中，使用模塑材料18来填充引线框架结构14的第一和第二表面14(e)、14(f)之间的区域。
如图1B中所示，模塑材料18的外表面18(a)可基本上与第一和第二导电部分14(a)、14(b)的外表面14(a)-1、14(b)-1共面。如所示，模塑材料18在特定位置处的厚度基本上等于第一和第二导电部分14(a)、14(b)的厚度。
如图1C中所示，在模塑之后，第一切割元件20切割引线框架结构14的中间部分14(c)，由此在衬底22中形成一个或多个腔体24。该一个或多个腔体24可延伸穿过整个中间部分14(c)，并且可部分延伸到模塑材料18中。腔体24可形成为通过衬底22的厚度的一半厚度(或更少)。通过切割中间部分14(c)，第一和第二导电部分14(a)、14(b)可彼此电隔离或机械隔离。如将在以下详细描述的，被隔离的第一和第二导电部分14(a)、14(b)可在之后用作在所得的半导体管芯封装中的分离的电端子(例如，电接合焊盘)。
任何合适的第一切割元件20可用于切割中间部分14(c)。例如，第一切割元件20可以是水射流(water.jet)、锯子、蚀刻材料或激光器。
如图1D中所示，在切割之后，形成预模制衬底22。衬底22具有在其中执行切割的腔体24。腔体24将第一和第二导电区14(a)、14(b)分开，使得它们彼此机械和电隔离。
所形成的预模制衬底22可具有或可不具有延伸通过模塑材料18的侧向边缘的引线。在具体的衬底22中，引线框架结构14的引线对应于第一和第二导电区14(a)、14(b)。在其它实施例中，衬底22可具有侧向延伸到引线框架结构14的侧向边缘的引线，并且可向下弯曲或不弯曲来形成端子连接。
如图1E中所述，然后，可将一个或多个半导体管芯25安装到衬底22上。衬底22可包括第一表面22(a)以及与该第一表面22(a)相对的第二表面22(b)。在此示例中，存在直接安装在模塑材料18上的至少两个半导体管芯25。如果要形成多个半导体管芯封装，则可将多个半导体管芯25安装到衬底22上。如以下所说明的，可形成接合的封装，并且可在单立工艺中最后彼此分离。
任何合适的材料可用于将一个或多个半导体管芯25安装到衬底22上。例如，焊料或者导电或不导电粘合剂可用于将一个或多个半导体管芯25安装到衬底22上。合适的粘合剂包括经填充或未填充的环氧粘合剂。
可将一个或多个半导体管芯25安装到衬底22上的任何合适的位置。如图1E中所示，将一个或多个半导体管芯25安装到诸如模塑材料18之类的绝缘材料。在其它实施例中，引线框架结构14可包括一个或多个导电管芯附连焊盘(未示出)，并且一个或多个半导体管芯25可被安装到一个或多个管芯附连焊盘。
半导体管芯25可以是上述半导体管芯的任一种。例如，每个管芯25可具有第一表面25(a)和第二表面25(b)，其中该第二表面25(b)比该第一表面25(a)更靠近衬底22。在一些实施例中，第一表面25(a)可具有源极端子、栅极端子和漏极端子，而第二表面25(b)不具有任何端子。在其它的实施例中，第一表面25(a)可具有源极和/或栅极端子，而第二表面25(b)可具有漏极端子(或相反)。在此情况中，一个或多个半导体管芯25可被安装到导电管芯附连焊盘(未示出)而非模塑材料18。
在安装了一个或多个半导体管芯25之后，可将导线30附连到(以及由此进行电耦合)半导体管芯25的第一表面25(a)处的电端子，以及第一和第二导电部分14(a)、14(b)上。导线30可另外称为“引线接合(wirebond)”。这些导线可由诸如金、银、铂等的贵金属构成，或者可包括诸如铜、铝等的过渡金属。在某些实施例中，导线可以是涂敷导线(例如，使用诸如金或铂的贵金属涂敷的铜线)。可选地或另外，导电接线柱可用于将半导体管芯25的第一表面25(a)处的电端子耦合到第一和第二导电部分14(a)、14(b)。
参看图1F，然后，包封材料32可被沉积在衬底22的第一表面22(a)以及在衬底22的第一表面22(a)上安装的半导体管芯25上。包封材料32填充预先形成于衬底22中的间隙24。通过包封材料32填充衬底22中的腔体24有益地将包封材料32“锁到”衬底22。还可模塑包封材料32，使得它不延伸通过衬底22的侧边缘。
参看图1G，在沉积了包封材料32之后，第二切割元件42(与上述第一切割元件20相同或不同)可用于使所形成的封装40(a)、40(b)彼此分隔开。第二切割元件42可切穿包封材料32和衬底22。可将此工艺称为“单立”。
图1H示出了在单立之后根据本发明的实施例的半导体管芯封装40(a)的侧面横截面视图。如图1H中所示，在封装40(a)之后，包封材料32的侧面可与衬底22的侧面同样宽。包封材料32还覆盖半导体管芯25以及导线30。第一和第二导电部分14(a)、14(b)彼此电隔离，并且在封装40(a)的底部形成电端子。
如图1I中所示，第一和第二导电部分14(a)、14(b)可在封装40(a)的底部形成电端子。与第一和第二导电部分14(a)、14(b)相对应的这些端子可对应于印刷电路板(未示出)上的导电焊区。
图1I中所示的半导体管芯封装40(a)可容易地安装到印刷电路板(未示出)以形成电组件。可将焊料沉积在第一和第二导电部分14(a)、14(b)的外露表面上，以及电路板上的相应导电焊区上。然后，可类似于倒装芯片(flipchip)将半导体管芯封装40(a)安装到电路板上。
图1J示出了在封装形成工艺期间可夹持许多衬底22的导轨结构50。导轨结构50包括许多切割基准凹槽50(a)。凹槽50(a)可用于帮助引导前述的第一切割元件20，从而可在切割第一和第二导电部分之间的中间部分之前确定最佳的切割深度。在某些情况中，凹槽50(a)可称为“锯道基准(sawstreetreference)”。
图1K示出了导轨50中的基准凹槽50(a)的侧视图。如所示，凹槽50(a)延伸通过框架结构50的厚度的一部分。
图1L示出了水平和垂直切割线。这些线62定义了当第一切割元件对隔离衬底22中的引线框架结构的第一和第二导电部分的中间部分进行切割时用于第一切割元件的切割通道。
当通过切割线执行切割时，例如锯片可仅切穿导轨结构50的一部分，从而它们可保持完整，并且可进一步处理各个衬底22。作为使用锯子和基准凹槽50(a)的替代方案，可使用激光来切割前述存在于第一和第二导电部分之间的中间部分。在不使用基准凹槽的情况下，激光束可用于具体地切割中间部分。
上述实施例具有大量优点。如上所述，通过在引线框架结构的第一和第二导电部分之间提供腔体以及然后使用包封材料对其进行填充，包封材料可“锁定”到预模制衬底。这有助于确保所形成的管芯封装是坚固且稳固的。而且，具有多个电端子的管芯封装可使用本发明的实施例来快速且有效地形成。另外，本发明的实施例可形成具有最小化封装尺寸的MLP封装的至少两行，并且不外露管芯附连焊盘(DAP)。
在参照图1A-1L描述的实施例中，半导体管芯在由引线的端子部分定义是区域的内部。在本发明的其它实施例中，可能提供具有一种籍此半导体管芯与引线的一部分重叠的构造的半导体管芯封装。此类半导体管芯封装还可以是双行MLP封装。经改进的双行MLP封装允许在不牺牲热性能的情况下，在给定的同一封装尺寸上具有较大的引脚数量。在不牺牲热性能的情况下，该改进的双行MLP封装还小于具有相同数量引脚的可比较封装。参照图2A-2E描述这些附加实施例。
图2A示出了根据本发明的实施例的半导体管芯封装700的仰视图。半导体管芯封装700包括引线框架结构720，该结构包括多个内部第一导电部分702(a)和多个外部第二导电部分702(b)。如所示，第二导电部分702(b)围绕第一导电部分702(a)。与先前实施例中的一样，模塑材料704形成具有引线框架结构720的衬底721。模塑材料704的外表面基本上与引线框架结构720的第一和第二导电部分702(a)、702(b)的外表面共面。
图2B中示出了半导体管芯封装700的侧面横截面视图。图2B是沿图2A线2B-2B的横截面视图。半导体管芯封装700包括使用诸如焊料或不导电粘合剂之类的管芯附连材料712安装在衬底721上的半导体管芯710。在此示例中，半导体管芯710的底部并不电耦合到第一导电内部部分70(a)。与以上实施例中的一样，衬底721包括模塑材料704和引线框架720，并具有形成于衬底721中的空腔703。腔体703处于各个第一和第二导电部分702(a)、702(b)之间，并且通过切割引线框架结构720处于第一和第二导电部分702(a)、702(b)之间的中间部分来形成。在以上图1C和1D中描述了切割工艺，并且这里可使用上述切割工艺的任一种。
然后，可执行包括管芯附连、引线接合、包封和单立的工艺步骤。以上参照图1E到1H描述了这些工艺步骤。这些描述被结合于此。
与图1G中所示的前述封装不同，在此实施例中，半导体管芯710被安装到衬底721上，从而它在内部的第一导电部分702(a)以及引线框架结构720的已蚀刻部分720(a)之上或者与它们重叠。导线711将半导体管芯710电耦合到达第一和第二导电部分702(a)、702(b)的顶面。
图2C是用在衬底721中的引线框架结构720的仰视图。如所示，在蚀刻之后形成第一和第二导电部分702(a)、702(b)。中间部分702(c)处于第一和第二导电部分702(a)、702(b)之间。第一和第二导电部分702(a)、702(b)以及该第一和第二导电部分702(a)、702(b)之间的中间部分702(c)可一起形成间隙。如上所述，最后切割中间部分702(c)，并且使用包封材料来对其进行填充。引线框架结构720还包括已蚀刻区720(a)，从引线框架结构720移除该已蚀刻区中的材料。
图2D示出了根据本发明的另一实施例的半导体管芯封装730的仰视图。与先前的实施例一样，半导体管芯封装730包括引线框架结构740和模塑材料746。这些元件可一起形成衬底741。引线框架结构740包括：中央部分736，该部分可包括包含管芯附连焊盘(DAP)的管芯附连区；以及内部第一导电部分732(a)和外部第二导电部分732(b)。第二导电部分732(b)可围绕内部第一导电部分732(a)，并且第一和第二导电部分732(a)、732(b)可如上所述地彼此电隔离。
如图2E中所示，使用管芯附连材料等将半导体管芯752安装到中央部分736的管芯附连区。半导体管芯752与许多第一导电部分732(a)以及中央部分736重叠。多个第二导电部分732(b)中的每一个第二导电部分与多个第一导电部分732(b)中相应的第一导电部分电隔离。图2E是沿图2D中的线2E-2E的横截面视图。为了清晰起见，从图2E中略去了前述导线。
参照图2A-2E所述的实施例具有大量优点。本发明的实施例允许较大的引脚数量而不牺牲热性能。在不牺牲热性能的情况下，本发明的实施例可另外小于具有较少引脚数的可比较封装。例如，小封装可使用这些实施例来形成，即使用在封装中的管芯相对较大。在不增加封装的尺寸的情况下，其它设计无法将较大的半导体管芯结合到封装中。这是因为在其它设计中，半导体管芯被设置在可比较尺寸的DAP(管芯封装焊盘)上。然而，在上述实施例中，半导体管芯可具有大于DAP的侧向尺寸，或者可完全不具有DAP，同时与引线框架结构的导电部分(引线)的至少一些重叠。热性能未被牺牲而是可得到改进，因为消散的热量不仅通过DAP，而且通过引线框架结构的引线(导电部分)。
表1示出与以上在图1A-1L中所述的特定实施例(实施例1)相比，由参照图2A-2E所述的特定实施例提供的优点。如表1中所述的，参照图2A-2E具体描述的实施例(实施例2)可较小、可具有更大的引脚数量、以及可具有比图1A-1L中具体描述的实施例更好的热性质。
II.包括多个半导体管芯的管芯封装
随着微引线(MLP封装)封装元件的特征尺寸变得越来越小，设计受到了蚀刻或半蚀刻框技术的金属对金属间隙和尺寸容限能力的限制。这导致引入凸点芯片载体(BCC)技术，该技术当前不提供任何布置限制，但是通常可使用湿蚀刻工艺。使用湿蚀刻并非优选。
本发明的实施例使用结合了引线框架结构的预模制衬底。衬底可容纳多个半导体管芯。通常，多芯片封装需要使用专用衬底布置。专用衬底布置通常对于该具体多芯片封装是特定的。本发明的实施例能够通过使同一预模制衬底设计能够再次用于容纳多个半导体管芯布置来消除这种限制。外露焊盘布置也可用于提高本发明的实施例中的半导体管芯封装的热性能。其它布置概念包括半导体管芯封装提供通向半导体管芯的漏极接点的能力(例如，如果半导体管芯包括垂直功率MOSFET)。
在本发明的一个实施例中，获得了包括第一表面和第二表面的预模制结构。预模制衬底包括引线框架结构和模塑材料。引线框架结构包括焊盘区。焊盘区的外表面和模塑材料的外表面基本上共面，并且与预模制衬底的第二表面重合。至少两个半导体管芯被附连到衬底。较佳地，至少两个半导体管芯被附连到衬底的模塑材料，并且使用接合导电和/或导电接线柱连接到衬底的侧向边缘。
图3A到3E示出了包括预模制衬底和多个半导体管芯的半导体管芯封装的形成中的步骤。
图3A示出了根据本发明的实施例的预模制衬底100的俯视图。预模制衬底100包括模塑材料102和引线框架结构104。至少模塑材料102的外表面和引线框架结构104的外表面基本上共面。引线框架结构104包括多根引线104(a)，这些引线处于100衬底的外侧向边缘上并在其上结束。在此示例中，引线104(a)存在于衬底100的四个侧面边缘的每一个上，并且外露穿过过但不延伸通过模塑材料102。引线104(a)的外表面可基本上与模塑材料102的外表面共面。
如图3A中的虚线所示，引线框架结构104包括在引线104(a)内的下沉(downset)中央区。下沉中央区可通过部分蚀刻工艺来形成。下沉中央区的顶面使用模塑材料102来覆盖。
模塑材料102的顶面可形成其中可安装两个或多个半导体管芯(未示出)的管芯附连区100(a)。因为在所示实施例中，模塑材料102的顶面用作管芯附连区106，并且没有导电管芯附连焊盘用作安装表面，所以预模制衬底100可支承多个半导体管芯而无需这些管芯处于特定布置。可使用若干多管芯构造而无需改变外部引线布置。
参看图3B，在形成衬底之后，将半导体管芯110、112、114安装在衬底100的管芯附连区106。不导电(或导电)粘合剂可用于将半导体管芯110、112、114附连到管芯附连区106。半导体管芯可以是上述半导体管芯的任一种。有益地，管芯110、112、114可以任何合适的排列设置在衬底100的模塑材料102上。
参看图3C，在将半导体管芯110、112、114安装在衬底100之后，半导体管芯110、112、114的顶面可电耦合到引线104(a)以形成半导体管芯封装121。可在半导体管芯110、112、114以及用于将引线104(a)耦合到半导体管芯110、112、114的顶面上的任何导电结构(例如，导线、接线柱等)上按需沉积任选的包封材料并使其固化。
图3C具体地示出了将半导体管芯110、112、114顶面上的电端子(未示出)耦合到引线框架结构104的侧向引线104(a)。引线接合118可通过引线接合工艺来形成，该工艺在本领域中是众所周知的。作为替代方案，导电接线柱和焊料可用于将半导体管芯110、112、114的顶面上的电端子耦合到引线104(a)。
图3D示出了衬底100的仰视图。衬底100的底面和引线框架结构104包括与管芯附连区106相对的焊盘区104(b)。焊盘区104(b)是较大的，并且占据衬底100的第二表面100(b)的主部分，并且相对于衬底100的边缘处的引线104(a)下沉。在此示例中，外露焊盘区104(b)可占据衬底100的侧向面积的至少约50％。较大的焊盘区104(b)提供了的具有良好的热转移特性的所形成封装，因为引线框架结构104的较大的焊盘区104(b)用作散热片。
图3E示出了沿图3A中的线3E-3E的衬底100的侧面横截面视图。焊盘区104(b)具有占据了衬底100的底面的基本部分的外表面104(b)-1。焊盘区104(b)的外表面104(b)-1外露并基本上与衬底100中的模塑材料的外表面102(a)共面。在此示例中，模塑材料102使半导体管芯110、112、114与焊盘区104(b)电隔离。外露焊盘区104(b)可按需焊接到电路板(未示出)以提供从半导体管芯110、112、114到电路板的热通道。
如图3E中所示，引线104(a)的厚度基本上等于模塑材料102的最大厚度。另外，在衬底100中，引线框架结构104的焊盘区104(b)的内表面由模塑材料102覆盖。模塑材料102的厚度为“T”，并且在此示例中，厚度T与焊盘区104(b)的厚度的组合等于衬底100的厚度。
参照图3A-3E描述的实施例具有大量优点。首先，较大的外露焊盘区104(b)通过提供从半导体管芯道110、112、114开始的较大的导热通道来改进了所形成的半导体管芯封装的热性能。另外，衬底100的较大管芯附连区106不具有导电焊盘，从而可在封装中提供各个多管芯布置，即使仅使用一个衬底设计。
图4A-4F示出了用于形成本发明的另一实施例的工艺。
图4A示出了根据本发明的实施例的另一预模制衬底100。衬底100包括：包含焊盘区104(b)和引线104(a)的引线框架结构104；以及模塑材102。预模制衬底100的顶面100(a)上的管芯附连区106可包括焊盘区104(b)的表面，并且可支承大量半导体管芯(未示出)。图4B中的虚线示出了引线框架结构104的轮廓，并且引线框架104可通过部分蚀刻工艺来形成。
与以上参照图3A所述的衬底100不同，在此示例中，焊盘区104(b)具有与衬底100的相对表面共面的相对表面。在此实施例中，管芯附连区106包括焊盘区104(b)的外表面和模塑材料102的外表面。
在此示例中，焊盘区104(b)延伸通过衬底100的整个厚度，并且可向焊盘区104(b)上的半导体管芯(未示出)提供通过衬底100并到达底层电路板(未示出)的导电和/或热通道。在某些实施例中，焊盘区104(b)可电耦合到半导体管芯(未在图4A中示出)中的电子器件的输入和输出端子。例如，焊盘区104(b)可电耦合到半导体管芯中的MOSFET的漏区。
如图4B中所示，可将大量半导体管芯110、112、114设置在管芯附连区106上。可将半导体管芯之一-半导体管芯112-附连到焊盘区104(b)，同时可将其它半导体管芯110、114附连到模塑材料102。半导体管芯112可以是诸如垂直MOSFET之类的垂直器件。如上所述，这种垂直器件在管芯的一个表面上具有输入，而在管芯的另一相对面上具有输出。其它半导体管芯110、114可包括水平器件。如上所述，水平器件在管芯的同一表面上具有输入和输出。
参看图4C，在将半导体管芯110、112、114安装到衬底100上后，可形成大量引线接合118以将引线104(a)连接到半导体管芯110、112、114的顶面。然后，形成半导体管芯封装121。
图4D示出了衬底100的仰视图。如图4D中所示，焊盘区104(b)在衬底100的底面100(b)上的外露表面大于焊盘区104(b)在衬底100的顶面100(a)上的外露表面。在其它实施例中，焊盘区104(b)在衬底100的顶面100(a)上的外露表面的尺寸可大于或等于焊盘区104(b)在衬底100的底面100(b)上的外露表面。
图4E示出了图4A中所示的衬底100的侧视图。如图4E中所示，焊盘区104(b)的第一和第二相对表面104(b)-1、104(b)-2基本上与模塑材料102的外表面共面。模塑材料102在焊盘区104(b)的已蚀刻部分的厚度可为“T”。因而，模塑材料102在某些位置的厚度可等于衬底100的厚度，而在其它位置的厚度可为“T”。
参照图4A-4E所述的实施例具有大量优点。首先，较大的外露焊盘区104(b)通过提供从半导体管芯110、112、114起的较大的热导电通道来改进所形成的半导体管芯封装的热性能。另外，衬底100的较大的管芯附连区106可用作安装在衬底100上的一个或多个半导体管芯的导电和热通道。
如图3A-3E和4A-4E中所示的实施例具有除上述那些之外的其它优点。首先，因为DAP并非必需的，所以可使用许多不同的半导体管芯构造而无需改变外部引线构造。可减小衬底上的管芯之间的空隙，因为DAP并非必需的，由此提供了更紧凑的封装。第二，因为DAP并非必需的，所以在加工期间，不需要用于连接到DAP的系杆。这可简化加工。第三，可最大化由与根据本发明的实施例的衬底中的外露焊盘相关联的面积所占据的面积。如上所述，外露焊盘可基本上占据支承半导体管芯的整个背面。第四，如上所述，引线框架结构可在衬底中具有外露表面，该表面用以连接到在衬底上安装的半导体管芯中的电器件中的漏极或其它端子。可实现上述，同时最大化衬底上的相对侧面处的外露焊盘面积，该衬底最后被焊接到适当的电路板。
III.使用冲压引线框架结构制造半导体管芯封装的方法
上述某些预模制衬底实施例使用经蚀刻引线框架结构(例如，参照图1A-1H所述的实施例)并使用昂贵的盖带来形成。使用经蚀刻引线框架和盖带是昂贵的。在制造工艺中，带是相对昂贵的元件，并且带包装和蚀刻工艺增加了制造时间、复杂度以及预模制衬底的成本。可期望提供用于形成不依赖于使用盖带或经蚀刻引线框架结构的使用的预模制衬底。
为了解决这些问题，本发明的实施例可使用冲压引线框架结构装置来形成预模制衬底。不需要盖带和经蚀刻的引线框架来形成预模制衬底，从而所制成的最终封装比使用经蚀刻引线框架和盖带形成的封装便宜。由于使用本发明的实施例实现的处理效能，根据本发明的实施例所制成的所得半导体管芯封装的成本可比使用预模制衬底和经蚀刻引线框架结构的可比较半导体管芯封装约少42％。
除了解决上述问题，还可期望其改进包括预模制衬底的半导体管芯封装的热性能。在本发明的实施例中，热性能是良好的，因为热量可从半导体管芯传送到引线框架结构的引线。
在某些情形中，还可期望增加用于将半导体管芯封装附连到电路板的焊点的面积。使用本发明的实施例，可在衬底中形成凹面结构。使用凹面结构，增加焊点的尺寸是可能的，并且可保护外露焊盘免受可能的电气短路。这将在以下进一步详细说明。
本发明的实施例还可使用采用了不导电粘合剂或焊料凸点和回流工艺的倒装芯片附连方法。引线框架结构设计是相对简单的，并且还可能对给定封装尺寸增加引脚数量。还可能在半导体管芯封装中使用较大的管芯，因为在本发明的实施例中，无需DAP(管芯附连焊盘)。
在一个实施例中，该方法包括形成预模制衬底。形成预模制衬底的步骤包括：(i)将引线框架结构放置在至少第一模塑管芯与第二模塑管芯之间，(ii)使引线框架结构与该第一和第二模塑管芯接触，以及(iii)围绕该引线框架结构形成模塑材料。引线框架结构可以是非蚀刻的引线框架结构，而第一和第二模塑管芯可形成模塑装置或工具的一部分。在形成预模制衬底之后，将半导体管芯附连到预模制衬底。引线接合、导电接线柱、焊料结构(例如，焊球)等可用于将半导体管芯电耦合到预模制衬底中的引线。在将半导体管芯电或机械地耦合到预模制衬底之后，就将半导体管芯包封在包封材料中以形成半导体管芯封装。包封材料可与前述模塑材料相同或不同。例如，该包封材料可与前述模塑材料不同以改进所形成的管芯封装的热性能并减小制造成本。
在特定实施例中，用于形成半导体管芯封装的方法使用以下工艺：a)第一模塑工艺，用于形成预模制衬底；b)衬底清洗工艺，该工艺使用等离子体、激光或化学蚀刻和/或去毛刺(deflash)工艺；c)管芯附连工艺；d)等离子清洗工艺；e)引线接合工艺；e)第二模塑或包封工艺；以及f)单立工艺。将在以下进一步描述这些工艺的每一个。
图5示出了包括大量经联结的引线框架结构200的引线框架结构阵列201。引线框架结构阵列201中的每个引线框架结构200包括未切引线200(b)和主区200(a)。未切引线200(b)在主区200(a)的相对侧上延伸。引线框架结构阵列201中的引线框架结构200将最终被用在单个半导体管芯封装中并且最终将彼此分隔开。引线框架结构200和引线框架结构阵列201可具有任一个上述引线框架结构的任一个特性或特征。
图6A示出了在铸模工具202中形成模制引线框架结构阵列206之后的该模制引线框架结构阵列206的立体图。铸模工具202包括第一模塑管芯202(a)和第二模塑管芯202(b)。可在铸模工具202中设置用于引入未固化模塑材料的进口以及用于过量模塑材料的流体出口。在某些情形中，还可设置加热元件(未示出)以加热模塑材料，从而使其可流动。通常，铸模工具在本领域中是众所周知的。
为了形成模制引线框架结构阵列206，可将前述引线框架结构阵列201插入第一和第二模塑管芯202(a)、202(b)之间。围绕引线框架阵列结构200形成模塑材料204并使其固化，以形成模制引线框架结构阵列206。模塑材料204外露引线200(b)和主区200(a)的外表面。围绕每个主区200(a)可呈现略为升高的缘结构204(a)。模塑材料204和引线框架结构阵列200中的引线框架结构的外表面基本上彼此共面。
铸模工具202具有两个模塑管芯202(a)、202(b)，这些管芯可具有适当构造以按期望方式对模塑材料204成形。上铸模202(b)可具有与主区200(a)、未切引线200(b)的表面以及不应当用模塑材料覆盖的任何其它表面直接接触的表面。通过使用模塑管芯202(a)、202(b)，在形成预模制衬底时，无需使用昂贵的盖带或经蚀刻的引线框架结构。这降低了预模制衬底的成本，并由此降低了由该预模制衬底形成的半导体管芯的成本。这还减小了形成预模制衬底的模制部分的所需的步骤的数量，因而节省了加工时间和花费。最后，使用模塑管芯202(a)、202(b)，可能围绕主区200(a)形成模塑材料的缘，由此形成凹面结构。
如图6B中所示，清洗工艺可用于增加包封材料到模塑材料204和外露引线200(b)的粘合力。可使用任何合适的清洗工艺。例如，可使用等离子体清洗工艺、激光清洗工艺、化学蚀刻工艺、机械去毛刺工艺等。合适的清洗工艺参数可由本领域技术人员来确定。图6B具体示出了当其清洗模制引线框架阵列206的上表面的清洗装置216。
如图6C中所示，在使用清洗装置216对模制引线框架阵列206进行了清洗之后，可使用粘合剂沉积装置217来将粘合剂218(或焊料等)沉积在主区200(a)的外表面上。粘合剂218可包括任何合适的可购买的粘合剂，包括环氧粘合剂。粘合剂218可以是填充或未填充的，并且可包括或可不包括导电材料。
如图6D中所示，在主区208(a)上沉积了粘合剂218之后，将一个或多个半导体管芯226安装到主区200(a)上。电耦合到每个主区200(a)的半导体管芯226可被设置在引线200(b)上或可与其重叠。然而，由于存在模塑材料204(a)的缘，所以半导体管芯226可与引线200(b)电隔离。因为半导体管芯226实际上可位于引线200(b)的一部分之上，所以半导体管芯226的尺寸并不限于主区200(a)的尺寸。这允许将较大的半导体管芯结合到根据本发明的实施例的半导体管芯封装。
而且如图6D中所示，然后可在半导体管芯226和引线200(b)的顶侧的电端子之间形成引线接合228。在其它实施例中，作为引线接合228的替代，可使用导电接线柱来将引线200(b)电和机械耦合到半导体管芯226的上表面。
如图6E中所示，然后使用包封材料230来对所得组件进行过模制(overmold)以形成过模制组件(overmoldedassembly)232。图6E示出了过模制组件232的立体俯视图。
任何合适的模塑工艺可用于形成过模制组件232。例如，具有模塑管芯的模塑工具可用于形成过模制组件。如先前的实施例，包封材料230可与用于在半导体管芯封装中形成预模制衬底的模塑材料相同或不同。
图6F示出了图6F中所示的过模制组件232的相对侧面的立体仰视图。如所示，模塑材料可存在围绕引线框架结构的主区208(a)的底面的第二缘204(b)。如以下将进一步详细描述的，这些可形成凹面结构。
图6G示出了当使用激光238或其它合适标记元件来作标记时的包括模塑材料230的过模制组件232。过模制组件232包括大量经联结的半导体管芯封装。在进行作标记之后，这些经联结的封装可使用适当的切割元件(未示出)来进行单立以使所形成的封装彼此分隔开。合适的切割元件包括激光器、锯子、穿孔装置等。
图6H示出了所形成封装246的立体俯视图，而图6I示出了所形成封装246的立体仰视图。如图6I中所示，主区208(b)的第二缘204(b)和外露表面可形成凹面结构。该凹面结构可包含焊料(未示出)并可将其翻转，然后将其安装到印刷电路板。凹面结构可用于将焊料限制在特定位置，并且模塑材料的第二缘204(b)可在附连到主区204(b)的焊料与引线200(b)之间形成壁垒。如所示，引线200(b)的侧向边缘基本上共面，并且不延伸通过模塑材料204的侧向表面。引线200(b)的底面也基本上与引线200(b)之间的模塑材料204的表面共面。
图7A-7D示出了半导体管芯封装在其被加工时的侧视图。图7A-7D中所示的方法类似于图6A-6I中所示的工艺。
图7A示出了包括第一表面302(a)和与该第一表面302(a)相对的第二表面302(b)的引线框架结构302。在此示例中，引线框架结构302具有存在于引线305与引线框架结构302的主中央部分333之间的大量间隔303。主中央部分333存在于多组引线305之间。引线框架结构302可具有与上述引线框架结构相同或不同的特性。例如，引线框架结构302可包括诸如铜之类的材料，并可被电镀。
图7B示出了已在其上形成模塑材料302之后的引线框架结构302。这可包括第一模塑工艺。之后形成预模制衬底301。模塑材料302具有两个部分304(a)、304(b)，它们可形成模塑材料304的缘。如图7B中所示，凹面结构307由模塑材料部分304(a)、304(b)以及引线框架结构的主中央部分333的底面形成。
如图7C中所示，在形成预模制衬底301之后，使用粘合剂308将半导体管芯310附连到预模制衬底301，该粘合剂可包括导电或不导电粘合剂、焊料等。半导体管芯310可包括如上所述的水平或垂直器件。如果存在垂直器件，则粘合剂308可以是导电的，从而电流可通过或从管芯310的底面流到粘合剂308、引线框架结构302的主中央部分333以及到电路板(未示出)上的适当焊盘。
然后，在引线框架结构302的引线305与半导体管芯310的上表面处的电端子(未示出)之间形成引线接合314。半导体管芯310的上表面离开预模制衬底301的距离比半导体管芯310的相对面远。然后，在半导体管芯310和引线接合314上形成包封材料318。如图7C中所示，包封材料318的侧向表面可与引线框架302的引线305的侧向表面共面。
在图7D中示出了所得半导体管芯封装330的立体仰视图。半导体管芯封装330包括包封材料318和引线框架结构302。模塑材料304的缘被设置成围绕引线框架结构302的主中央部分333，以形成凹面结构301。如所示，使用模塑材料304来填充引线框架结构302的引线之间的区域，并且模塑材料304的表面在这些位置处基本上与引线的表面共面。
根据本发明的其它半导体管芯封装可包括不带凹面结构的预模制衬底。可参照图8A-8E描述这些实施例。
图8A示出了包括间隙321的引线框架结构320的另一侧面横截面视图。引线框架结构320还包括第一表面320(a)和第二表面320(b)，以及在间隙321的相对侧上的引线324。
图8B示出了在执行模塑工艺之后的引线框架结构320。这可构成第一模塑工艺。如图8B中所示，模塑材料被设置在间隙321内，并且模塑材料322的外表面基本上与引线框架结构320的第一和第二表面320(a)、320(b)共面。所得的预模制衬底363具有第一和第二相对表面363(a)、363(b)，这些表面与模塑材料322的外表面以及引线框架结构320的第一和第二表面320(a)、320(b)重合。与图7B中所示的结构不同，不在图8B中所示的预模制衬底363中形成凹面结构。
如图8C中所示，在形成衬底363之后，使用粘合剂344将半导体管芯328安装到衬底363上。在此示例中，半导体管芯328可包括具有电端子的上表面，其中电端子形成半导体管芯328中的水平器件的一部分。粘合剂344可以是环氧粘合剂或者任何其它合适类型的粘合剂，并且可以是已填充或未填充的。
在将半导体管芯328安装到衬底363之后，在衬底363的引线324与半导体管芯328的上表面之间形成引线接合329。作为替代方案，导电接线柱可用在本发明的其它实施例中。
如图8D中所示，在半导体管芯328的上表面与引线324之间形成引线接合329之后，在半导体管芯328上形成包封材料332以形成半导体管芯封装330。这可构成第二模塑工艺。在此示例中，包封材料332不延伸通过衬底363的外边缘。如在先前的实施例中，包封材料332可与模塑材料322相同或不同。
图8E示出了图8D中所示的半导体管芯封装330的立体仰视图。如图8E中所示，半导体管芯封装330的底面是平坦的。引线324的底面基本上与模塑材料322的底面共面。
图9A示出了包括间隙321的引线框架结构320的侧面横截面视图。引线框架结构320还包括第一表面320(a)和第二表面320(b)，以及间隙321的相对侧上的引线。
图9B示出了在执行模塑工艺之后的引线框架结构320。如所示，所形成模塑材料322填充间隙321并覆盖引线框架结构320的第二表面320(b)的一部分，以形成衬底363。然而，此示例中的模塑材料322不覆盖引线框架结构320的第一表面320(a)。
参看图9C，在形成衬底363之后，使用粘合剂344将半导体管芯328附连到衬底363上。在半导体管芯328的上表面与衬底363中的引线框架结构320的引线324之间形成引线接合329。如先前实施例中的，导电接线柱可用来替代引线接合329。
参看图9D，在将半导体管芯328附连到衬底363之后，在衬底363和半导体管芯328上形成包封材料332，以形成半导体管芯封装330。如所示，引线框架结构320的引线324不延伸通过包封材料332。
图9E示出了图9D中所示的半导体管芯封装330的立体仰视图。如所示，模塑材料322从引线框架结构320的第二表面320(b)伸出。
图10A示出了包括间隙321的引线框架结构320的另一侧面横截面视图。引线框架结构320还包括第一表面320(a)和第二表面320(b)，以及在间隙321的相对侧上的引线324。
如图10B中所示，模塑材料322填充引线框架结构320的间隙321并且还覆盖引线框架结构320的第一表面320(a)的一部分，以形成预模制衬底363。在此示例中，模塑材料322不覆盖引线框架结构320的第二表面320(b)。
如图10C中所示，使用粘合剂344将半导体管芯328安装到衬底363上。引线接合329等可形成为将半导体管芯328的上表面处的电端子(未示出)耦合到衬底323的引线框架结构320的引线324。
如图10D中所示，包封材料332覆盖半导体管芯328到衬底363的引线，以形成半导体管芯封装330。如所示，半导体管芯封装330的底面是平坦的。
图10E示出了图10D中所示的半导体管芯封装330的立体仰视图。
图11A示出了包括间隙321的引线框架结构320的另一侧面横截面视图。引线框架结构320还包括第一表面320(a)和第二表面320(b)以及在间隙321的相对侧上的引线324。
图11B示出了在对引线框架结构320进行了模塑工艺之后的衬底363的侧面横截面视图。衬底363包括模塑材料322，该材料填充间隙321并覆盖引线框架结构320的第一和第二表面320(a)、320(b)。
图11C示出了使用粘合剂344将半导体管芯328安装到衬底363上。可在半导体管芯328的上表面与衬底363中的引线324之间形成引线接合329等。
如图11D中所示，然后，在衬底363和半导体管芯328上形成包封材料332以形成半导体管芯封装330。如所示，模塑材料322从引线324的底面伸出。
图11E示出了图11D中所示的半导体管芯封装330的立体仰视图。如所示，模塑材料322在引线324之间的外表面与引线320的外表面基本上共面。然而，模塑材料322在相对引线组324之间的中央部分相对于引线320的外表面上升。
图12A示出了包括间隙321的引线框架结构320的另一侧面横截面视图。引线框架结构320还包括第一表面320(a)和第二表面320(b)。引线324处于间隙321的相对侧上。主中央部分333处于间隙321之间。
图12B示出了在执行了模塑工艺之后的图12A中的引线框架结构320。如所示，模塑材料322形成于间隙321内，并形成于引线框架结构320的第二表面320(b)的至少一部分上，以形成根据本发明的实施例的预模制衬底363。模塑材料322包括第一部分322(a)和第二部分322(b)。第一部分322(a)、第二部分322(b)以及引线框架结构320在该第一和第二部分322(a)、322(b)之间的主中央部分333可形成凹面结构337。
如图12C中所示，使用粘合剂344将半导体管芯328安装到衬底363。其上安装了半导体管芯328的衬底363的表面是平坦的。然后，在衬底363的引线324与半导体管芯328的上表面处的电端子之间形成引线接合329(等)。
如图12D中所示，在将半导体管芯328安装到衬底363上之后，在衬底363上并跨过半导体管芯328形成包封材料332以形成半导体管芯封装330。
图12E示出了图12D中所示的半导体管芯封装330的立体仰视图。如图12E中所示，模塑材料322包括模塑材料322的缘，该缘围绕引线框架结构320的主部分333并与其形成凹面结构。
参照图6-12描述的实施例具有引线接合等，它们用于将半导体管芯的表面-与模塑衬底安装表面相对-上的电端子连接到预模制衬底中的引线。图13-17示出了本发明的实施例可与倒装芯片类型的管芯一起使用以形成倒装芯片类型的半导体管芯封装。
图13A示出了包括间隙339的引线框架结构340的另一侧面横截面视图。引线框架结构340还包括第一表面340(a)和第二表面340(b)。引线366处于间隙339的相对侧上。
图13B示出了在对其进行模塑工艺以形成预模制衬底349之后的图13A中的引线框架结构340。如这里所示，模塑材料342填充间隙339，但不延伸通过引线框架结构340的第一和第二表面340(a)、340(b)。所得的预模制衬底349具有相对的平面。
图13C示出了包括大量焊料凸点348的半导体管芯346。可将焊料凸点348耦合到半导体管芯346中的半导体器件中的电端子。
焊料凸点348可包括任何合适的焊料材料，包括Pb-Sn焊料，无Pb焊料等。作为替代方案，除焊料凸点348以外，还可使用包括诸如铜之类的导电材料的导电柱，或用其代替焊料凸点348。
如图13C中所示，使用粘合剂344将半导体管芯346安装到预模制衬底349。可使用任何合适的工艺来在衬底349上沉积粘合剂346，这些工艺包括：层叠、滚涂、刮刀涂敷等。可使用包括环氧粘合剂的任何合适的粘合剂。
图13D示出了在将半导体管芯346安装到衬底349之后的所形成的半导体管芯封装350。如所示，粘合剂344填充半导体管芯346与预模制衬底349之间的间隔，并且可部分地位于半导体管芯346的周边的外部。在半导体管芯封装350中，焊料凸点348将半导体管芯346中的端子(未示出)电耦合到引线框架结构340的引线366。
尽管图13C和13D示出了如何首先将粘合剂沉积在衬底上，然后将半导体管芯346安装到衬底349上，但是应当理解，其它实施例是可能的。例如，首先将半导体管芯346安装到衬底349，然后使用底部填充材料来填充半导体管芯346与衬底349之间的间隔。底部填充材料是可购买到的。在其它实施例中，可能不需要底部填充材料或其它粘合剂，因为焊料348将半导体管芯346耦合到预模制衬底349。
图13E示出了图13D中所示的半导体管芯封装350的立体仰视图。如所示，半导体管芯封装350的底面与引线框架结构340的第二表面340(b)重合。半导体管芯封装350的底部、引线结构340的外表面基本上与模塑材料342的外表面共面。
图14A示出了包括间隙339的引线框架结构340的另一侧面横截面视图。引线框架结构340还包括第一表面340(a)和第二表面340(b)。引线366处于间隙339的相对侧上。
图14B示出了在对其进行模塑工艺之后的引线框架结构340。模塑材料342填充间隙339，并且覆盖引线框架结构340的第二表面340(b)的至少一部分，以形成预模制衬底349。在此实施例中，第一表面340(a)并不被模塑材料342覆盖。
图14C示出了包括使用粘合剂344安装到衬底349的焊料凸点348的半导体管芯346。与先前的实施例一样，焊料凸点348穿过粘合层344以接触引线框架结构340。与先前的实施例一样，焊料凸点348可包括任何合适的焊料，包括Pb-Sn焊料，无Pb焊料等。除焊料外，还可使用导电柱，或用其替代焊料。
图14D示出了在将半导体管芯346安装到衬底349之后的半导体管芯封装350。图14E示出了图14D中所示的半导体管芯封装350的立体仰视图。如图14D和14E中所示的，模塑材料342从引线框架结构340的第二表面340(b)向下伸出。如图14E中所示，在相邻引线366之间的模塑材料342基本上与引线366的外表面共面。
图15A示出了包括间隙339的引线框架结构340的另一侧面横截面视图。引线框架结构340还包括第一表面340(a)和第二表面340(b)。引线366处于间隙339的相对侧上。
图15B示出了在对其进行模塑工艺之后的引线框架结构340。模塑材料342填充间隙339，但不覆盖引线框架结构340的第一表面340(a)或第二表面340(b)。
图15C示出了将其安装到衬底349上时的半导体管芯346。类似于先前的实施例，半导体管芯346具有附连到半导体管芯346中的端子(未示出)的大量焊料凸点348。
如图15D中所示，在将半导体管芯346安装到预模制衬底349之后，可在半导体管芯346之上和之下形成包封材料352，以形成半导体管芯封装350。包封材料352可使用与前述的模塑材料342相同或不同类型的材料。
图15E示出了半导体管芯封装350的立体仰视图。如所示，模塑材料342的外表面基本上与引线366的底部外表面共面。
可翻转半导体管芯封装350，并将其安装到电路板。在将半导体管芯封装350安装到电路板之前，可在引线366的外露表面上按需形成焊料。
与之前的实施例不同，在将半导体管芯346安装到衬底349之前，在衬底349上不存在粘合层。相反，包封材料350覆盖半导体管芯346的顶面和底面。
图16A示出了括间隙339的引线框架结构340的另一侧面横截面视图。引线框架结构340还包括第一表面340(a)和第二表面340(b)。引线366处于间隙339的相对侧上。
图16B示出了在对其进行模塑工艺之后的引线框架结构340。模塑材料342填充间隙339，并覆盖第二侧340(b)的至少一部分以形成预模制衬底349。
图16C示出了将其安装到预模制衬底349上时的半导体管芯346。半导体管芯346包括大量焊料凸点348。在安装之后，这些焊料凸点348接触引线366。
如图16D中所示，在将半导体管芯346安装到衬底349之后，可在半导体管芯346之上和之下形成包封材料352，以形成半导体管芯封装350。
图16E示出了图16D中所示半导体管芯封装350的立体仰视图。如所示，相邻引线366之间的模塑材料342基本上与那些引线366的外表面共面。模塑材料342的较大部分从引线366伸出。
图17A示出了括至少两个间隙339的引线框架结构340的另一侧面横截面视图。引线框架结构340还包括第一表面340(a)和第二表面340(b)。主中央部分333处于间隙339之间。引线366从间隙339的向外延伸。
图17B示出了在对其进行模塑工艺之后的引线框架结构340。如图17B中所示，模塑材料342填充间隙339，并覆盖第二侧340(b)的至少一部分以形成预模制衬底349。模塑材料342包括第一部分342(a)和第二部分342(b)，它们与引线框架结构340的第二主中央部分333一起形成凹面结构351。
图17C示出了将其安装到预模制衬底349上时的半导体管芯346。半导体管芯346包括附连到其下侧的大量焊料结构348。焊料结构348将半导体管芯348中的电端子电耦合到引线框架结构340的引线366。
如图17D中所示，在将半导体管芯346安装到衬底349之后，可在半导体管芯346之上和之下形成包封材料352，以形成半导体管芯封装350。
图17E示出了图17D中所示半导体管芯封装350的底部立体图。如图17E中所示，围绕主中央部分333形成模塑材料342的缘。同时，它们可形成凹面结构。
参照图5-17所述的实施例提供了大量优点。首先，可较便宜地制成半导体管芯封装，因为不需要昂贵的盖带和经蚀刻引线框架结构来形成半导体管芯封装。在这些实施例中，不需要经蚀刻的引线框架结构和盖带来形成预模制衬底，因为使用具有模塑管芯的模塑工具来形成预模制衬底。在某些示例中，当与使用昂贵的盖带来生产的半导体管芯封装相比时，这可使半导体管芯封装的成本减少42％。第二，与由许多前述实施例所示的一样，半导体管芯封装可使用较大的半导体管芯。如上所示，半导体管芯的尺寸无需限于在衬底中使用的引线框架结构中的管芯附连焊盘的尺寸。第三，在本发明的实施例中，可能增加引脚引线数量，而无需增加半导体管芯封装的尺寸。第四，当形成凹面结构时，可增加焊料联结可靠性。凹面结构可包含用于将所形成半导体管芯封装附连到印刷电路板等的焊料。
IV.制造大功率模块的设计和方法
大功率模块被用于大量电子应用中。某些大功率模块是“智能(smart)”功率模块。这些功率模块包括至少一个功率半导体管芯和至少一个控制半导体管芯。控制半导体管芯(例如，驱动器集成电路或驱动器芯片)可用于至少部分地控制功率半导体管芯的操作。
本发明的附加实施例涉及大功率模块和用于制作大功率模块的方法。在一个实施例中，获得包括引线框架结构和模塑材料的衬底。模塑材料和引线框架结构的表面基本上共面。衬底包括第一管芯附连区和第二管芯附连区。第一半导体管芯被附连到该第一管芯附连区，而第二半导体管芯被附连到该第二管芯附连区。第一和第二半导体管芯可包括功率晶体管。第二半导体管芯可包括控制芯片(或驱动器IC或驱动器集成电路)。在大功率模块中还可存在附加功率晶体管和附加电子元件。
图18A-1示出了包括第一管芯附连区402(b)-1、第二管芯附连区402(b)-2和第三管芯附连区402(b)-3的引线框架结构402。各个管芯附连区402(b)-1、402(b)-2、402(b)-3之间的间隔可受到要形成的封装的电压需要的限定。
引线框架结构402还可包括远离第一、第二和第三管芯附连区402(b)-1、402(b)-2、402(b)-3延伸的大量引线402(a)。在此示例中，引线402(a)在单个方向上远离第一、第二和第三管芯附连区402(b)-1、402(b)-2、402(b)-3延伸。在其它示例中，它们可在一个以上的方向上远离各个管芯附连区延伸。在此示例中，第三管芯附连区402(b)-3可对应于驱动器半导体管芯的管芯焊垫(paddle)，而其它管芯附连区402(b)-1、402(b)-2可对应于功率半导体管芯的管芯焊垫。
图18A-2示出了引线框架结构402的相反侧。引线框架结构402包括第一半蚀刻区402(c)-1和第二半蚀刻区402(c)-2。在本发明的实施例中，经蚀刻区可通过部分地蚀刻穿过引线框架结构的厚度来形成。“半蚀刻”结构可在去除引线框架结构的约一半厚度之后形成指引线框架结构。
半蚀刻区402(c)-1、402(c)-2可使用标准蚀刻工艺来形成。例如，在蚀刻之前，对应于半蚀刻区402(c)-1、402(c)-2的表面可使用诸如光刻胶或带(例如，聚酰亚胺带)的材料来覆盖。然后，蚀刻材料(例如，液体蚀刻剂或干蚀刻剂)可用于蚀刻引线框架结构402未被覆盖材料所覆盖的区域。参看图18A-1和18A-2，在此示例中，第一半蚀刻区402(c)-1和第一管芯附连区402(b)-1可以是同一结构的一部分。而且，在此示例中，第二半蚀刻区402(c)-2和第二管芯附连区402(b)-2也可以是同一结构的一部分。
图18B-1示出了在执行模塑工艺之后的引线框架结构402。在执行了模塑工艺(例如，转移模塑工艺)之后，围绕引线框架结构402形成模塑材料404，由此形成预模制衬底405。在一个示例性转移模塑工艺中，引线结构402并不期望被模塑材料覆盖的表面可使用带(例如，聚酰亚胺带)来覆盖以防止在模塑期间铸模溢出。在使用带覆盖了引线框架结构402之后，可在引线框架结构402上沉积模塑材料。随后移除该带，从而使引线框架结构402预先被覆盖的部分穿过模制模塑材料外露。如上所述，在其它实施例中，预模制衬底可使用铸模工具来形成而无需使用盖带。
如所示，形成模塑材料404，从而模塑材料404的外表面基本上与第一、第二和第三导电管芯附连区402(b)-1、402(b)-2、402(b)-3的外表面共面。如图18B-1中所示，引线402(a)远离模塑材料404的一侧向边缘延伸。在其它实施例中，从导电管芯附连区402(b)-1、402(b)-2、402(b)-3延伸的引线可远离模塑材料404的两个或多个侧向边缘延伸。
图18B-2示出了预模制衬底405的立体仰视图。如所示，第一和第二半蚀刻区402(c)-1、402(c)-2的外表面可外露通过模塑材料404。
与某些常规衬底相比，根据本发明的实施例的预模制集成引线框架结构具有较小的翘曲和较高的刚性。如将从以下描述所清楚的，在类似于SIP(封装中的系统)模块的本发明的实施例中，无需类似于直接接合的铜或绝缘的金属衬底的额外的散热片或衬底。半导体管芯封装的热性能可通过使用具有适当厚度引线框架结构来实现。在模塑操作期间，可定义预模制衬底的电路。如图18C中所示，可使用粘合剂或某些其它合适的材料来将第一、第二和第三半导体管芯408(a)、408(b)、408(c)附连到衬底405。与先前实施例中一样，环氧类粘合剂或任何其它合适的可购买的粘合剂可用于将半导体管芯408(a)、408(b)、408(c)附连到预模制衬底405。与前述实施例中所示的一样，也可在引线402(a)与半导体管芯408(a)、408(b)、408(c)上表面上的端子之间按需形成引线接合(未示出)。引线接合还可用于将不同的半导体管芯彼此连接。例如，半导体管芯408(b)可以是驱动器IC，而半导体管芯408(a)、408(c)可以是功率IC管芯。驱动器IC管芯可经由导线电耦合到功率IC管芯并对其进行控制。在其它实施例中，可使用诸如导线接线柱的其它导电结构来替代引线接合。如图18D中所示，在第一、第二和第三半导体管芯408(a)、408(b)、408(c)上形成包封材料410来形成半导体管芯封装400。可使用标准模塑工艺来形成包封材料410。在示例性半导体管芯封装400中，引线402(a)仅远离包封材料410的一侧延伸。在执行了包封工艺之后，所形成封装可被修整并使其形成适当的尺寸。图19A和19B示出了SPM(智能功率模块)类封装的视图，该封装可使用与参照18A-D所述的相同的通用工艺流程来制成。图19A示出了用作包括引线框架结构的衬底504的框架的框架结构502的立体图。图19B示出了框架结构502和衬底504的仰视图。第一和第二半导体管芯506(a)、506(b)在衬底504上。如前所述，衬底504使用引线框架结构504(a)和模塑材料504(b)来形成。与先前实施例中的一样，可部分地蚀刻引线框架结构504(a)的部分，而模塑材料504(a)具有与模塑材料504(a)的外表面基本上共面的外表面。如上所述，本发明的实施例可具有一半或部分被蚀刻的引线框架结构，该结构带有用于功率和驱动器IC半导体管芯的预定义管芯焊垫。管芯附连焊垫之间的隔离间隔可通过半导体管芯封装的电压要求来控制。另外，引线框架结构可以是预模制，并且引线框架结构可使用带来进行反面涂敷(backcoat)以防止在模塑期间的铸模溢出。而且，模塑材料的外表面可基本上与预模制衬底中的管芯附连焊垫的外表面共面。
如上所述，预模制集成引线框架结构具有比其它衬底小的翘曲以及高的整体面板刚性。此外，无需类似于直接接合的铜或绝缘金属衬底的额外的散热片或衬底，因为封装的热性能可使用具有不同厚度的引线框架来实现。如果期望较好的热传递，则可使用较厚的引线框架结构。在本发明的实施例中，可将子组件面板模塑成最终封装尺寸，然后可修整并形成最终封装。
上述半导体管芯封装可以是高热效率封装，并可用在诸如LCD(液晶显示器)TV模块封装的封装中。
V.大功率模块的衬底
本发明的其它实施例涉及用于半导体管芯封装的预模制衬底、用于制作预模制衬底的方法、以及包括该预模制衬底的半导体管芯封装。
在一个实施例中，获得第一引线框架结构和第二引线框架结构。然后，使用粘合层将第一和第二引线框架结构附连在一起。然后，将模塑材料施加到该第一引线框架结构、该第二引线框架结构或粘合层。
图20A示出了根据本发明的实施例的衬底700的俯视图。图20B示出了图20A中所示的衬底700的立体俯视图。在此示例中，衬底700的顶面包括四个导电区752，这些导电区通过绝缘区754来分隔并作为边界。绝缘区754包括填充导电区752之间的间隙758的模塑材料。导电区752可用作导电管芯附连区。四个导电区752可以是单个引线框架结构的一部分。当四个导电区752之间的间隙使用模塑材料来填充时，该模塑材料的外表面基本上与导电区752的外表面共面。这种组合可形成如上所述的预模制结构。
图20C示出了图20A、20B中所示的衬底700的侧面横截面视图。如图20C中所示，衬底700包括彼此面对的两个半蚀刻引线框架结构702。该两个半蚀刻引线框架结构702可包括铜、铜合金或任何其它合适的导电材料。该两个半蚀刻(部分蚀刻)的引线框架结构702可由两个10-20密耳(mil)厚的引线框架结构构成，这两结构在特定位置上已被部分地蚀刻成厚度约为5-10密耳。在其它实施例中，引线框架结构702的厚度可约为20-40密耳，并且可在特定位置上被半蚀刻成厚度约为10-20密耳。引线框架结构702较佳地具有相同的厚度和构造。然而，这在所有示例中并非必需的。
每个引线框架结构702可存在于每个预模制衬底中。这些预模制衬底及其相对应的引线框架结构702可层叠并与粘合层704接触，该粘合层被设置在引线框架结构702之间。在层叠之后，形成夹层复合物。
粘合层704可具有任何合适的形式，并且可具有任何合适的厚度。例如，在某些实施例中，粘合层704的厚度可约为1-3密耳。而且，粘合层704可以是连续或不连续层的形式。
粘合层704可包括可将前述预模制衬底和引线框架结构702接合在一起的任何合适的材料。例如，粘合层704可包括诸如聚酰亚胺层(聚酰亚胺带)之类的聚合层。在其它实施例中，可使用FR4层叠或高K粘合膜来减小粘合层702与引线框架结构702之间的任何CTE(热膨胀系数)失配，以及任何界面剪应力(interfaceshearstress)(如果预模制衬底特别大)。
引线框架结构702和所形成的粘合层层叠可以是对称的，以减小可能的翘曲问题。例如，如图20C中所示，在所形成的衬底700中，由前述部分蚀刻工艺形成的区702(a)可在内部彼此面对。两个引线框架结构702还可近具有对称的蚀刻图案以及类似的几何形状，从而可将它们对称地设置在衬底700中。
夹层层叠用模塑材料706进一步预模制，该模塑材料706围绕引线框架结构702的边缘形成。模塑材料706可包括环氧模塑材料或任何其它合适类型的模塑材料。转移模塑工艺或其它工艺可用于形成围绕引线框架结构702的边缘的模塑材料706以及相对应的预模制衬底。例如，可将夹层层叠置于两个模塑管芯之间的，并且可与使用众所周知的模塑工艺所示的一样模制该模塑材料。模塑材料706减小所形成的层叠的界面处的自由边界应力。
在使用模塑材料706对夹层层叠进行过模塑之后，还可按需处理导电区752的表面。例如，如果在衬底724的顶部外露的导电区752将被用作功率IC半导体管芯的导电管芯附连区，则可对该导电区752的外露表面进行电镀或另外使用诸如Ni/Pd/Au的凸点下(underbump)复合物、或者其它金属层来涂敷。这些附加层可形成用于将半导体管芯焊接到导电区752的可焊接焊盘。在另一个示例中，如果导电区752的外露表面被认为是绝缘的，则导电区752的外露顶面可被阳极化。可使用任何合适的公知阳极化工艺。
图20D示出了先前图中所述的衬底700的立体俯视图。
可以面板形式在MLP类封装中制造衬底700和710，接着使用例如晶片锯来进行单立，然后用在随后的组装中。如以下将进一步详细描述的，这些实施例可使用用于柔性模块组件的一般引线框架结构来构造。SIP(单列直插式封装)也可使用这些实施例来形成。
其它实施例是可能的。在图20A-20D中的前述实施例中，部分地蚀刻引线框架结构，然后执行模塑工艺以形成预模制衬底。该预模制衬底具有其外表面与模塑材料的外表面基本上共面的引线框架结构。然后，可使用粘合剂来将预模制衬底层叠在一起以形成夹层复合物。然后，对所得夹层复合物进行边缘模制以形成衬底。
然而，在其它实施例中，可能获得两个部分蚀刻的引线框架结构，然后使用粘合层将它们层叠在一起，而无需首先形成预模制衬底。然后，就可使用模塑材料来模制经层叠的引线框架结构以形成衬底，该衬底具有与前述一样的通用构造。
尽管已详细描述了使用两个部分蚀刻的引线框架结构，但是应当理解，根据本发明的实施例，可组合两个或多个经蚀刻的引线框架结构以形成组合衬底。
图230E-20H示出了根据本发明的其它实施例的其它衬底。
图20E示出了根据本发明的实施例的衬底710的平面俯视图。衬底710包括引线框架结构712(例如，铜引线框架结构)和填充该引线框架结构712的空隙的模塑材料714。因而，较厚的铜引线框架结构可使用诸如环氧模塑材料之类的模塑材料来预模制以在衬底712中形成电隔离金属焊盘。
图20F、20G和20H分别示出了衬底710的侧面横截面视图、立体俯视图和立体仰视图。如图20F中所示，模塑材料714的厚度基本上等于引线框架结构712的厚度。引线框架结构712的边缘还以模塑材料714为边界，使得模塑材料形成衬底710的外边缘。
在本发明的实施例中，前述结构700、710可单独地用在半导体管芯封装中。与先前的实施例一样，可将半导体管芯安装到衬底。可按需在所安装的半导体管芯与衬底和/或外部输入和/或输出源之间形成输入和输出连接。然后，可将所形成的封装安装到电路板。
然而，在其它实施例中，可将前述类型的衬底700、702安装到框架结构以提供具有外部引线的衬底700、702。下面将进一步详细描述图21和22中所示的这些实施例。
图21A示出了包括框架部分550(a)和大量引线550(b)的框架结构550。中央区550(c)可容纳根据本发明的实施例的衬底。
可将任何合适的衬底放置在中央区550(c)中。例如，可容纳在中央区550(c)中的衬底可以是图20E中所示的衬底710或者图20C中所示的衬底700。图21B示出了可被放置在框架结构550的中央区550(c)中的特定衬底552的俯视图。图21C示出了图21B中所示的衬底552的立体俯视图。
如图21D和21E中所示，在将衬底552附连到框架结构550之前或之后，可将大量半导体管芯554安装到衬底552。如前所述，任何合适的导电粘合剂可用于将半导体管芯554附连到衬底552。另外，半导体管芯可具有上述特性的任一种。例如，半导体管芯554的至少之一可包括驱动器IC半导体管芯，而半导体管芯554的至少之一可包括功率IC半导体管芯。在将半导体管芯554安装到衬底554之后，由此形成半导体管芯组件560。
如所示，可将包括半导体管芯554的衬底552附连到框架结构550的引线550(b)。引线550(b)的底面可被焊接或另外粘合到衬底552的导电顶面。
在替代的实施例中，可将衬底552附连到框架结构550而非半导体管芯554的引线550(b)。在将衬底552附连到框架结构550的引线550(b)之后，可将半导体管芯554安装到衬底552上。
图21F示出了半导体管芯组件560的立体仰视图。图21G示出了半导体管芯组件560的侧面横截面视图。
在形成半导体管芯组件560之后，可在该半导体管芯554上形成包封材料576。图22A示出了半导体管芯封装577的侧面横截面视图。在此示例中，半导体管芯封装577是单列直插式封装(SIP)。图22B、22C和22D示出了半导体管芯封装577的立体俯视图、平面俯视图和立体仰视图。所得的封装可以是高热效率封装，并且可用在LCDTV模块封装中。
应当理解，上述技术也可用于形成双列直插式封装(DIP)。为了形成双列直插式封装，前述框架结构550可具有向内面向中央区550(c)的两组引线。然后，可将两组引线附连到衬底(其上安装或不安装半导体管芯)，然后，如上所述可对所得的组件进行包封以形成DIP类型的半导体管芯封装。
上述实施例具有优于常规结构的大量优点。例如，与直接接合铜(DBC)衬底相比，本发明的实施例较便宜，因为DBC衬底需要使用昂贵的基底材料，以及较高的处理温度。而且，在DBC衬底中，DBC中铜与陶瓷之间的热失配可包括较高的界面应力并可引起封装可靠性问题。另外，形成DBC衬底所需的较高的处理温度可导致较高的面板翘曲。
热覆板(thermalcladboard)是另一类衬底。它们使用铝(1-1.5mm)、电介质(50-80微米)、铜(35-400微米)和无电镀镍(3-5微米)的组合。
本发明的实施例可具有优于热覆板的大量优点。例如，与热覆板相比，本发明的实施例需要较少的层，并且由此以较低的成本来制造。另外，热覆板具有比本发明的实施例更高的热阻，而且可能具有较多的CTE失配问题。热失配可产生较高的界面应力而且可减小封装可靠性问题。
最后，如上所述，本发明的实施例可使用柔性模块组件的一般引线结构来构造。
VI.包括电压调节器的封装中的系统
上述许多实施例涉及半导体管芯封装中的成形和模塑衬底的使用。前述半导体管芯封装实施例涉及功率半导体管芯封装的具体构造。半导体管芯封装可与电源和/或电压调节器一起使用。以下描述的实施例可使用上述预模制衬底的任一种，或者支持一个或多个半导体管芯的任何其它合适的衬底。
随着宽带应用需求的增长，微处理器的设计要求变得更加复杂。这导致了CPU时钟频率的增加，并且这导致了功耗的增加。通常，可按以下所考虑的要求来设计电压调节器：(1)电压调节器具有较高的响应、在经减小的电压下工作、以及适应于高电流电平(例如，从1.3V和70A的输出到0.8V和150A的输出)；以及(2)电压调节器在较高的切换频率下具有增加的效率以使任何可能的损失保持在较低的水平。
为了生成组合了高频和高效的操作的电压调节器，期望改进结合到功率MOSFET中的单独器件的每一个，并减小这些器件之间的配线的寄生电感。通过将驱动器IC以及高压侧和低压侧功率MOSFET集成到单个封装中，可实现效率的极大提高以及显著的小型化。
同步降压变换器等的常规封装通常具有三个管芯焊垫，分别用于驱动器IC、高压侧MOSFET管芯和低压侧管芯。在常规封装中，使用接合线将高压侧MOSFET源极连接到低压侧MOSFET漏极。这产生较高的寄生电感。另外，在常规封装中，从驱动器IC到高压侧和低压侧MOSFET栅极、源极和漏极的连接还可使用接合线来实现。使用各个焊垫需要使用较长的接合线。这些因素降低了常规封装的高频功率效率和热性能。通常，多管芯焊垫封装具有比本发明的实施例低的可靠性水平。
同步降压变化器可使用驱动器IC、高压侧功率MOSFET和低压侧功率MOSFET。图23示出了典型的同步降压变换器的简化示意图。同步降压变换器(SBC)670包括高压侧金属氧化物半导体场效应晶体管(MOSFET)672和低压侧MOSFET674。低压侧MOSFET674的漏极D被电连接到高压侧MOSFET672的源极S。大多数商业生产的MOSFET是垂直器件，并且被封装成到栅极、漏极和源极的外部连接点处于器件的同一地理平面上。
期望SBC670中的高压侧和低压侧MOSFET672和674的源极S与漏极D之间的连接分别具有极低的电感，以便于在从适度到较高的工作/切换频率下使用SBC670。在MOSFET672和674被配置成离散器件的场合中，期望最优化SBC670的电路布置的设计以减小寄生电感。或者，SBC670可被配置成单个封装中的单个变换器中的完全集成的同步降压变换器，并且可被设计并布置成分别减小高压侧和低压侧MOSFET672和674之间的连接的寄生电感。然而，这种完全集成器件往往成为通常与其它应用和/或设计不兼容的适当应用和/或设计的特定器件。此外，连接MOSFET的印刷电路板迹线/导体通常无法适当的承载从适度到较高的电流电平。
在本发明的实施例中，新的双列通用焊垫封装(例如，9x5mm-26-引脚双侧平面无引线封装)可克服常规封装的问题。本发明的实施例可具有以下特性：
·驱动器IC、高压侧MOSFET和低压侧MOSFET可共用同一焊垫。
·高压侧MOSFET可以附连到管芯焊垫的倒装芯片，而低压侧MOSFET可使用常规软焊料管芯附连材料。
·因而，高压侧MOSFET的源极通过管芯附连焊垫自动连接到低压侧MOSFET的漏极。
·高压侧MOSFET的漏极可使用一个或多个金属条接线柱接合或一个或多个引线接合来连接到外部引脚。
·驱动器IC还可位于高压和低压侧MOSFET之间以减小导线长度。
·驱动器IC使用不导电管芯附连材料来使其与MOSFET隔离。
·与诸如8x8QFN封装之类的常规封装相比，根据本发明的实施例的封装具有较小的覆盖区(footprint)(例如，70％)和较小的引脚数(例如，26)。
根据本发明的实施例的一个示例性方法包括获得包含半导体管芯附连表面的衬底，以及将包括高压侧晶体管输入的高压侧晶体管附连到该衬底。高压侧晶体管输入被耦合到导电管芯附连表面。包括低压侧晶体管输出的低压侧晶体管也被附连到衬底。低压侧晶体管输入被耦合到导电管芯附连表面。
图24A示出了根据本发明的实施例的半导体管芯封装600的侧面横截面视图。半导体管芯封装600具有安装在衬底610上的低压侧晶体管606、高压侧晶体管602和控制管芯604。
图24B示出了图24A中所示的半导体管芯封装600的平面俯视图。图24C示出了图24A中所示的半导体管芯封装600的立体图。参看图24B和24C，半导体管芯封装600具有安装在衬底610上的低压侧晶体管管芯606、高压侧晶体管管芯602和控制管芯604。高压侧晶体管管芯602中的高压侧晶体管和低压侧晶体管管芯606中的低压侧晶体管可以是诸如垂直功率MOSFET之类的功率晶体管。以下将进一步详细描述垂直功率MOSFET管芯。
在此示例中，衬底610包括高压侧源极引线610(c)、高压侧栅极引线610(h)、导电管芯附连表面610(g)、低压侧源极引线610(a)和控制引线610(b)。衬底610可以是预模制衬底，如上所述，可以是单个导电引线框架结构或者可以是某些其它合适的结构。导电管芯附连表面610(g)可占据衬底610的表面的一部分或者衬底610的整个上表面。
可存在到高压侧MOSFET管芯602的大量连接。例如，将漏极接线柱612附连到高压侧MOSFET管芯602中的漏区。大量焊料结构622(a)可用于将高压侧MOSFET管芯602中的漏区电和机械地耦合到漏极接线柱612。除此示例中的漏极接线柱612以外，还可使用一个或多个漏极导线，或用其来替代此示例中的漏极接线柱612。
如图24B中所示，高压侧MOSFET管芯602中的栅区被耦合到栅极引线610(h)。焊料结构622(b)可将栅极引线610(h)耦合到高压侧MOSFET管芯602中的栅区。高压侧MOSFET管芯602中的源区被耦合到导电管芯附连表面610(g)。焊料(未示出)还可用于将高压侧MOSFET管芯602中的源区电耦合到导电管芯附连表面610(g)。
可存在到低压侧MOSFET管芯606的大量连接。例如，由源极导线616(a)可将低压侧MOSFET管芯606中的源区耦合到衬底610的源极引线610(a)。作为替代方案，除源极导线616(a)外，还可使用一个或多个源极接线柱，或用其来替代源极导线616(a)。源极导线616(a)可包括铜、金或任何其它合适的材料。低压侧MOSFET管芯606的栅区使用导线616(c)耦合到控制芯片604。
低压侧MOSFET管芯606的漏区通过诸如焊料等的导电管芯附连材料耦合到衬底610的导电管芯附连表面610(g)。基于铅或基于无铅的焊料可用于将低压侧MOSFET管芯606的漏区附连到管芯附连表面610(g)。
还可将控制芯片604安装到衬底610的导电管芯附连表面610(g)，但是可与衬底610电隔离。大量接合线616(e)可将控制芯片604中的端子耦合到控制引线610(b)。导线602(d)还可将控制芯片604中的端子耦合到导电管芯附连表面610(g)。在某些情况中，可使用导电接线柱来替代接合线。
图24D示出了衬底610的仰视图。如图24D中所示，衬底610的底部可具有半蚀刻部分610(i)。
图24E示出了半导体管芯封装600的立体图。
图25示出了根据本发明的另一实施例的衬底610的侧面横截面视图。衬底610包括使用模塑材料692填充的凹槽690。控制芯片604处于模塑材料692的顶部。该模塑材料692使控制芯片604与衬底的导电部分电隔离。与先前实施例中的一样，低压侧MOSFET管芯606和高压侧MOSFET管芯602处于衬底610上。
凹槽690可通过蚀刻、研磨等来形成。可将模塑材料692沉积在凹槽中，随后进行固化或凝固。
图25中所示的实施例具有大量优点。例如，模塑材料692使控制芯片604与高压和低压侧管芯602、606电隔离，并且不增加所形成的半导体管芯封装的高度。
上述实施例具有大量优点。这些优点包括较小的覆盖区，以及较好的热和电特性。这些实施例可用在单列直插式封装和双列直插式封装中。
上述实施例的任一种和/或其任何特征可与其它实施例和/或特征进行组合而不背离本发明的范围。例如，尽管未参照图1-2中所示的实施例具体描述封装类型模块中的系统，但是应当理解，这些实施例可用于封装类型模块中的系统而不背离本发明的精神和范围。
上述描述仅是示例性的而非限制性的。对于本领域技术人员而言，考虑对公开的回顾，本发明的许多更改将变得显而易见。因此，本发明的范围并非参照上述描述来确定，相反应当参照所附权利要求以及其整个范围和等效方案来确定。
对诸如“顶部”、“底部”、“上”、“下”等的位置的任何引用指附图，并且可用来帮助说明，而非旨在进行限定。它们并非旨在指绝对位置。
上述半导体管芯封装可用在许多合适的电气装置中。例如，它们可用在个人计算机、服务器计算机、蜂窝电话、电器等中。
列举“一”、“一个”、“该”旨在表示“一个或多个”，除非特别指明与此相反。
上述所有专利、专利申请、公开和说明书通过通用的引用全部结合于此。全部都不应当被认为是现有技术。

Claims (19)

1.一种方法，包括：
获得包括第一表面和第二表面的预模制衬底，
其中所述预模制衬底包括引线框架结构和模塑材料，
其中所述引线框架结构包括焊盘区，所述焊盘区具有外表面和内表面，
并且其中所述焊盘区的所述外表面和所述模塑材料的外表面共面，并且与所述预模制衬底的所述第二表面重合，
并且其中所述第一表面包括模塑材料，且所述引线框架结构的所述焊盘区的所述内表面部分地由模塑材料覆盖；以及
将至少两个半导体管芯附连到所述预模制衬底的所述第一表面，
其中至少一个管芯通过粘合剂附连至所述焊盘区上的所述模塑材料；
其中所述半导体管芯中的一个半导体管芯附连到未被所述焊盘区的模塑材料覆盖的表面；以及
其中所述模塑材料使附连到所述模塑材料的所述半导体管芯与所述焊盘区电隔离。
2.如权利要求1所述的方法，其特征在于，所述引线框架结构包括多个导电区，其中所述多个导电区处于所述衬底的边缘区处，并且所述焊盘是相对于所述衬底的边缘区处的所述导电区的中央区下沉。
3.如权利要求1所述的方法，其特征在于，所述至少两个半导体管芯中的至少一个半导体管芯使用焊料来附连至所述焊盘区的内表面，其他半导体管芯使用粘合剂附连至覆盖所述焊盘区的内表面的所述模塑材料。
4.如权利要求1所述的方法，其特征在于，所述引线框架结构的焊盘区完全由所述模塑材料覆盖，并且所述至少两个半导体管芯使用粘合剂来附连。
5.如权利要求1所述的方法，其特征在于，所述引线框架结构包括管芯附连区，其中所述管芯附连区与所述衬底的所述第一表面重合，并且所述管芯的至少之一处于所述管芯附连区上。
6.如权利要求1所述的方法，其特征在于，所述引线框架结构包括铜。
7.如权利要求1所述的方法，其特征在于，所述衬底不具有侧向延伸通过所述模塑材料的引线。
8.如权利要求1所述的方法，其特征在于，所述半导体管芯的至少之一包括垂直器件。
9.如权利要求1所述的方法，其特征在于，所述管芯的至少之一包括垂直MOSFET。
10.如权利要求1所述的方法，其特征在于，所述引线框架结构包括多个导电区，其中所述多个导电区处于所述衬底的边缘区，并且其中所述方法还包括将所述管芯引线接合到所述导电区。
11.一种半导体管芯封装，包括：
包括第一表面和第二表面的预模制衬底，
其中所述预模制衬底包括引线框架结构和模塑材料，
其中所述引线框架结构包括焊盘区，所述焊盘区具有外表面和内表面，
其中所述焊盘区的所述外表面和所述模塑材料的外表面共面，并且与所述预模制衬底的所述第二表面重合，
其中所述第一表面包括模塑材料，且所述引线框架结构的所述焊盘区的所述内表面部分地由模塑材料覆盖；以及
耦合到所述预模制衬底的所述第一表面的至少两个半导体管芯，
其中至少一个管芯通过粘合剂附连至所述焊盘区上的所述模塑材料；
其中所述半导体管芯中的一个半导体管芯附连到未被所述焊盘区的模塑材料覆盖的表面；以及
其中所述模塑材料使附连到所述模塑材料的所述半导体管芯与所述焊盘区电隔离。
12.如权利要求11所述的半导体管芯封装，其特征在于，所述引线框架结构包括多个导电区域，其中所述多个导电区处于所述衬底的边缘区处，并且所述焊盘是相对于所述衬底的边缘区处的所述导电区的中央区下沉。
13.如权利要求11所述的半导体管芯封装，其特征在于，所述至少两个半导体管芯中的至少一个半导体管芯使用焊料来附连至所述焊盘区的内表面，其他半导体管芯使用粘合剂附连至覆盖所述焊盘区的内表面的所述模塑材料。
14.如权利要求11所述的半导体管芯封装，其特征在于，所述引线框架结构的焊盘区完全由所述模塑材料覆盖，并且所述至少两个半导体管芯使用粘合剂来附连所述衬底。
15.如权利要求11所述的半导体管芯封装，其特征在于，所述引线框架结构包括管芯附连区，其中所述管芯附连区与所述衬底的所述第一表面重合，并且所述管芯的至少之一处于所述管芯附连区上。
16.如权利要求11所述的半导体管芯封装，其特征在于，所述引线框架结构包括铜。
17.如权利要求11所述的半导体管芯封装，其特征在于，所述衬底不具有侧向延伸通过所述模塑材料的引线。
18.如权利要求11所述的半导体管芯封装，其特征在于，所述半导体管芯的至少之一包括垂直器件。
19.如权利要求11所述的半导体管芯封装，其特征在于，所述管芯的至少之一包括垂直MOSFET。
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