TW202147284A - Pixel driving circuit - Google Patents

Abstract

A pixel driving circuit includes a light emitting unit, thirteen switches and two capacitors. A driving circuit of the light emitting unit passes only one of the switches to reduce power consumption. In addition, threshold voltages and operation voltages are compensated in the pixel driving circuit so that the light emitting unit can provide consistent brightness.

Description

pixel drive circuit

The present disclosure relates to a pixel driving circuit of a light emitting diode.

At present, light-emitting diodes have been widely used in various types of displays. The brightness of the light-emitting diode when it emits light is related to the size of its driving current, and the size of the driving current is controlled by the driving transistor. However, the threshold voltage (Vth) of the driving transistor of each pixel in the display is not the same due to the variation of the manufacturing process, which will make the light-emitting diodes in different pixels have different values. The brightness of each light-emitting diode is different due to the driving current of the display device, which causes the problem of uneven brightness when the display displays a picture. In addition, the driving current is provided by the operating voltage, and the operating voltage is prone to voltage drop due to the line resistance in the transmission path, so that the operating voltage of each pixel is different, resulting in an error in the driving current.

Therefore, how to compensate for the threshold voltage of the driving transistor of the display pixel, and how to compensate the operating voltage, is the goal of those skilled in the art.

Embodiments of the present disclosure provide a pixel driving circuit including the following elements. The light-emitting unit has a first end and a second end, and the first end of the light-emitting unit is connected to the first operating voltage. The first switch has a control terminal, a first terminal and a second terminal, the first terminal of the first switch is connected to the second terminal of the light emitting unit, and the second terminal of the first switch is connected to the second operating voltage. The second switch has a control terminal, a first terminal and a second terminal, the first terminal of the second switch is connected to the second operating voltage, the second terminal of the second switch is connected to the control terminal of the first switch, and the control of the second switch The terminal is connected to the first control signal. The third switch has a control terminal, a first terminal and a second terminal, the first terminal of the third switch is connected to the second operating voltage, and the control terminal of the third switch is connected to the first control signal. The fourth switch has a control end, a first end and a second end, the first end of the fourth switch is connected to the control end of the first switch and the second end of the second switch, and the control end of the fourth switch is connected to the third switch the second end. The fifth switch has a control terminal, a first terminal and a second terminal, the first terminal of the fifth switch is connected to the first voltage, the second terminal of the fifth switch is connected to the second terminal of the third switch and the control of the fourth switch end. The sixth switch has a control end, a first end and a second end, the first end of the sixth switch is connected to the control end of the fifth switch, the second end of the sixth switch is connected to the second control signal, the control of the sixth switch The terminal is connected to the third control signal. The seventh switch has a control end, a first end and a second end, the second end of the seventh switch is connected to the control end of the fifth switch and the first end of the sixth switch, and the control end of the seventh switch is connected to the fourth control end signal. The eighth switch has a control terminal, a first terminal and a second terminal, the first terminal of the eighth switch is connected to a data voltage, and the second terminal of the eighth switch is connected to the control terminal of the eighth switch and the first terminal of the seventh switch end. The first capacitor has a first terminal and a second terminal, the first terminal of the first capacitor is connected to the control terminal of the fifth switch, the first terminal of the sixth switch and the second terminal of the seventh switch, and the second terminal of the first capacitor is connected to the control terminal of the fifth switch. The terminal is connected to the third control signal. The ninth switch has a control terminal, a first terminal and a second terminal, the first terminal of the ninth switch is connected to the second terminal of the first switch and the second operating voltage, and the control terminal of the ninth switch is connected to the first control signal. The tenth switch has a control terminal, a first terminal and a second terminal, the first terminal of the tenth switch is connected to the second terminal of the ninth switch, the second terminal of the tenth switch is connected to a diode voltage, and the tenth switch The control terminal of the is connected to the first control signal. The second capacitor has a first terminal and a second terminal, the first terminal of the second capacitor is connected to the second terminal of the fourth switch, and the second terminal of the second capacitor is connected to the second terminal of the ninth switch and the tenth switch. first end. The eleventh switch has a control terminal, a first terminal and a second terminal, the first terminal of the eleventh switch is connected to the second terminal of the fourth switch and the first terminal of the second capacitor, and the second terminal of the eleventh switch Connected to the first operating voltage, the control end of the eleventh switch is connected to the third control signal. The twelfth switch has a control terminal, a first terminal and a second terminal. The first terminal of the twelfth switch is connected to the second terminal of the fourth switch, the first terminal of the second capacitor and the first terminal of the eleventh switch. terminal, the control terminal of the twelfth switch is connected to the fourth control signal. The thirteenth switch has a control terminal, a first terminal and a second terminal. The first terminal of the thirteenth switch is connected to the second terminal of the twelfth switch and the control terminal of the thirteenth switch. The second terminal of the thirteenth switch is connected to the second terminal of the thirteenth switch. The terminal is connected to a reference voltage.

In some embodiments, the pixel driving circuit operates in the first period, the second period, the third period and the fourth period in sequence. During the first period, the first switch, the fourth switch, the fifth switch, the seventh switch, the ninth switch and the twelfth switch are in the off state, the second switch, the third switch, the sixth switch, the tenth switch and the The eleventh switch is in a conducting state. During the second period, the first switch, the fourth switch, the fifth switch, the sixth switch, the ninth switch and the eleventh switch are in the off state, the second switch, the third switch, the seventh switch, the eighth switch, the The tenth switch, the twelfth switch and the thirteenth switch are in an on state. In the first sub-period of the third period, the first to seventh switches, the tenth switch, the eleventh switch, and the twelfth switch are in an off state, and the ninth switch is in an on state. In the second sub-period of the third period, the second switch, the third switch, the sixth switch, the seventh switch, and the tenth switch to the twelfth switch are in the off state, and the first switch, the fourth switch, and the fifth switch are in the off state. and the ninth switch is in a conducting state. During the fourth period, the first switch, the fourth switch to the seventh switch, the ninth switch, the eleventh switch and the twelfth switch are in an off state, and the second switch, the third switch and the tenth switch are in an on state.

In some embodiments, the first to fourth switches, the sixth switch, the seventh switch, the tenth switch, the eleventh switch, the twelfth switch and the thirteenth switch are N-type transistors, the fifth switch, The eighth switch and the ninth switch are P-type transistors.

In some embodiments, the threshold voltage of the first switch is matched to the threshold voltage of the thirteenth switch, and the threshold voltage of the fifth switch is matched to the threshold voltage of the eighth switch.

In some embodiments, during the first period, the first control signal and the third control signal are at a first high level, the second control signal is at a second high level, and the fourth control signal is at a first low level. During the second period, the first control signal and the fourth control signal are at the first high level, the second control signal is at the second high level, and the third control signal is at the first low level. During the third period, the first control signal, the third control signal and the fourth control signal are at the first low level, and the second control signal gradually decreases from the second high level to the second low level. During the fourth period, the first control signal is at the first high level, the second control signal is at the second high level, and the third control signal and the fourth control signal are at the first low level.

In some embodiments, the first operating voltage is greater than the second operating voltage, and the first operating voltage is greater than or equal to the first voltage.

In some embodiments, the above-mentioned light-emitting units are light-emitting diodes.

In some embodiments, the size of the above-mentioned light emitting diodes is sub-millimeter.

In some embodiments, the above-mentioned pixel driving circuit is disposed in the display panel.

In some embodiments, the above-mentioned pixel driving circuit is disposed in the backlight module.

In the above pixel driving circuit, the threshold voltage and the operating voltage can be compensated, and the power consumption can be saved.

The terms "first", "second", etc. used in this document do not mean a particular order or order, but are only used to distinguish elements or operations described in the same technical terms.

FIG. 1 is a circuit structure diagram illustrating a pixel driving circuit according to an embodiment. The pixel driving circuit 100 may be disposed on the backlight module of the display device to provide a backlight source, or may be disposed in the display panel as a pixel, which is not limited in the present disclosure. The pixel driving circuit 100 includes a light-emitting unit 110, switches T1-T13, a first capacitor C1 and a second capacitor C2. The light-emitting unit 110 is, for example, a light-emitting diode, and the size of the light-emitting diode may be sub-millimeter or other suitable size, which is not limited in the present disclosure.

The light emitting unit 110 has a first terminal 110-1 and a second terminal 110-2, and the first terminal 110-1 of the light emitting unit 110 is connected to the operating voltage VDD. The switch T1 has a control terminal T1-3, a first terminal T1-1 and a second terminal T1-2, the first terminal T1-1 of the switch T1 is connected to the second terminal 110-2 of the light emitting unit 110, and the second terminal T1-1 of the switch T1 The terminal T1-2 is connected to the operating voltage VSS. In this embodiment, the operating voltage VSS is lower than the operating voltage VDD. The switch T2 has a control terminal T2-3, a first terminal T2-1 and a second terminal T2-2, the first terminal T2-1 of the switch T2 is connected to the operating voltage VSS, and the second terminal T2-2 of the switch T2 is connected to the switch The control terminal T1-3 of T1 and the control terminal T2-3 of the switch T2 are connected to the control signal EM. The switch T3 has a control terminal T3-3, a first terminal T3-1 and a second terminal T3-2, the first terminal T3-1 of the switch T3 is connected to the operating voltage VSS, and the control terminal T3-3 of the switch T3 is connected to the control signal em. The switch T4 has a control terminal T4-3, a first terminal T4-1 and a second terminal T4-2, and the first terminal T4-1 of the switch T4 is connected to the control terminal T1-3 of the switch T1 and the second terminal T2 of the switch T2 -2, the control terminal T4-3 of the switch T4 is connected to the second terminal T3-2 of the switch T3. The switch T5 has a control terminal T5-3, a first terminal T5-1 and a second terminal T5-2, the first terminal T5-1 of the switch T5 is connected to the voltage VH, and the second terminal T5-2 of the switch T5 is connected to the switch T3 The second terminal T3-2 of the switch T4 and the control terminal T4-3 of the switch T4. The switch T6 has a control terminal T6-3, a first terminal T6-1 and a second terminal T6-2, the first terminal T6-1 of the switch T6 is connected to the control terminal T5-3 of the switch T5, and the second terminal T6 of the switch T6 -2 is connected to the control signal V _sweep , and the control terminal T6-3 of the switch T6 is connected to the control signal S1. The switch T7 has a control terminal T7-3, a first terminal T7-1 and a second terminal T7-2, and the second terminal T7-2 of the switch T7 is connected to the control terminal T5-3 of the switch T5 and the first terminal T6 of the switch T6 -1, the control terminal T7-3 of the switch T7 is connected to the control signal S2. The switch T8 has a control terminal T8-3, a first terminal T8-1 and a second terminal T8-2, the first terminal T8-1 of the switch T8 is connected to the data voltage V _DATA , and the second terminal T8-2 of the switch T8 is connected to The control terminal T8-3 of the switch T8 and the first terminal T7-1 of the switch T7. The first capacitor C1 has a first terminal C1-1 and a second terminal C1-2, and the first terminal C1-1 of the first capacitor C1 is connected to the control terminal T5-3 of the switch T5 and the first terminal T6-1 of the switch T6 With the second terminal T7-2 of the switch T7, the second terminal C1-2 of the first capacitor C1 is connected to the control signal V _sweep .

The switch T9 has a control terminal T9-3, a first terminal T9-1 and a second terminal T9-2. The first terminal T9-1 of the switch T9 is connected to the second terminal T1-2 of the switch T1 and the operating voltage VSS. The switch T9 The control terminal T9-3 is connected to the control signal EM. The switch T10 has a control terminal T10-3, a first terminal T10-1 and a second terminal T10-2, the first terminal T10-1 of the switch T10 is connected to the second terminal T9-2 of the switch T9, and the second terminal of the switch T10 T10-2 is connected to the diode voltage V _LED , and the control terminal T10-3 of the switch T10 is connected to the control signal EM. The second capacitor C2 has a first terminal C2-1 and a second terminal C2-2, the first terminal C2-1 of the second capacitor C2 is connected to the second terminal T4-2 of the switch T4, and the second terminal of the second capacitor C2 C2-2 is connected to the second terminal T9-2 of the switch T9 and the first terminal T10-1 of the switch T10. The switch T11 has a control terminal T11-3, a first terminal T11-1 and a second terminal T11-2, and the first terminal T11-1 of the switch T11 is connected to the second terminal T4-2 of the switch T4 and the second terminal of the second capacitor C2. One terminal C2-1, the second terminal T11-2 of the switch T11 is connected to the operating voltage VDD, and the control terminal T11-3 of the switch T11 is connected to the control signal S1. The switch T12 has a control terminal T12-3, a first terminal T12-1 and a second terminal T12-2. The first terminal T12-1 of the switch T12 is connected to the second terminal T4-2 of the switch T4 and the second terminal T4-2 of the second capacitor C2. One terminal C2-1 and the first terminal T11-1 of the switch T11, and the control terminal T12-3 of the switch T12 are connected to the control signal S2. The switch T13 has a control terminal T13-3, a first terminal T13-1 and a second terminal T13-2, the first terminal T13-1 of the switch T13 is connected to the second terminal T12-2 of the switch T12 and the control terminal T13 of the switch T13 -3, the second terminal T13-2 of the switch T13 is connected to the reference voltage Vref.

In this embodiment, the switches T1-T13 are, for example, thin film transistors, wherein the switches T1-T4, T6, T7, T10-T13 are N-type transistors, and the switches T5, T8, T9 are P-type transistors crystal. In addition, the threshold voltage of switch T1 is matched to the threshold voltage of switch T13 , the threshold voltage of switch T5 is matched to the threshold voltage of switch T8 , and the effect of threshold voltage matching will be described in detail below.

FIG. 2 is a timing diagram illustrating various control signals in a pixel driving circuit according to an embodiment. Referring to FIG. 2 , the pixel driving circuit operates in the first period 210 , the second period 220 , the third period 230 and the fourth period 240 in sequence, and returns to the first period 210 after the fourth period 240 ends.

FIG. 3 is a schematic diagram illustrating a switch of a pixel driving circuit in a first period according to an embodiment. Referring to FIG. 2 and FIG. 3 , the first period 210 is used to reset the pixel driving circuit 100 . During the first period 210 , the control signal S1 and the control signal EM are at the high level V _GH , the control signal S2 is at the low level V _GL , and the control signal V _sweep is at the high level V _{sweep_H} , wherein the high level V _GH can be the same Or different from the high level V _{sweep_H} , the disclosure is not limited thereto. Therefore, in the first period 210, the switches T1, T4, T5, T7, T9, and T12 are in an off state. In addition, the switches T2, T3, T6, T10, and T11 are turned on. During this period, the potentials of node A and node D are the same as the operating voltage VSS; the potential of node B is the same as the operating voltage VDD; the potential of node C is the same as the diode voltage V _LED ; and the potential of node E is the same as the control signal V _sweep .

FIG. 4 is a schematic diagram illustrating a switch of a pixel driving circuit in a second period according to an embodiment. Please refer to FIG. 2 and FIG. 4 , the second period 220 is used for voltage compensation. In the second period 220 , the control signal S1 is at the low level V _GL , the control signal S2 and the control signal EM are at the high level V _GH , and the control signal V _sweep is at the high level V _{sweep_H} . Therefore, the switches T1 , T4 , T5 , T6 , T9 , T11 are in an off state, and the switches T2 , T3 , T7 , T8 , T12 , and T13 are in an on state. During this period, the potentials of the node A and the node D are the same as the operation voltage VSS. The potential of node B is V _ref +V _{TH_T13} , where V _{TH_T13} is the threshold voltage of switch T13 . The potential of node C is the same as the diode voltage V _LED . The potential of the node E is V _DATA -|V _{TH_T8} |, where V _{TH_T8} is the threshold voltage of the switch T8.

FIG. 5 is a schematic diagram illustrating the switching of the pixel driving circuit in the first sub-period in the third period according to an embodiment. Referring to FIGS. 2 and 5 , the third period 230 is divided into a first sub-period 230-1 and a second sub-period 230-2. In the first sub-period 230-1, the light-emitting unit 110 is turned off, and in the second sub-period 230-1 During the period 230-2, the light emitting unit 110 is turned on and emits light. The lengths of the first sub-period 230-1 and the second sub-period 230-2 are determined by the data voltage V _DATA . In other words, in this embodiment, the light-emitting unit 110 is driven by means of pulse width modulation (PWM), thereby determining the brightness of the pixels. Specifically, in the third period 230 , the control signal S1 , the control signal S2 and the control signal EM are at the low level V _GL , and the control signal V _sweep gradually decreases from the high level V _{sweep_H} to the low level V _{sweep_L} , wherein The low level V _{sweep_L} may be the same as or different from the low level V _GL , which is not limited in the present disclosure.

V_sweep ，其中

V_sweep 表示控制訊號V_sweep 的變化量，由於控制訊號V_sweep 的電位是逐漸降低，因此節點E的電位也會逐漸的降低，當以下數學式1成立時，開關T5會切換為導通狀態，接著會進入第二子期間230-2。 [數學式1]

>0During the first sub-period 230-1, the switches T1-T7, T10, T11, and T12 are in an off state, and the switch T9 is in an on state. At this time, the potentials of the node A, the node C, and the node D are the same as the operation voltage VSS. Potential of the node C changes from V _LED 220 during the second sub period is a first VSS 230-1, the amount of change is VSS-V _LED, and therefore the potential of the node B is changed from _{V ref} + V TH_T13 as V _ref + V _{TH_T13} +VSS-V _LED . Similarly, the potential of node E is V _DATA -|V _{TH_T8} |+

V _sweep , where

Change amount V _sweep a control signal V _sweep, since the control signal V _sweep potential is gradually reduced, the potential of the node E will gradually decrease, when the following Equation 1 is satisfied, the switch T5 is switched to a conducting state, and then will enter the second sub-period 230-2. [Mathematical formula 1]

>0

為開關T5的臨界電壓。值得注意的是，由於開關T5的臨界電壓匹配於開關T8的臨界電壓，因此在數學式1中兩個臨界電壓

、

相互抵消，也就是說刪除了開關T5的臨界電壓的影響。此外，當資料電壓V_DATA 越大時，數學式1越早成立，也就越早進入第二子期間230-2。where V _E represents the potential of node E,

is the threshold voltage of switch T5. It is worth noting that, since the threshold voltage of switch T5 is matched with the threshold voltage of switch T8, in Equation 1, the two threshold voltages

,

They cancel each other out, that is to say, the influence of the threshold voltage of the switch T5 is removed. In addition, when the data voltage V _DATA is larger, the earlier the mathematical formula 1 is established, the earlier the second sub-period 230-2 is entered.

V_sweep 。除此之外，由於開關T5為導通狀態，節點D的電位相同於電壓V_H 。在此實施例中，操作電壓VDD大於等於電壓V_H ，但電壓V_H 大到足夠導通開關T4。電壓V_H 會施加在開關T4的控制端T4-3上使得開關T4處於導通狀態，節點A與節點B的電位相同於V_ref +V_{TH_T13} +VSS-V_LED ，藉此導通開關T1以產生電流I_LED ，此電流I_LED 流經發光單元110與開關T1。電流I_LED 的大小如以下數學式2所示，其中K為常數，V_A 為節點A的電位，臨界電壓

、

相互抵銷。 [數學式2]

FIG. 6 is a schematic diagram illustrating the switching of the pixel driving circuit in the second sub-period in the third period according to an embodiment. Referring to FIG. 2 and FIG. 6 , in the second sub-period 230 - 2 , the switches T2 , T3 , T6 , T7 , T10 ˜ T12 are turned off, and the switches T1 , T4 , T5 , and T9 are turned on. The potential of node C is the same as the operating voltage VSS, and the potential of node E is the same as V _DATA -|V _{TH_T8} |+

V _sweep . In addition to this, since the switch T5 is in the ON state, the potential of the node D is the same as the voltage V _H . In this embodiment, the operating voltage VDD is greater than or equal to the voltage V _H , but the voltage V _{H is} large enough to turn on the switch T4 . The voltage V _H will be applied to the control terminal T4-3 of the switch T4 so that the switch T4 is turned on, and the potentials of the nodes A and B are the same as V _ref +V _{TH_T13} +VSS-V _LED , thereby turning on the switch T1 to generate current I _LED , the current I _LED flows through the light-emitting unit 110 and the switch T1 . The magnitude of current I _LED as shown in the following Equation 2, where K is a constant, V _A is the potential of the node A, the threshold voltage

,

offset each other. [Mathematical formula 2]

Through the compensation of the operating voltage VSS and the threshold voltage, the current I _LED has nothing to do with the operating voltage VSS and the threshold voltage of any switch. In the prior art, the driving current passes through more than two switches. When the current is large, a voltage drop will occur, so that the switches may enter the linear region. Increasing the cross-voltage between the operating voltages VDD and VSS can solve this problem, but it increases the power consumption. In contrast, the current I _LED only flows through one switch T1, so it has the effect of reducing power consumption.

FIG. 7 is a schematic diagram illustrating a switch of a pixel driving circuit in a fourth period according to an embodiment. Referring to FIG. 2 and FIG. 7 , the fourth period 240 is used to turn off the light-emitting unit 110 . During the fourth period 240, the control signal S1 and the control signal S2 are at the low level V _GL , the control signal EM is at the high level V _GH , and the control signal V _sweep is at the high level V _{sweep_H} . During this period, the switches T1, T4-T7, T9, T11, and T12 are in an off state, and the switches T2, T3, and T10 are in an on state. The potentials of the node A and the node D are the same as the operation voltage VSS. The potential of node B is V _ref +V _{TH_T13} . The potential of node C is the same as the diode voltage V _LED . The potential of the node E is V _DATA -|V _{TH_T8} |.

In the above-described embodiments, "connection" may be a direct connection.

Although the present invention has been disclosed above by the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, The protection scope of the present invention shall be determined by the scope of the appended patent application.

100: pixel drive circuit 110: light-emitting unit C1: first capacitor C2: second capacitor T1~T13: switch I _LED : current 110-1, C1-1, C2-1, T1-1, T2-1, T3 -1, T4-1, T5-1, T6-1, T7-1, T8-1, T9-1, T10-1, T11-1, T12-1, T13-1: the first end 110-2, C1-2,C2-2,T1-2,T2-2,T3-2,T4-2,T5-2,T6-2,T7-2,T8-2,T9-2,T10-2,T11- 2, T12-2, T13-2: second end T1-3, T2-3, T3-3, T4-3, T5-3, T6-3, T7-3, T8-3, T9-3, T10 -3, T11-3, T12-3, T13-3: control terminal A, B, C, D, E: node VDD, VSS: operating voltage S1, S2, EM, V _sweep : control signal V _H : voltage V _DATA : data voltage V _LED : diode voltage V _ref : reference voltage 210: first period 220: second period 230: third period 230-1: first sub-period 230-2: second sub-period 240: first period Four periods V _GH , V _{sweep_H} : high level V _GL , V _{sweep_L} : low level

In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, the following embodiments are given and described in detail with the accompanying drawings as follows. FIG. 1 is a circuit structure diagram illustrating a pixel driving circuit according to an embodiment. FIG. 2 is a timing diagram illustrating various control signals in a pixel driving circuit according to an embodiment. FIG. 3 is a schematic diagram illustrating a switch of a pixel driving circuit in a first period according to an embodiment. FIG. 4 is a schematic diagram illustrating a switch of a pixel driving circuit in a second period according to an embodiment. FIG. 5 is a schematic diagram illustrating the switching of the pixel driving circuit in the first sub-period in the third period according to an embodiment. FIG. 6 is a schematic diagram illustrating the switching of the pixel driving circuit in the second sub-period in the third period according to an embodiment. FIG. 7 is a schematic diagram illustrating a switch of a pixel driving circuit in a fourth period according to an embodiment.

100: Pixel drive circuit

110: Lighting unit

C1: first capacitor

C2: second capacitor

T1~T13: switch

110-1,C1-1,C2-1,T1-1,T2-1,T3-1,T4-1,T5-1,T 6-1, T7-1, T8-1, T9-1, T10-1, T11-1, T12-1, T13-1: the first end

110-2,C1-2,C2-2,T1-2,T2-2,T3-2,T4-2,T5-2,T6-2,T7-2,T8-2,T9-2,T10- 2, T11-2, T12-2, T13-2: the second end

T1-3,T2-3,T3-3,T4-3,T5-3,T6-3,T7-3,T8-3,T9-3,T10-3,T11-3,T12-3,T13- 3: Control terminal

A,B,C,D,E: Node

VDD, VSS: operating voltage

S1,S2,EM,V _sweep : Control signal

V _H : Voltage

V _DATA : data voltage

V _LED : Diode Voltage

V _ref : reference voltage

Claims (10)

A pixel driving circuit, comprising: a light-emitting unit having a first end and a second end, the first end of the light-emitting unit is connected to a first operating voltage; A first switch has a control terminal, a first terminal and a second terminal, the first terminal of the first switch is connected to the second terminal of the light-emitting unit, and the second terminal of the first switch is connected to to a second operating voltage; a second switch having a control terminal, a first terminal and a second terminal, the first terminal of the second switch is connected to the second operating voltage, and the second terminal of the second switch is connected to the first terminal The control terminal of a switch, the control terminal of the second switch is connected to a first control signal; A third switch has a control terminal, a first terminal and a second terminal, the first terminal of the third switch is connected to the second operating voltage, and the control terminal of the third switch is connected to the first terminal control signal; a fourth switch having a control terminal, a first terminal and a second terminal, the first terminal of the fourth switch is connected to the control terminal of the first switch and the second terminal of the second switch, The control terminal of the fourth switch is connected to the second terminal of the third switch; A fifth switch has a control terminal, a first terminal and a second terminal, the first terminal of the fifth switch is connected to a first voltage, and the second terminal of the fifth switch is connected to the third terminal the second end of the switch and the control end of the fourth switch; A sixth switch has a control terminal, a first terminal and a second terminal, the first terminal of the sixth switch is connected to the control terminal of the fifth switch, and the second terminal of the sixth switch is connected to a second control signal, the control end of the sixth switch is connected to a third control signal; a seventh switch has a control terminal, a first terminal and a second terminal, the second terminal of the seventh switch is connected to the control terminal of the fifth switch and the first terminal of the sixth switch, The control terminal of the seventh switch is connected to a fourth control signal; An eighth switch has a control terminal, a first terminal and a second terminal, the first terminal of the eighth switch is connected to a data voltage, and the second terminal of the eighth switch is connected to the eighth switch The control end of the 7th switch and the first end of the seventh switch; The first capacitor has a first end and a second end, the first end of the first capacitor is connected to the control end of the fifth switch, the first end of the sixth switch and the connection of the seventh switch the second end, the second end of the first capacitor is connected to the third control signal; A ninth switch has a control terminal, a first terminal and a second terminal, the first terminal of the ninth switch is connected to the second terminal of the first switch and the second operating voltage, the ninth switch the control terminal of the switch is connected to the first control signal; A tenth switch has a control terminal, a first terminal and a second terminal, the first terminal of the tenth switch is connected to the second terminal of the ninth switch, and the second terminal of the tenth switch is connected connected to a diode voltage, the control terminal of the tenth switch is connected to the first control signal; The second capacitor has a first terminal and a second terminal, the first terminal of the second capacitor is connected to the second terminal of the fourth switch, and the second terminal of the second capacitor is connected to the ninth switch the second end of the switch and the first end of the tenth switch; An eleventh switch has a control terminal, a first terminal and a second terminal, the first terminal of the eleventh switch is connected to the second terminal of the fourth switch and the first terminal of the second capacitor one end, the second end of the eleventh switch is connected to the first operating voltage, and the control end of the eleventh switch is connected to the third control signal; A twelfth switch has a control terminal, a first terminal and a second terminal, the first terminal of the twelfth switch is connected to the second terminal of the fourth switch and the second terminal of the second capacitor one end and the first end of the eleventh switch, the control end of the twelfth switch is connected to the fourth control signal; and A thirteenth switch has a control terminal, a first terminal and a second terminal, the first terminal of the thirteenth switch is connected to the second terminal of the twelfth switch and the terminal of the thirteenth switch The control terminal, the second terminal of the thirteenth switch is connected to a reference voltage. The pixel driving circuit of claim 1, wherein the pixel driving circuit operates in a first period, a second period, a third period and a fourth period in sequence, Wherein, during the first period, the first switch, the fourth switch, the fifth switch, the seventh switch, the ninth switch and the twelfth switch are in an off state, the second switch, the The third switch, the sixth switch, the tenth switch and the eleventh switch are in an on state, Wherein, during the second period, the first switch, the fourth switch, the fifth switch, the sixth switch, the ninth switch and the eleventh switch are in the off state, the second switch, the first switch The third switch, the seventh switch, the eighth switch, the tenth switch, the twelfth switch and the thirteenth switch are in the on state, In a first sub-period of the third period, the first switch to the seventh switch, the tenth switch, the eleventh switch and the twelfth switch are in the off state, and the ninth switch is in the off state This on state, Wherein in a second sub-period of the third period, the second switch, the third switch, the sixth switch, the seventh switch and the tenth switch to the twelfth switch are in the off state, the The first switch, the fourth switch, the fifth switch and the ninth switch are in the on state, During the fourth period, the first switch, the fourth switch to the seventh switch, the ninth switch, the eleventh switch and the twelfth switch are in the off state, the second switch, the The third switch and the tenth switch are in the on state. The pixel driving circuit of claim 2, wherein the first switch to the fourth switch, the sixth switch, the seventh switch, the tenth switch, the eleventh switch, the twelfth switch and The thirteenth switch is an N-type transistor, and the fifth switch, the eighth switch and the ninth switch are P-type transistors. The pixel driving circuit of claim 3, wherein the threshold voltage of the first switch matches the threshold voltage of the thirteenth switch, and the threshold voltage of the fifth switch matches the threshold voltage of the eighth switch. The pixel driving circuit of claim 3, wherein during the first period, the first control signal and the third control signal are at a first high level, and the second control signal is at a second high level bit, the fourth control signal is a first low level, During the second period, the first control signal and the fourth control signal are at the first high level, the second control signal is at the second high level, and the third control signal is at the first low level level, During the third period, the first control signal, the third control signal and the fourth control signal are at the first low level, and the second control signal gradually decreases from the second high level to a The second low level, In the fourth period, the first control signal is the first high level, the second control signal is the second high level, the third control signal and the fourth control signal are the first low level level. The pixel driving circuit of claim 5, wherein the first operating voltage is greater than the second operating voltage, and the first operating voltage is greater than or equal to the first voltage. The pixel driving circuit according to claim 1, wherein the light-emitting unit is a light-emitting diode. The pixel driving circuit of claim 7, wherein the size of the light-emitting diode is sub-millimeter. The pixel driving circuit according to claim 1, wherein the pixel driving circuit is arranged in a display panel. The pixel driving circuit according to claim 1, wherein the pixel driving circuit is arranged in a backlight module.

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