CN113077752B - Pixel driving circuit - Google Patents

Abstract

The invention provides a pixel driving circuit, which comprises a light-emitting unit, ten switches and two capacitors. The driving current of the light emitting unit only flows through one of the switches, thereby saving power consumption. In addition, the pixel driving circuit can compensate the critical voltage and the operating voltage, so that the light-emitting unit can provide consistent brightness.

Description

Pixel drive circuit

technical field

The present disclosure relates to pixel driving circuits of light emitting diodes.

Background technique

At present, light-emitting diodes have been widely used in various types of displays. The brightness of the light-emitting diode when it emits light is related to the size of its driving current, and the size of its driving current is controlled by the driving transistor. However, due to process variation, the threshold voltage (Vth) of the driving transistors of each pixel in the display is not the same, so that the LEDs in different pixels have different driving currents, so that each pixel has a different driving current. The brightness of each light-emitting diode is different, which in turn causes the problem of uneven brightness when the display displays a picture. In addition, the driving current is shown to be provided by the operating voltage, and the operating voltage is likely to have a voltage drop due to the line resistance in the transmission path, so that the operating voltage of each pixel is different, which causes an error in the driving current.

Therefore, how to compensate the threshold voltage of the driving transistor of the display pixel and also compensate the operating voltage is the goal of those skilled in the art.

SUMMARY OF THE INVENTION

An embodiment of the present invention provides a pixel driving circuit, which includes the following elements. The light-emitting unit has a first end and a second end, and the first end of the light-emitting unit is connected to the first operating voltage. The first switch has a first terminal, a second terminal and a control terminal, the first terminal of the first switch is connected to the second terminal of the light-emitting unit, and the second terminal of the first switch is connected to the second operating voltage. The second switch has a first terminal, a second terminal and a control terminal, the first terminal of the second switch is connected to the control terminal of the first switch, and the second terminal of the second switch is connected to the reference voltage. The first capacitor has a first terminal and a second terminal, and the first terminal of the first capacitor is connected to the control terminal of the first switch and the first terminal of the second switch. The third switch has a first terminal, a second terminal and a control terminal, the first terminal of the third switch is connected to the second operating voltage, and the control terminal of the third switch is connected to the control terminal of the second switch. The fourth switch has a first end, a second end and a control end, the first end of the fourth switch is connected to the second end of the first capacitor and the second end of the third switch, and the second end of the fourth switch is connected to the second end of the fourth switch. A control signal, the control terminal of the fourth switch is connected to the first voltage. The fifth switch has a first end, a second end and a control end, the first end of the fifth switch is connected to the second voltage, and the second end of the fifth switch is connected to the control end of the second switch and the control end of the third switch , the control terminal of the fifth switch is connected to the second control signal. The sixth switch has a first end, a second end and a control end. The first end of the sixth switch is connected to the control end of the second switch, the control end of the third switch and the second end of the fifth switch. The control terminal is connected to the third control signal. The seventh switch has a first terminal, a second terminal and a control terminal, the first terminal of the seventh switch is connected to the second terminal of the sixth switch, and the control terminal of the seventh switch is connected to the fourth control signal. The eighth switch has a first terminal, a second terminal and a control terminal, the first terminal of the eighth switch is connected to the second terminal of the seventh switch, the second terminal of the eighth switch is connected to the first control signal, and the The control terminal is connected to the reference voltage. The second capacitor has a first end and a second end, and the first end of the second capacitor is connected to the second end of the sixth switch and the first end of the seventh switch. The ninth switch has a first terminal, a second terminal and a control terminal, the first terminal of the ninth switch is connected to the second terminal of the second capacitor, the second terminal of the ninth switch is connected to a data voltage, and the The control terminal is connected to the fourth control signal. The tenth switch has a first end, a second end and a control end, the first end of the tenth switch is connected to the second end of the second capacitor and the first end of the ninth switch, and the second end of the tenth switch is connected to the first end of the ninth switch. a voltage, and the control terminal of the tenth switch is connected to the second control signal.

In some embodiments, the pixel driving circuit operates in the first period, the second period, the third period and the fourth period in sequence. During the first period, the first switch, the third switch, the sixth switch and the tenth switch are in an off state, and the second switch, the fourth switch, the fifth switch, the seventh switch, the eighth switch and the ninth switch are in an on state pass status. During the second period, the first switch, the third switch, the sixth switch, and the tenth switch are in an off state, and the second switch, the fourth switch, the fifth switch, the seventh switch, the eighth switch, and the ninth switch are in an on state. pass status. In the first sub-period of the third period, the first switch, the third switch, the fifth switch, the sixth switch, the seventh switch and the ninth switch are in the off state, the second switch, the fourth switch, the eighth switch and the The tenth switch is in an on state. In the second sub-period of the third period, the second switch, the fourth switch, the fifth switch, the seventh switch and the ninth switch are in the off state, the first switch, the third switch, the sixth switch, the eighth switch and the The tenth switch is in an on state. During the fourth period, the first switch, the third switch, the fourth switch, the sixth switch, the seventh switch, the ninth switch and the tenth switch are in an off state, and the second switch, the fifth switch and the eighth switch are in an on state pass status.

In some embodiments, the third switch, the fifth switch, the seventh switch and the ninth switch are P-type transistors, and the first switch, the second switch, the fourth switch, the sixth switch, the eighth switch and the tenth switch are N-type transistor.

In some embodiments, the threshold voltage of the first switch is matched to the threshold voltage of the fourth switch, and the threshold voltage of the sixth switch is matched to the threshold voltage of the eighth switch.

In some embodiments, during the first period, the first control signal, the second control signal, and the fourth control signal are at a first low level, and the third control signal is at a second low level. During the second period, the first control signal is at a first high level, the second control signal and the fourth control signal are at a first low level, and the third control signal is at a second low level. During the third period, the first control signal, the second control signal and the fourth control signal are at the first high level, and the third control signal gradually increases from the second low level to the second high level. During the fourth period, the first control signal and the fourth control signal are at the first high level, the second control signal is at the first low level, and the third control signal is at the second low level.

In some embodiments, the first operating voltage is greater than the second operating voltage, and the first voltage is less than the second voltage.

In some embodiments, the above-mentioned light-emitting units are light-emitting diodes.

In some embodiments, the size of the above-mentioned light emitting diodes is sub-millimeter.

In some embodiments, the above-mentioned pixel driving circuit is disposed in the display panel.

In some embodiments, the above-mentioned pixel driving circuit is disposed in a backlight module.

In the above-mentioned pixel driving circuit, the threshold voltage and the operating voltage can be compensated, and the technical effect of saving power consumption is achieved.

Description of drawings

In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, the following specific embodiments are given and described in detail as follows in conjunction with the accompanying drawings.

FIG. 1 is a circuit structure diagram illustrating a pixel driving circuit according to an embodiment.

FIG. 2 is a timing diagram illustrating various control signals in a pixel driving circuit according to an embodiment.

FIG. 3 is a schematic diagram illustrating switching of a pixel driving circuit in a first period according to an embodiment.

FIG. 4 is a schematic diagram illustrating switching of a pixel driving circuit in a second period according to an embodiment.

FIG. 5 is a schematic switch diagram illustrating a pixel driving circuit in a first sub-period in a third period according to an embodiment.

FIG. 6 is a schematic diagram illustrating the switching of the pixel driving circuit in the second sub-period in the third period according to an embodiment.

FIG. 7 is a schematic diagram illustrating switching of a pixel driving circuit in a fourth period according to an embodiment.

Description of reference numbers:

100: Pixel drive circuit

110: Lighting unit

C1: first capacitor

C2: second capacitor

T1～T10: switch

I _LED : Current

110-1,C1-1,C2-1,T1-1,T2-1,T3-1,T4-1,T5-1,T6-1,T7-1,T8-1,T9-1,T10- 1: first end

110-2,C1-2,C2-2,T1-2,T2-2,T3-2,T4-2,T5-2,T6-2,T7-2,T8-2,T9-2,T10- 2: second end

T1-3, T2-3, T3-3, T4-3, T5-3, T6-3, T7-3, T8-3, T9-3, T10-3: Control terminal

A,B,C,D,E: Nodes

VDD, VSS: operating voltage

S1,S2,S3,V _sweep : control signal

V _H , _VL : Voltage

V _DATA : data voltage

V _ref : reference voltage

210: first period

220: Second period

230: third period

230-1: First sub-period

230-2: Second sub-period

240: Fourth period

V _GH , V _{sweep_H} : high level

V _GL ,V _{sweep_L} : low level

Detailed ways

Regarding the "first", "second" and the like used herein, it does not mean a particular order or order, but only for distinguishing elements or operations described in the same technical terms.

FIG. 1 is a circuit structure diagram illustrating a pixel driving circuit according to an embodiment. The pixel driving circuit 100 can be disposed on a backlight module of a display device to provide a backlight source, or disposed in a display panel as a pixel, which is not limited in the present disclosure. The pixel driving circuit 100 includes a light emitting unit 110, switches T1-T10, a first capacitor C1 and a second capacitor C2. The light-emitting unit 110 is, for example, a light-emitting diode, and the size of the light-emitting diode may be sub-millimeter or other suitable sizes, which is not limited in the present disclosure.

The light-emitting unit 110 has a first terminal 110-1 and a second terminal 110-2, and the first terminal 110-1 of the light-emitting unit 110 is connected to the operating voltage VDD. The switch T1 has a first terminal T1-1, a second terminal T1-2 and a control terminal T1-3, the first terminal T1-1 of the switch T1 is connected to the second terminal 110-2 of the light-emitting unit 110, and the second terminal T1-1 of the switch T1 is connected to the second terminal 110-2 of the light-emitting unit 110. The terminal T1-2 is connected to the operating voltage VSS. The switch T2 has a first terminal T2-1, a second terminal T2-2 and a control terminal T2-3, the first terminal T2-1 of the switch T2 is connected to the control terminal T1-3 of the switch T1, and the second terminal T2 of the switch T2 -2 is connected to the reference voltage V _ref . The first capacitor C1 has a first terminal C1-1 and a second terminal C1-2, and the first terminal C1-1 of the first capacitor C1 is connected to the control terminal T1-3 of the switch T1 and the first terminal T2-1 of the switch T2 . The switch T3 has a first terminal T3-1, a second terminal T3-2 and a control terminal T3-3, the first terminal T3-1 of the switch T3 is connected to the operating voltage VSS, and the control terminal T3-3 of the switch T3 is connected to the switch T2 The control terminal T2-3. The switch T4 has a first terminal T4-1, a second terminal T4-2 and a control terminal T4-3. The first terminal T4-1 of the switch T4 is connected to the second terminal C1-2 of the first capacitor C1 and the first terminal C1-2 of the switch T3. Two terminals T3-2, the second terminal T4-2 of the switch T4 is connected to the control signal S1, and the control terminal T4-3 of the switch T4 is connected to the voltage _VL . The switch T5 has a first terminal T5-1, a second terminal T5-2 and a control terminal T5-3, the first terminal T5-1 of the switch T5 is connected to the voltage _VH , and the second terminal T5-2 of the switch T5 is connected to the switch The control terminal T2-3 of the T2, the control terminal T3-3 of the switch T3, and the control terminal T5-3 of the switch T5 are connected to the control signal S2.

The switch T6 has a first terminal T6-1, a second terminal T6-2 and a control terminal T6-3. The first terminal T6-1 of the switch T6 is connected to the control terminal T2-3 of the switch T2 and the control terminal T3- of the switch T3. 3 and the second terminal T5-2 of the switch T5 and the control terminal T6-3 of the switch T6 are connected to the control signal V _sweep . The switch T7 has a first terminal T7-1, a second terminal T7-2 and a control terminal T7-3, the first terminal T7-1 of the switch T7 is connected to the second terminal T6-2 of the switch T6, and the control terminal T7 of the switch T7 -3 is connected to control signal S3. The switch T8 has a first terminal T8-1, a second terminal T8-2 and a control terminal T8-3, the first terminal T8-1 of the switch T8 is connected to the second terminal T7-2 of the switch T7, and the second terminal of the switch T8 T8-2 is connected to the control signal S1, and the control terminal T3-3 of the switch T8 is connected to the reference voltage V _ref . The second capacitor C2 has a first terminal C2-1 and a second terminal C2-2. The first terminal C2-1 of the second capacitor C2 is connected to the second terminal T6-2 of the switch T6 and the first terminal T7- of the switch T7. 1. The switch T9 has a first terminal T9-1, a second terminal T9-2 and a control terminal T9-3, the first terminal T9-1 of the switch T9 is connected to the second terminal C2-2 of the second capacitor C2, and the first terminal T9-1 of the switch T9 is connected to the second terminal C2-2 of the second capacitor C2. The two terminals T9-2 are connected to the data voltage V _DATA , and the control terminal T9-3 of the switch T9 is connected to the control signal S3. The switch T10 has a first terminal T10-1, a second terminal T10-2 and a control terminal T10-3. The first terminal T10-1 of the switch T10 is connected to the second terminal C2-2 of the second capacitor C2 and the first terminal of the switch T9. One terminal T9-1, the second terminal T10-2 of the switch T10 is connected to the voltage _VL , and the control terminal T10-3 of the switch T10 is connected to the control signal S2.

In this embodiment, the switches T1-T10 are, for example, thin film transistors, wherein the switches T3, T5, T7, T9 are P-type transistors, and the switches T1, T2, T4, T6, T8, T10 are N-type transistors . In addition, the threshold voltage of switch T1 is matched to the threshold voltage of switch T4, and the threshold voltage of switch T6 is matched to the threshold voltage of switch T8. The technical effect of threshold voltage matching will be described in detail below.

FIG. 2 is a timing diagram illustrating various control signals in a pixel driving circuit according to an embodiment. Referring to FIG. 2 , the pixel driving circuit operates in the first period 210 , the second period 220 , the third period 230 and the fourth period 240 in sequence, and returns to the first period 210 after the fourth period 240 ends.

In this embodiment, the operating voltage VDD is greater than the operating voltage VSS, the voltage _VL is less than the voltage _VH , and the reference voltage _Vref is greater than the voltage _VL . Furthermore, the voltage _VL is greater than the low level _VGL , and the high level _VGH is greater than the voltage _VH .

FIG. 3 is a schematic diagram illustrating switching of a pixel driving circuit in a first period according to an embodiment. Please refer to FIG. 2 and FIG. 3 , the first period 210 is used to reset the pixel driving circuit 100 . During the first period 210, the control signal S1, the control signal S2 and the control signal S3 are at the low level V _GL , and the control signal V _sweep is at the low level V _{sweep_L} , wherein the low level V _GL may be the same or different from the low level V _{sweep_L} , the present disclosure is not limited thereto. Therefore, in the first period 210 , the switches T1 , T3 , T6 , and T10 are turned off, and the switches T2 , T4 , T5 , T7 , T8 , and T9 are turned on. Specifically, the potential of the node A is the same as the reference voltage V _ref , but the reference voltage V _ref is smaller than the threshold voltage of the switch T1 . The voltage _VL is greater than the threshold voltage of the switch T4, so the switch T4 is in an on state, and the potential of the node B is the same as the low level V _GL . The potential of the node C is the same as the voltage V _H . The reference voltage V _ref is greater than the threshold voltage of the switch T8 , so the switch T8 is turned on, and the potential of the node D is the same as the low level V _GL . The potential of the node E is the same as the data voltage V _DATA .

FIG. 4 is a schematic diagram illustrating switching of a pixel driving circuit in a second period according to an embodiment. Please refer to FIG. 2 and FIG. 4 , the second period 220 is used for voltage compensation. During the second period 220 , the control signal S1 is at a high level V _GH , the control signals S2 and S3 are at a low level V _GL , and the control signal V _sweep is at a low level V _{sweep_L} . Therefore, in the second period 220 , the switches T1 , T3 , T6 , and T10 are in an off state, and the switches T2 , T4 , T5 , T7 , T8 , and T9 are in an on state. Specifically, the potential of the node A is the same as the reference voltage V _ref . The potential of the node B will continue to rise due to the charging of the first capacitor C1 until the potential of the node B is equal to V _L -V _{TH_T4} , and the switch T4 will switch to the off state, where V _{TH_T4} is the threshold voltage of the switch T4 . The potential of the node C is the same as the voltage V _H . Similarly, the potential of the node D will continue to rise until the potential of the node D is equal to V _ref −V _{TH_T8} , and the switch T8 will be switched to the off state, where V _{TH_T8} is the threshold voltage of the switch T8 . The potential of the node E is the same as the data voltage V _DATA .

FIG. 5 is a schematic switch diagram illustrating a pixel driving circuit in a first sub-period in a third period according to an embodiment. Referring to FIGS. 2 and 5 , the third period 230 is divided into a first sub-period 230-1 and a second sub-period 230-2. In the first sub-period 230-1, the light-emitting unit 110 is turned off, and in the second sub-period 230-1 During the period 230-2, the light emitting unit 110 is turned on and emits light. The lengths of the first sub-period 230-1 and the second sub-period 230-2 are determined by the data voltage V _DATA . In other words, in this embodiment, the light-emitting unit 110 is driven in a pulse width modulation (PWM) manner, thereby determining the brightness of the pixels. Specifically, in the third period 230, the control signal S1, the control signal S2 and the control signal S3 are at the high level _{VGH, and the control signal Vsweep gradually} increases from the low level _{Vsweep_L} to the high level _{Vsweep_H} , wherein the high level The level V _{sweep_H} may be the same as or different from the high level V _GH , and the present disclosure is not limited thereto.

In the first sub-period 230-1, the switches T1, T3, T5, T6, T7, and T9 are in an off state, and the switches T2, T4, T8, and T10 are in an on state. The potential of the node A is the same as the reference voltage V _ref . The potential of node B is the same as V _L -V _{TH_T4} . The potential of node C remains unchanged at voltage V _H . In particular, the potential of the node E changes from the data voltage V _DATA in the second period 220 to the voltage _VL in the third period 230 , and the change amount is expressed as V _L -V _DATA , so the potential of the node D will change from the second period 230 to the voltage VL . V _ref - V _{TH_T8} of 220 changes to V _ref - V _{TH_T8} +V _L -V _DATA . At this time, the potential of the control signal V _sweep is smaller than the potential of the node D, so the switch T6 is turned off.

Since the potential of the control signal V _sweep continues to rise, the switch T6 is switched to the on state when the following equation 1 is established, and then the second sub-period 230-2 is entered.

[Mathematical formula 1]

Wherein V _D is the potential of node D, and V _{TH_T6} is the threshold voltage of switch T6. Since the threshold voltage of the switch T6 matches the threshold voltage of the switch T8, the two threshold voltages V _{TH_T6} and V _{TH_T8} cancel each other in Equation 1, that is, the influence of the threshold voltage of the switch T6 is eliminated. When the data voltage V _DATA is larger, the earlier the mathematical formula 1 is established, the earlier the second sub-period 230 - 2 is entered.

FIG. 6 is a schematic diagram illustrating the switching of the pixel driving circuit in the second sub-period in the third period according to an embodiment. Referring to FIG. 2 and FIG. 6 , in the second sub-period 230 - 2 , the switches T2 , T4 , T5 , T7 , and T9 are turned off, and the switches T1 , T3 , T6 , T8 , and T10 are turned on. Specifically, since the switch T6 is in an on state, the potentials of the nodes D and C are the same as V _ref -V _{TH_T8} +V _L -V _DATA , which will turn off the switch T2 and turn on the switch T3 . The potential of node B is changed from V _L -V _{TH_T4} in the first sub-period 230-1 to the operating voltage VSS by the amount of VSS-V _L +V _{TH_T4} , so the potential of node A will change from the first sub-period 230-1 to the operating voltage VSS. The reference voltage V _ref is changed to V _ref +VSS-V _L +V _{TH_T4} , this potential will turn on the switch T1 to generate a current I _LED , the current I _LED flows through the light-emitting unit 110 and the switch T1 , and the magnitude of the current I _LED is as follows: shown in formula 2.

[Mathematical formula 2]

Where K is a constant, VA is the potential of node _A , and V _{TH_T1} is the threshold voltage of switch T1. It is worth noting that, since the threshold voltage of the switch T1 matches the threshold voltage of the switch T4, the magnitude of the current I _LED is not affected by the threshold voltage V _{TH_T1} . In addition, since the operation voltage VSS is compensated in Equation 2, the magnitude of the current I _LED is also not affected by the operation voltage VSS. In the prior art, the driving current passes through more than two switches. When the current is large, a voltage drop will occur, so that the switches may enter the linear region. Increasing the cross-voltage between the operating voltages VDD and VSS can solve this problem, but it increases the power consumption. In contrast, the current I _LED only flows through one switch T1, thus having the technical effect of reducing power consumption.

FIG. 7 is a schematic diagram illustrating switching of a pixel driving circuit in a fourth period according to an embodiment. Referring to FIG. 2 and FIG. 7 , the fourth period 240 is used to turn off the light-emitting unit 110 . During the fourth period 240 , the control signal S1 and the control signal S3 are at the high level V _GH , the control signal S2 is at the low level V _GL , and the control signal V _sweep is at the low level V _{sweep_L} . Therefore, the switches T1 , T3 , T4 , T6 , T7 , T9 , and T10 are turned off, and the switches T2 , T5 , and T8 are turned on. The potential of the node A is the reference voltage V _ref , thereby turning off the switch T1 . The potential of the node C is the voltage V _H .

In the above-described embodiments, "connection" may be a direct connection.

Although the present invention has been disclosed by the above examples, it is not intended to limit the present invention. Any person skilled in the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection shall be subject to those defined in the claims.

Claims (10)

1. A pixel drive circuit, comprising: a light-emitting unit having a first end and a second end, the first end of the light-emitting unit is connected to a first operating voltage; A first switch has a first end, a second end and a control end, the first end of the first switch is connected to the second end of the light-emitting unit, and the second end of the first switch is connected to to the second operating voltage; A second switch has a first end, a second end and a control end, the first end of the second switch is connected to the control end of the first switch, and the second end of the second switch is connected to to a reference voltage; a first capacitor having a first end and a second end, the first end of the first capacitor is connected to the control end of the first switch and the first end of the second switch; A third switch has a first end, a second end and a control end, the first end of the third switch is connected to the second operating voltage, and the control end of the third switch is connected to the second the control terminal of the switch; A fourth switch has a first end, a second end and a control end, the first end of the fourth switch is connected to the second end of the first capacitor and the second end of the third switch , the second end of the fourth switch is connected to the first control signal, and the control end of the fourth switch is connected to a first voltage; A fifth switch has a first terminal, a second terminal and a control terminal, the first terminal of the fifth switch is connected to the second voltage, and the second terminal of the fifth switch is connected to the second switch the control terminal of the third switch and the control terminal of the third switch, the control terminal of the fifth switch is connected to a second control signal; A sixth switch has a first end, a second end and a control end, the first end of the sixth switch is connected to the control end of the second switch, the control end of the third switch and the control end the second end of the fifth switch, the control end of the sixth switch is connected to a third control signal; A seventh switch has a first end, a second end and a control end, the first end of the seventh switch is connected to the second end of the sixth switch, and the control end of the seventh switch is connected to a fourth control signal; An eighth switch has a first end, a second end and a control end, the first end of the eighth switch is connected to the second end of the seventh switch, the second end of the eighth switch connected to the first control signal, the control terminal of the eighth switch is connected to the reference voltage; a second capacitor having a first end and a second end, the first end of the second capacitor is connected to the second end of the sixth switch and the first end of the seventh switch; A ninth switch has a first end, a second end and a control end, the first end of the ninth switch is connected to the second end of the second capacitor, the second end of the ninth switch connected to a data voltage, the control terminal of the ninth switch is connected to the fourth control signal; and A tenth switch has a first end, a second end and a control end, the first end of the tenth switch is connected to the second end of the second capacitor and the first end of the ninth switch , the second terminal of the tenth switch is connected to the first voltage, and the control terminal of the tenth switch is connected to the second control signal. 2. The pixel driving circuit of claim 1, wherein the pixel driving circuit operates in a first period, a second period, a third period and a fourth period in sequence, During the first period, the first switch, the third switch, the sixth switch and the tenth switch are in an off state, the second switch, the fourth switch, the fifth switch, the seventh switch The switch, the eighth switch and the ninth switch are in a conducting state, During the second period, the first switch, the third switch, the sixth switch and the tenth switch are in the off state, the second switch, the fourth switch, the fifth switch, the seventh switch The switch, the eighth switch, and the ninth switch are in the on state, In a first sub-period of the third period, the first switch, the third switch, the fifth switch, the sixth switch, the seventh switch and the ninth switch are in the off state, the first switch The second switch, the fourth switch, the eighth switch and the tenth switch are in the on state, Wherein in a second sub-period of the third period, the second switch, the fourth switch, the fifth switch, the seventh switch and the ninth switch are in the off state, the first switch, the third switch The switch, the sixth switch, the eighth switch and the tenth switch are in the on state, Wherein in the fourth period, the first switch, the third switch, the fourth switch, the sixth switch, the seventh switch, the ninth switch and the tenth switch are in the off state, the second switch , the fifth switch and the eighth switch are in the conducting state. 3. The pixel driving circuit of claim 2, wherein the third switch, the fifth switch, the seventh switch and the ninth switch are P-type transistors, the first switch, the second switch, the first switch The fourth switch, the sixth switch, the eighth switch and the tenth switch are N-type transistors. 4 . The pixel driving circuit of claim 3 , wherein the threshold voltage of the first switch is matched with the threshold voltage of the fourth switch, and the threshold voltage of the sixth switch is matched with the threshold voltage of the eighth switch. 5 . 5 . The pixel driving circuit of claim 3 , wherein during the first period, the first control signal, the second control signal and the fourth control signal are at a first low level, and the third control signal is at a first low level. 6 . is a second low level, During the second period, the first control signal is at a first high level, the second control signal and the fourth control signal are at the first low level, and the third control signal is at the second low level level, During the third period, the first control signal, the second control signal and the fourth control signal are at the first high level, and the third control signal gradually increases from the second low level to a The second high level, During the fourth period, the first control signal and the fourth control signal are at the first high level, the second control signal is at the first low level, and the third control signal is at the second low level level. 6. The pixel driving circuit of claim 5, wherein the first operating voltage is greater than the second operating voltage, and the first voltage is less than the second voltage. 7. The pixel driving circuit of claim 1, wherein the light emitting unit is a light emitting diode. 8. The pixel driving circuit of claim 7, wherein the size of the light emitting diode is sub-millimeter. 9. The pixel driving circuit of claim 1, wherein the pixel driving circuit is disposed in a display panel. 10. The pixel driving circuit of claim 1, wherein the pixel driving circuit is disposed in a backlight module.

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