TW201424497A - Circuit board and method for manufacturing same - Google Patents

Abstract

A circuit board includes a substrate, a number of pads a dielectrical layer and conductive bumps. The pads are formed on a surface of the substrate. The dielectrical layer is laminated on an side surface of the substrate having the pads. The dielectrical layer has a first surface far from the substrate. A number of openings corresponding to pads are defined in the dielectrical layer. Each opening includes a first section and a second section. The first section adjoins to the pad, the second section adjoins to the first surface. A diameter of the second section is larger than that of the first section. The conductive bumps are formed in the openings. The present disclosure also provides a method for manufacturing the circuit board.

Description

Circuit board and manufacturing method thereof

The present invention relates to the field of circuit board manufacturing technology, and in particular, to a circuit board and a manufacturing method thereof.

A printed circuit board using a flip chip ball grid array (FCBGA) typically requires a plurality of conductive bump structures arranged in an array for carrying solder balls. The conductive bumps need to penetrate the solder resist layer and are electrically connected to the corresponding conductive lines. In the prior art, a corresponding solder resist opening is formed on the conductive line, and then a plating barrier layer is formed on the solder resist layer, and a plating barrier corresponding to the solder resist opening is formed in the plating barrier layer. Since both the solder resist opening and the plating barrier opening need to be formed by development and need to communicate with each other, a corresponding plating barrier opening is required to be aligned with the solder resist opening during the fabrication process. Thereafter, conductive bumps are formed by electroless plating and then electroplating in the openings of the solder resist layer. Finally, the plating barrier is removed to obtain conductive bumps protruding from the solder resist layer. In the above manufacturing method, it is necessary to make the solder resist layer opening relatively large in order to perform alignment when developing the plating barrier opening. Moreover, since the formed conductive bumps and the solder resist layer are in contact with each other and the contact area is small, the conductive bumps are easily separated from each other in the solder resist layer, and the obtained circuit board has poor reliability. Moreover, such a manufacturing method determines that the distributed density of the conductive bump structures is small, which is disadvantageous for the dense distribution of the plurality of conductive bump structures.

In view of the above, it is necessary to provide a circuit board and a manufacturing method thereof, which can improve the reliability of the conductive metal block of the circuit board.

A method of manufacturing a circuit board, comprising the steps of: providing a circuit substrate comprising a substrate and a conductive pad formed on a surface of the substrate; and pressing a dielectric layer on a side of the circuit substrate having a conductive pad, the dielectric layer having Moving away from the first surface of the substrate; forming a plurality of openings in the dielectric layer corresponding to the conductive pads in a plurality of holes, each of the openings being a stepped hole, the openings comprising interconnecting a first hole segment and a second hole segment, the first hole segment being adjacent to the conductive pad, the second hole segment being adjacent to the first surface, the second hole segment having a larger diameter than the first hole segment; and Conductive metal blocks are formed in the holes, and each of the conductive metal blocks and the corresponding conductive pads are electrically connected to each other.

A circuit board comprising a substrate, a conductive pad, a dielectric layer and a conductive metal block, the conductive pad being formed on a surface of the substrate, the dielectric laminate being bonded to a side of the substrate having a conductive pad, the dielectric The layer has a first surface away from the substrate, and an opening corresponding to the conductive pad is formed in the dielectric layer, the opening is a stepped hole, and each of the openings comprises a first hole segment and a second hole segment connected to each other a first hole segment adjacent to the conductive pad, the second hole segment being adjacent to the first surface, the second hole segment having a larger aperture than the first hole segment, the conductive metal block being formed in the opening, and completely filling the hole Open the hole.

The circuit board provided by the technical solution and the manufacturing method thereof are formed by forming a conductive metal block in the dielectric layer, and the opening for receiving the conductive metal block in the dielectric layer is a stepped hole. Compared with the prior art, forming an opening in the solder resist layer and then forming a metal bump protruding from the surface of the solder resist layer can increase the contact area of the conductive metal block with the dielectric layer. Compared with the solder resist layer, the dielectric layer and metal bonding ability is superior to the solder resist layer and metal bonding ability. Therefore, the circuit board provided by the technical solution has better reliability.

The circuit board manufacturing method provided by the technical solution includes the following steps:

In the first step, referring to FIG. 1, a circuit substrate 110 is provided.

The circuit substrate 110 includes a substrate 111 and a plurality of conductive pads 112.

The circuit substrate 110 may be a single layer circuit substrate or a multilayer circuit substrate. When the circuit substrate 110 is a single-layer circuit substrate, the substrate 111 is a single-layer dielectric layer. When the circuit substrate 110 is a multilayer circuit substrate, the substrate 111 may have a structure in which a plurality of conductive wiring layers and a plurality of dielectric layers are alternately laminated. A plurality of conductive pads 112 are in contact with a dielectric layer of the substrate 111. In this embodiment, a surface of the substrate 111 is formed with a conductive circuit layer 113. The conductive circuit layer 113 includes a plurality of conductive pads 112 and a plurality of conductive lines (not shown).

In the second step, referring to FIG. 2, a dielectric layer 120 is formed on the surface of the plurality of conductive pads 112 of the circuit substrate 110 and the surface of the substrate 111 exposed from the conductive wiring layer 113.

In this step, the dielectric layer 120 is formed on the surface of the plurality of conductive pads 112 and the substrate 111 exposed from the conductive pads 112 by pressing, so that the dielectric layer 120 completely covers the conductive circuit layer 113. Dielectric layer 120 has a first surface 122 that is remote from substrate 111.

In the third step, referring to FIG. 3, a plurality of openings 121 are formed in the dielectric layer 120 by using a laser. Each of the openings 121 and one of the conductive pads 112 correspond to each other, and each of the conductive pads 112 is corresponding to the opening 121. Exposed.

In this step, the opening 121 is formed by using a pseudo-molecular laser. The opening 121 is stepped. The opening 121 includes a first hole segment 1211 and a second hole segment 1212 that communicate with each other. The first hole segment 1211 is adjacent to the conductive pad 112, and the second hole segment 1212 is adjacent to the first surface 122. Wherein, the aperture of the first hole segment 1211 is smaller than the aperture of the second hole segment 1212. Preferably, the first bore segment 1211 is disposed coaxially with the second bore segment 1212. Since the opening 121 is formed by laser, the longitudinal sections of the first hole segment 1211 and the second hole segment 1212 are all inverted trapezoids. At the junction of the first bore section 1211 and the second bore section 1212, a joint face 1213 is formed, the joint face 1213 being exposed from the side of the second bore section 1212, the joint face 1213 being substantially parallel to the first surface 122.

Since the opening 121 is formed by using a pseudo-molecular laser, when the excimer laser is formed, the energy of the laser at different positions can be controlled, that is, the central region of the opening 121 is used, and the larger energy is used, so that the dielectric layer 120 is The first hole section 1211 and the second hole section 1212 are formed at the same time. At the edge region of the outer winding center region, a small amount of laser energy is applied, so that only a portion of the dielectric layer 120 is ablated and only the second hole segment 1212 is formed, thereby obtaining a stepped opening 121.

In the fourth step, referring to FIG. 4 to FIG. 6, a conductive metal block 150 is formed in each of the openings 121 to obtain the circuit board 100.

This step is specifically as follows:

First, a metal seed layer 130 is formed on the inner wall of the opening 121 and the first surface 122 of the dielectric layer 120.

The metal seed layer 130 may be formed by electroless metal plating. Formed by means of electroless copper plating. Of course, the metal seed layer 130 can also be formed by a black shadow or the like such that the inner wall of the opening 121 and the surface of the dielectric layer 120 form the metal seed layer 130.

Then, a plating metal material 140 is formed on the surface of the metal seed layer 130 by electroplating so that the opening 121 is completely filled.

In this step, the plated metal material may be copper, silver or the like. In the present embodiment, the plated metal material 140 completely fills the opening 121 and is formed on the surface of the metal seed layer 130 of the first surface 122 of the dielectric layer 120.

Finally, the plated metal material 140 and the metal seed layer 130 of the first surface 122 of the dielectric layer 120 are removed, and the plated metal material 140 and the metal seed layer 130 located in the opening 121 form the conductive metal block 150, thereby obtaining the circuit board 100.

In this step, the plated metal material 140 and the metal seed layer 130 of the first surface 122 of the dielectric layer 120 may be removed by chemical etching. By controlling the etching time, the plated metal material 140 and the metal seed layer 130 in the opening 121 remain in the opening 121 to form the conductive metal block 150. The conductive metal block 150 has an end surface 151 remote from the conductive pad 112. The end surface 151 is flush with the first surface 122.

The conductive metal block 150 includes a connecting portion 152 and a bearing portion 153 that are connected to each other. The connecting portion 152 is located in the first hole segment 1211, and the bearing portion 153 is located in the second hole segment 1212. The shape of the connecting portion 152 corresponds to the shape of the first hole segment 1211, and the shape of the bearing portion 153 corresponds to the shape of the second hole segment 1212. The connecting portion 152 electrically connects the conductive pad 112 and the carrying portion 153 for soldering with other components. The connecting portion 152 and the carrying portion 153 are all in the shape of a truncated cone, and the cross-sectional area of the connecting portion 152 is smaller than the cross-sectional area of the carrying portion 153.

Referring to FIG. 7 , the circuit board manufacturing method provided by the technical solution may further include the step of forming the surface treatment layer 160 on the end surface 151 . The surface treatment layer 160 may be an organic solder resist layer or a nickel gold plating layer or the like to protect the conductive metal block 150.

Referring to FIG. 6 and FIG. 7 , the technical solution further provides a circuit board 100 prepared by the above method. The circuit board 100 includes a substrate 111 , a conductive pad 112 , a dielectric layer 120 , and a conductive metal block 150 .

The conductive pad 112 is formed on a surface of the substrate 111. The dielectric layer 120 is pressed against one side of the substrate 111 having the conductive pads 112. An opening 121 is formed in the dielectric layer 120, and the opening 121 is a stepped hole. The dielectric layer 120 has a first surface 122 that is remote from the substrate 111. The conductive metal block 150 is formed in the opening 121 and electrically connected to the corresponding conductive pad 112. The conductive metal block 150 has an end surface 151 away from the corresponding conductive pad 112, and the end surface 151 is flush with the first surface 122 of the dielectric layer 120.

The conductive metal block 150 includes a connecting portion 152 and a bearing portion 153 that are connected to each other. The connecting portion 152 is located in the first hole segment 1211, and the bearing portion 153 is located in the second hole segment 1212. The shape of the connecting portion 152 corresponds to the shape of the first hole segment 1211, and the shape of the bearing portion 153 corresponds to the shape of the second hole segment 1212. The connecting portion 152 electrically connects the conductive pad 112 and the carrying portion 153 for soldering with other components. The connecting portion 152 and the carrying portion 153 are all in the shape of a truncated cone, and the cross-sectional area of the connecting portion 152 is smaller than the cross-sectional area of the carrying portion 153.

The conductive metal block 150 is composed of a metal seed layer 130 in contact with the inner wall of the opening 121 and a plated metal material 140 formed on the surface of the metal seed layer 130.

Further, a surface treatment layer 160 is further formed on the end surface 151 of each of the conductive metal blocks 150 to protect the conductive metal block 150.

The circuit board and the manufacturing method thereof are provided. The conductive metal block 150 is formed in the dielectric layer 120, and the opening 121 for receiving the conductive metal block 150 in the dielectric layer 120 is a stepped hole. Compared with the prior art, forming an opening in the solder resist layer and then forming a metal bump protruding from the surface of the solder resist layer can increase the contact area of the conductive metal block 150 with the dielectric layer 120. Compared with the solder resist layer, the dielectric layer and metal bonding ability is superior to the solder resist layer and metal bonding ability. Therefore, the circuit board provided by the technical solution has better reliability.

Moreover, the openings in the dielectric layer are formed by one laser ablation, so that relatively densely-distributed openings can be formed, and relatively densely distributed conductive metal blocks can be formed to increase the wiring density of the circuit board.

However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

100. . . Circuit board

110. . . Circuit substrate

111. . . Base

112. . . Conductive pad

113. . . Conductive circuit layer

120. . . Dielectric layer

121. . . Opening

1211. . . First hole

1212. . . Second hole section

1213. . . Connection surface

122. . . First surface

130. . . Metal seed layer

140. . . Plating metal material

150. . . Conductive metal block

151. . . End face

152. . . Connection

153. . . Carrying part

160. . . Surface treatment layer

1 is a schematic cross-sectional view of a circuit substrate provided by an embodiment of the present technical solution.

FIG. 2 is a schematic cross-sectional view showing a state in which a dielectric layer is laminated on a side of a circuit substrate of FIG. 1. FIG.

3 is a schematic cross-sectional view showing an opening in the dielectric layer of FIG. 2.

4 is a schematic cross-sectional view showing the surface of the dielectric layer and the inner wall of the opening of FIG. 3 after forming a metal seed layer.

Figure 5 is a schematic cross-sectional view showing the formation of a plated metal material on the surface of the metal seed layer of Figure 4.

6 is a schematic cross-sectional view of a circuit board provided by the present technical solution.

Figure 7 is a schematic cross-sectional view showing the surface of the conductive metal block of the circuit board of Figure 6 after the surface treatment layer is formed.

100. . . Circuit board

111. . . Base

112. . . Conductive pad

120. . . Dielectric layer

121. . . Opening

130. . . Metal seed layer

140. . . Plating metal material

150. . . Conductive metal block

151. . . End face

152. . . Connection

153. . . Carrying part

Claims (11)

A method of manufacturing a circuit board, comprising the steps of:
Providing a circuit substrate comprising a substrate and a conductive pad formed on a surface of the substrate;
Pressing a dielectric layer on a side of the circuit substrate having a conductive pad, the dielectric layer having a first surface away from the substrate;
Forming, by using a laser, a plurality of openings corresponding to the conductive pads in a one-to-one manner in the dielectric layer, each of the openings being a stepped hole, wherein the opening comprises a first hole segment and a second hole segment connected to each other The first hole segment is adjacent to the conductive pad, the second hole segment is adjacent to the first surface, the second hole segment has a larger aperture than the first hole segment; and a conductive metal block is formed in the opening, each The conductive metal blocks are electrically connected to the corresponding conductive pads. The method of fabricating a circuit board according to claim 1, wherein each of the conductive metal blocks has an end surface away from the corresponding conductive pad, and the end surface is flush with the first surface. The method of fabricating a circuit board according to claim 1, wherein the forming a conductive metal block in the opening comprises the steps of:
Forming a metal seed layer on the inner wall of the opening and the first surface of the dielectric layer;
Forming a plated metal material on the surface of the metal seed layer by electroplating so that the opening is completely filled; and removing the plated metal material and the metal seed layer of the first surface of the dielectric layer, and plating metal material located in the opening And the metal seed layer forms a conductive metal block. The method of fabricating a circuit board according to claim 1, wherein the opening is formed by using a pseudo-molecular laser. The manufacturing method of the circuit board of claim 1, wherein the connection between the first hole segment and the second hole segment is formed with a connection surface, the connection surface being exposed from a side of the second hole segment, the connection surface Parallel to the first surface. The manufacturing method of the circuit board of claim 1, wherein the conductive metal block comprises a connecting portion and a carrying portion connected to each other, the connecting portion is located in the first hole segment, and the bearing portion is located in the first In the two-hole section, the connecting portion is connected between the corresponding conductive pad and the carrying portion, and the connecting portion has a cross-sectional area smaller than a cross-sectional area of the carrying portion. The method of manufacturing a circuit board according to claim 1, further comprising forming a surface treatment layer on the end surface. A circuit board comprising a substrate, a conductive pad, a dielectric layer and a conductive metal block, the conductive pad being formed on a surface of the substrate, the dielectric laminate being bonded to a side of the substrate having a conductive pad, the dielectric The layer has a first surface away from the substrate, and an opening corresponding to the conductive pad is formed in the dielectric layer, the opening is a stepped hole, and each of the openings comprises a first hole segment and a second hole segment connected to each other a first hole segment adjacent to the conductive pad, the second hole segment being adjacent to the first surface, the second hole segment having a larger aperture than the first hole segment, the conductive metal block being formed in the opening, and completely filling the hole Open the hole. The circuit board of claim 8, wherein the conductive metal block comprises a connecting portion and a bearing portion connected to each other, the connecting portion is located in the first hole segment, and the bearing portion is located in the second hole segment The connecting portion is connected between the corresponding conductive pad and the carrying portion, and the connecting portion has a cross-sectional area smaller than a cross-sectional area of the carrying portion. The circuit board of claim 8, wherein each of the conductive metal blocks has an end surface remote from the corresponding conductive pad, the end surface being flush with the first surface. The circuit board of claim 10, wherein the end surface is formed with a surface treatment layer.