[go: up one dir, main page]

CN103857197A - Circuit board and manufacturing method of circuit board - Google Patents

Circuit board and manufacturing method of circuit board Download PDF

Info

Publication number
CN103857197A
CN103857197A CN201210511978.5A CN201210511978A CN103857197A CN 103857197 A CN103857197 A CN 103857197A CN 201210511978 A CN201210511978 A CN 201210511978A CN 103857197 A CN103857197 A CN 103857197A
Authority
CN
China
Prior art keywords
hole section
conductive pad
circuit board
dielectric layer
perforate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201210511978.5A
Other languages
Chinese (zh)
Inventor
胡文宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hongqisheng Precision Electronics Qinhuangdao Co Ltd
Zhending Technology Co Ltd
Zhen Ding Technology Co Ltd
Original Assignee
Hongqisheng Precision Electronics Qinhuangdao Co Ltd
Zhending Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hongqisheng Precision Electronics Qinhuangdao Co Ltd, Zhending Technology Co Ltd filed Critical Hongqisheng Precision Electronics Qinhuangdao Co Ltd
Priority to CN201210511978.5A priority Critical patent/CN103857197A/en
Priority to TW101150396A priority patent/TWI463931B/en
Publication of CN103857197A publication Critical patent/CN103857197A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

一种电路板,其包括基底、导电垫、介电层及导电金属块,所述导电垫形成于基底的一表面,所述介电层压合于基底具有导电垫的一侧,所述介电层具有远离基底的第一表面,在介电层内形成有与导电垫对应开孔,所述开孔为阶梯孔,每个所述开孔包括相互连接的第一孔段和第二孔段,第一孔段与导电垫相邻,第二孔段与第一表面相邻,第二孔段的孔径大于第一孔段的孔径,导电金属块形成于开孔内,并完全填充所述开孔。本发明还提供一种所述电路板的制作方法。

A circuit board, which includes a base, a conductive pad, a dielectric layer and a conductive metal block, the conductive pad is formed on a surface of the base, the dielectric layer is pressed on the side of the base with the conductive pad, the dielectric The electrical layer has a first surface away from the substrate, and openings corresponding to the conductive pads are formed in the dielectric layer, the openings are stepped holes, and each opening includes a first hole segment and a second hole connected to each other Section, the first hole section is adjacent to the conductive pad, the second hole section is adjacent to the first surface, the aperture of the second hole section is larger than the aperture of the first hole section, and the conductive metal block is formed in the opening and completely fills the hole. Describe the opening. The invention also provides a manufacturing method of the circuit board.

Description

电路板及其制作方法Circuit board and manufacturing method thereof

技术领域 technical field

本发明涉及电路板制作技术领域,尤其涉及一种电路板及其制作方法。 The invention relates to the technical field of circuit board production, in particular to a circuit board and a production method thereof.

背景技术 Background technique

采用倒装芯片球栅格阵列(FCBGA)进行封装芯片的电路板,通常需要制作阵列排布的多个导电凸块结构,以用于承载锡球。所述导电凸块需要贯穿防焊层并与对应的导电线路相互电连接。现有技术中,通常采用在所述导电线路上形成对应的防焊层开口,然后在防焊层上形成电镀阻挡层,并在电镀阻挡层中形成与防焊层开口对应的电镀阻挡层。由于防焊层开口和电镀阻挡层开口均需要显影形成,并且需要相互连通,在制作过程中需要对应的电镀阻挡层开口与防焊层开口进行对位。之后,在防焊层的开口内化学镀然后电镀的方式形成导电凸块。最后,去除电镀阻挡层,得到凸出于防焊层的导电凸块。在上述的制作方法中,需要将防焊层开口制作的相对较大,以便于显影形成电镀阻挡层开口时进行对位。并且,由于形成的导电凸块与防焊层相互接触,且接触面积较小,从而容易导致导电凸块于防焊层相互分离,得到的电路板的信赖性较差。并且,这样的制作方法决定了制作的导电凸块结构的分布密度较小,不利于多个导电凸块结构密集分布。 A circuit board that uses a flip-chip ball grid array (FCBGA) to package chips usually needs to make a plurality of conductive bump structures arranged in an array for carrying solder balls. The conductive bumps need to penetrate through the solder resist layer and be electrically connected to corresponding conductive lines. In the prior art, it is common to form corresponding openings in the solder resist layer on the conductive lines, then form an electroplating barrier layer on the solder resist layer, and form an electroplating barrier layer corresponding to the openings in the solder resist layer in the electroplating barrier layer. Since both the openings of the solder resist layer and the openings of the electroplating barrier layer need to be developed and communicated with each other, the corresponding openings of the electroplating barrier layer and the openings of the solder resist layer need to be aligned during the manufacturing process. Afterwards, conductive bumps are formed in the openings of the solder resist layer by means of electroless plating and then electroplating. Finally, the electroplating barrier layer is removed to obtain conductive bumps protruding from the solder resist layer. In the above manufacturing method, the opening of the solder resist layer needs to be made relatively large, so as to facilitate the alignment when developing and forming the opening of the electroplating barrier layer. Moreover, since the formed conductive bumps and the solder resist layer are in contact with each other, and the contact area is small, the conductive bumps and the solder resist layer are easily separated from each other, and the reliability of the obtained circuit board is poor. Moreover, such a manufacturing method determines that the distribution density of the manufactured conductive bump structures is relatively small, which is not conducive to the dense distribution of multiple conductive bump structures.

发明内容 Contents of the invention

因此,有必要提供一种电路板及其制作方法,可以提高电路板的导电金属块的信赖性。 Therefore, it is necessary to provide a circuit board and a manufacturing method thereof, which can improve the reliability of the conductive metal block of the circuit board.

一种电路板的制作方法,包括步骤:提供电路基板,其包括基底及形成于基底一表面的导电垫;在所述电路基板具有导电垫的一侧压合介电层,所述介电层具有远离所述基底的第一表面;采用激光在介电层内形成多个与导电垫一一对应的多个开孔,每个所述开孔为阶梯孔,所述开孔包括相互连接的第一孔段和第二孔段,第一孔段与导电垫相邻,第二孔段与第一表面相邻,第二孔段的孔径大于第一孔段的孔径;以及在所述开孔内形成导电金属块,每个导电金属块与对应的导电垫相互电连接。 A method for manufacturing a circuit board, comprising the steps of: providing a circuit substrate, which includes a base and a conductive pad formed on one surface of the base; pressing a dielectric layer on the side of the circuit substrate with the conductive pad, the dielectric layer It has a first surface away from the base; a plurality of openings corresponding to the conductive pads are formed in the dielectric layer by using a laser, each of the openings is a stepped hole, and the openings include interconnected The first hole segment and the second hole segment, the first hole segment is adjacent to the conductive pad, the second hole segment is adjacent to the first surface, and the aperture of the second hole segment is larger than the aperture of the first hole segment; and in the opening Conductive metal blocks are formed in the holes, and each conductive metal block is electrically connected to a corresponding conductive pad.

一种电路板,其包括基底、导电垫、介电层及导电金属块,所述导电垫形成于基底的一表面,所述介电层压合于基底具有导电垫的一侧,所述介电层具有远离基底的第一表面,在介电层内形成有与导电垫对应开孔,所述开孔为阶梯孔,每个所述开孔包括相互连接的第一孔段和第二孔段,第一孔段与导电垫相邻,第二孔段与第一表面相邻,第二孔段的孔径大于第一孔段的孔径,导电金属块形成于开孔内,并完全填充所述开孔。 A circuit board, which includes a base, a conductive pad, a dielectric layer and a conductive metal block, the conductive pad is formed on a surface of the base, the dielectric layer is pressed on the side of the base with the conductive pad, the dielectric The electrical layer has a first surface away from the substrate, and openings corresponding to the conductive pads are formed in the dielectric layer, the openings are stepped holes, and each opening includes a first hole segment and a second hole connected to each other segment, the first hole segment is adjacent to the conductive pad, the second hole segment is adjacent to the first surface, the aperture of the second hole segment is larger than the aperture of the first hole segment, and the conductive metal block is formed in the opening and completely fills the Describe the opening.

与现有技术相比,本技术方案提供的电路板及其制作方法,由于导电金属块形成于介电层内,且介电层内的用于收容导电金属块的开孔为阶梯孔。相比于现有技术中,在防焊层中形成开口,然后形成凸出于防焊层表面金属凸块,可以增加导电金属块与介电层的接触面积。相比于防焊层,介电层与金属的结合能力优于防焊层与金属的结合能力。因此,本技术方案提供的电路板的信赖性较好。 Compared with the prior art, in the circuit board and its manufacturing method provided by the technical solution, the conductive metal blocks are formed in the dielectric layer, and the openings in the dielectric layer for accommodating the conductive metal blocks are stepped holes. Compared with the prior art, forming an opening in the solder resist layer and then forming a metal bump protruding from the surface of the solder resist layer can increase the contact area between the conductive metal block and the dielectric layer. Compared with the solder mask layer, the bonding ability of the dielectric layer to the metal is better than that of the solder mask layer to the metal. Therefore, the reliability of the circuit board provided by the technical solution is better.

附图说明 Description of drawings

图1是本技术方案实施例提供的电路基板的剖面示意图。 FIG. 1 is a schematic cross-sectional view of a circuit substrate provided by an embodiment of the technical solution.

图2是图1的电路基板一侧压合介电层后的剖面示意图。 FIG. 2 is a schematic cross-sectional view of one side of the circuit substrate in FIG. 1 after lamination of a dielectric layer.

图3是在图2的介电层中形成开孔后的剖面示意图。 FIG. 3 is a schematic cross-sectional view after openings are formed in the dielectric layer of FIG. 2 .

图4是图3的介电层表面及开孔内壁形成金属种子层后的剖面示意图。 FIG. 4 is a schematic cross-sectional view of the surface of the dielectric layer and the inner wall of the opening in FIG. 3 after a metal seed layer is formed.

图5是在图4的金属种子层表面形成电镀金属材料后的剖面示意图。 FIG. 5 is a schematic cross-sectional view after forming an electroplated metal material on the surface of the metal seed layer in FIG. 4 .

图6是本技术方案提供的电路板的剖面示意图。 Fig. 6 is a schematic cross-sectional view of the circuit board provided by the technical solution.

图7是在图6的电路板的导电金属块表面形成表面处理层后的剖面示意图。 FIG. 7 is a schematic cross-sectional view after forming a surface treatment layer on the surface of the conductive metal block of the circuit board in FIG. 6 .

主要元件符号说明 Description of main component symbols

电路基板circuit board 110110 基底base 111111 导电垫conductive pad 112112 导电线路层Conductive circuit layer 113113 介电层Dielectric layer 120120 开孔opening 121121 第一孔段first hole section 12111211 第二孔段Second Hole Section 12121212 连接面connection surface 12131213 第一表面first surface 122122 金属种子层metal seed layer 130130 电镀金属材料Electroplated metal material 140140 导电金属块conductive metal block 150150 端面end face 151151 连接部Connection 152152 承载部Loading part 153153 表面处理层surface treatment layer 160160

如下具体实施方式将结合上述附图进一步说明本发明。 The following specific embodiments will further illustrate the present invention in conjunction with the above-mentioned drawings.

具体实施方式 Detailed ways

本技术方案提供的电路板制作方法包括如下步骤: The circuit board manufacturing method provided by the technical solution includes the following steps:

第一步,请参阅图1,提供电路基板110。 The first step, please refer to FIG. 1 , is to provide a circuit substrate 110 .

所述电路基板110包括基底111及多个导电垫112。 The circuit substrate 110 includes a base 111 and a plurality of conductive pads 112 .

电路基板110可以为单层电路基板也可以为多层电路基板。当电路基板110为单层电路基板时,基底111为单层的介电层。当电路基板110为多层电路基板时,基底111可以为多层导电线路层及多层介电层交替层叠的结构。多个导电垫112与基底111的一层介电层相接触。本实施例中,基底111的一表面形成有导电线路层113,导电线路层113包括多个导电垫112及多根导电线路(图未示)。 The circuit substrate 110 may be a single-layer circuit substrate or a multi-layer circuit substrate. When the circuit substrate 110 is a single-layer circuit substrate, the base 111 is a single-layer dielectric layer. When the circuit substrate 110 is a multilayer circuit substrate, the base 111 may be a structure in which multiple layers of conductive circuits and multiple layers of dielectric layers are alternately stacked. A plurality of conductive pads 112 are in contact with a dielectric layer of the substrate 111 . In this embodiment, a conductive circuit layer 113 is formed on a surface of the base 111 , and the conductive circuit layer 113 includes a plurality of conductive pads 112 and a plurality of conductive circuits (not shown).

第二步,请参阅图2,在电路基板110的多个导电垫112表面及从导电线路层113露出的基底111的表面形成介电层120。 The second step, please refer to FIG. 2 , is to form a dielectric layer 120 on the surface of the plurality of conductive pads 112 of the circuit substrate 110 and the surface of the substrate 111 exposed from the conductive circuit layer 113 .

本步骤中,介电层120通过压合的方式形成于多个导电垫112表面及从导电垫112露出的基底111,使得介电层120完全覆盖导电线路层113。介电层120具有远离基底111的第一表面122。 In this step, the dielectric layer 120 is formed on the surfaces of the plurality of conductive pads 112 and the base 111 exposed from the conductive pads 112 by pressing, so that the dielectric layer 120 completely covers the conductive circuit layer 113 . The dielectric layer 120 has a first surface 122 away from the substrate 111 .

第三步,请参阅图3,采用激光在介电层120内形成有多个开孔121,每个开孔121与一个导电垫112相互对应,每个导电垫112从对应的开孔121露出。 The third step, referring to FIG. 3 , is to use a laser to form a plurality of openings 121 in the dielectric layer 120, each opening 121 corresponds to a conductive pad 112, and each conductive pad 112 is exposed from the corresponding opening 121 .

本步骤中,采用准分子激光形成开孔121。开孔121呈阶梯状。开孔121包括相互连通的第一孔段1211和第二孔段1212。第一孔段1211与导电垫112相邻,第二孔段1212靠近第一表面122。其中,第一孔段1211的孔径小于第二孔段1212的孔径。优选地,第一孔段1211与第二孔段1212同轴设置。由于开孔121采用激光形成,第一孔段1211及第二孔段1212的纵截面均为倒梯形。在第一孔段1211和第二孔段1212的连接处,形成有连接面1213,所述连接面1213从第二孔段1212一侧露出,所述连接面1213大致平行于第一表面122。 In this step, an excimer laser is used to form the opening 121 . The opening 121 is stepped. The opening 121 includes a first hole segment 1211 and a second hole segment 1212 that communicate with each other. The first hole segment 1211 is adjacent to the conductive pad 112 , and the second hole segment 1212 is close to the first surface 122 . Wherein, the diameter of the first hole section 1211 is smaller than the diameter of the second hole section 1212 . Preferably, the first hole segment 1211 and the second hole segment 1212 are arranged coaxially. Since the opening 121 is formed by laser, the longitudinal sections of the first hole section 1211 and the second hole section 1212 are both inverted trapezoidal. A connection surface 1213 is formed at the junction of the first hole section 1211 and the second hole section 1212 , the connection surface 1213 is exposed from the side of the second hole section 1212 , and the connection surface 1213 is substantially parallel to the first surface 122 .

由于开孔121采用准分子激光形成,在形成准分子激光时,可以通过控制不同位置的激光的能量,即位于开孔121中心区域,采用较大的能量,使得介电层120被完全贯穿,同时形成第一孔段1211和第二孔段1212。在外绕中心区域的边缘区域,采用较小的激光能量,使得仅部分的介电层120被烧蚀去除,仅形成第二孔段1212,从而得到阶梯形状的开孔121。 Since the opening 121 is formed by an excimer laser, when the excimer laser is formed, the energy of the laser at different positions can be controlled, that is, it is located in the central area of the opening 121, and a larger energy is used to completely penetrate the dielectric layer 120. The first hole segment 1211 and the second hole segment 1212 are formed simultaneously. In the peripheral area surrounding the central area, a smaller laser energy is used, so that only part of the dielectric layer 120 is ablated and removed, and only the second hole segment 1212 is formed, thereby obtaining the stepped opening 121 .

第四步,请参阅图4至图6,在每个开孔121内形成导电金属块150,得到电路板100。 In the fourth step, referring to FIGS. 4 to 6 , a conductive metal block 150 is formed in each opening 121 to obtain a circuit board 100 .

本步骤具体为: This step is specifically:

首先,在开孔121的内壁及介电层120的第一表面122形成金属种子层130。 First, the metal seed layer 130 is formed on the inner wall of the opening 121 and the first surface 122 of the dielectric layer 120 .

所述金属种子层130可以采用化学镀金属的方式形成。如化学镀铜的方式形成。当然,金属种子层130也可以采用黑影等方式,使得开孔121的内壁及介电层120的表面形成金属种子层130。 The metal seed layer 130 can be formed by electroless metal plating. For example, it is formed by electroless copper plating. Of course, the metal seed layer 130 can also be formed in a black shadow, etc., so that the inner wall of the opening 121 and the surface of the dielectric layer 120 form the metal seed layer 130 .

然后,通过电镀的方式,在金属种子层130表面形成电镀金属材料140,使得所述开孔121被完全填充。 Then, an electroplating metal material 140 is formed on the surface of the metal seed layer 130 by means of electroplating, so that the openings 121 are completely filled.

本步骤中,电镀的金属材料可以为铜、银等。本实施例中,电镀金属材料140完全填充开孔121,并形成在介电层120的第一表面122的金属种子层130的表面。 In this step, the metal material for electroplating may be copper, silver or the like. In this embodiment, the electroplated metal material 140 completely fills the opening 121 and is formed on the surface of the metal seed layer 130 on the first surface 122 of the dielectric layer 120 .

最后,去除介电层120的第一表面122的电镀金属材料140及金属种子层130,位于开孔121内的电镀金属材料140及金属种子层130形成导电金属块150,从而得到电路板100。 Finally, the electroplated metal material 140 and the metal seed layer 130 on the first surface 122 of the dielectric layer 120 are removed, and the electroplated metal material 140 and the metal seed layer 130 in the opening 121 form a conductive metal block 150 , thereby obtaining the circuit board 100 .

本步骤中,可以采用化学蚀刻的方式去除介电层120的第一表面122的电镀金属材料140及金属种子层130。通过控制蚀刻的时间,使得开孔121内的电镀金属材料140及金属种子层130仍留在开孔121内形成导电金属块150。导电金属块150具有远离导电垫112的端面151。所述端面151与第一表面122平齐。 In this step, the electroplated metal material 140 and the metal seed layer 130 on the first surface 122 of the dielectric layer 120 may be removed by chemical etching. By controlling the etching time, the electroplated metal material 140 and the metal seed layer 130 in the opening 121 remain in the opening 121 to form the conductive metal block 150 . The conductive metal block 150 has an end surface 151 away from the conductive pad 112 . The end surface 151 is flush with the first surface 122 .

导电金属块150包括相互连接的连接部152及承载部153。所述连接部152的位于所述第一孔段1211内,所述承载部153位于第二孔段1212内。连接部152的形状与第一孔段1211的形状相对应,承载部153的形状与第二孔段1212的形状相对应。所述连接部152电连接导电垫112及承载部153,承载部153用于与其他元件进行焊接。连接部152及承载部153均为倒圆台形,连接部152的横截面积小于承载部153的横截面积。 The conductive metal block 150 includes a connection portion 152 and a bearing portion 153 connected to each other. The connecting portion 152 is located in the first hole section 1211 , and the carrying portion 153 is located in the second hole section 1212 . The shape of the connecting portion 152 corresponds to the shape of the first hole segment 1211 , and the shape of the bearing portion 153 corresponds to the shape of the second hole segment 1212 . The connection portion 152 is electrically connected to the conductive pad 112 and the carrying portion 153 , and the carrying portion 153 is used for soldering with other components. Both the connecting portion 152 and the carrying portion 153 are rounded truncated, and the cross-sectional area of the connecting portion 152 is smaller than that of the carrying portion 153 .

请参阅图7,本技术方案提供的电路板制作方法,还可以包括在端面151形成表面处理层160的步骤。所述表面处理层160可以为有机保焊层,也可以为镍金镀层等,以保护导电金属块150。 Please refer to FIG. 7 , the circuit board manufacturing method provided by this technical solution may further include a step of forming a surface treatment layer 160 on the end surface 151 . The surface treatment layer 160 can be an organic solder protection layer, or a nickel-gold plating layer to protect the conductive metal block 150 .

请参阅图6及图7,本技术方案还提供一种采用上述方法制得的电路板100,所述电路板100包括基底111、导电垫112、介电层120及导电金属块150。 Please refer to FIG. 6 and FIG. 7 , the technical solution also provides a circuit board 100 manufactured by the above method, and the circuit board 100 includes a base 111 , a conductive pad 112 , a dielectric layer 120 and a conductive metal block 150 .

所述导电垫112形成于基底111的一表面。所述介电层120压合于基底111具有导电垫112的一侧。在介电层120内形成有开孔121,开孔121为阶梯孔。所述介电层120具有远离基底111的第一表面122。导电金属块150形成于开孔121内,并与对应的导电垫112相互电连接。导电金属块150具有远离对应的导电垫112的端面151,端面151与介电层120的第一表面122平齐。 The conductive pad 112 is formed on a surface of the base 111 . The dielectric layer 120 is pressed against the side of the substrate 111 having the conductive pad 112 . An opening 121 is formed in the dielectric layer 120, and the opening 121 is a stepped hole. The dielectric layer 120 has a first surface 122 away from the substrate 111 . The conductive metal block 150 is formed in the opening 121 and is electrically connected to the corresponding conductive pad 112 . The conductive metal block 150 has an end surface 151 away from the corresponding conductive pad 112 , and the end surface 151 is flush with the first surface 122 of the dielectric layer 120 .

导电金属块150包括相互连接的连接部152及承载部153。所述连接部152的位于所述第一孔段1211内,所述承载部153位于第二孔段1212内。连接部152的形状与第一孔段1211的形状相对应,承载部153的形状与第二孔段1212的形状相对应。所述连接部152电连接导电垫112及承载部153,承载部153用于与其他元件进行焊接。连接部152及承载部153均为倒圆台形,连接部152的横截面积小于承载部153的横截面积。 The conductive metal block 150 includes a connection portion 152 and a bearing portion 153 connected to each other. The connecting portion 152 is located in the first hole section 1211 , and the carrying portion 153 is located in the second hole section 1212 . The shape of the connecting portion 152 corresponds to the shape of the first hole segment 1211 , and the shape of the bearing portion 153 corresponds to the shape of the second hole segment 1212 . The connection portion 152 is electrically connected to the conductive pad 112 and the carrying portion 153 , and the carrying portion 153 is used for soldering with other components. Both the connecting portion 152 and the carrying portion 153 are rounded truncated, and the cross-sectional area of the connecting portion 152 is smaller than that of the carrying portion 153 .

导电金属块150由与开孔121的内壁相接触的金属种子层130及形成于金属种子层130表面的电镀金属材料140组成。 The conductive metal block 150 is composed of the metal seed layer 130 contacting the inner wall of the opening 121 and the electroplated metal material 140 formed on the surface of the metal seed layer 130 .

进一步的,在每个导电金属块150的端面151还形成有表面处理层160,以保护导电金属块150。 Further, a surface treatment layer 160 is formed on the end face 151 of each conductive metal block 150 to protect the conductive metal block 150 .

本技术方案提供的电路板及其制作方法,由于导电金属块150形成于介电层120内,且介电层120内的用于收容导电金属块150的开孔121为阶梯孔。相比于现有技术中,在防焊层中形成开口,然后形成凸出于防焊层表面金属凸块,可以增加导电金属块150与介电层120的接触面积。相比于防焊层,介电层与金属的结合能力优于防焊层与金属的结合能力。因此,本技术方案提供的电路板的信赖性较好。 In the circuit board and its manufacturing method provided by this technical solution, the conductive metal block 150 is formed in the dielectric layer 120, and the opening 121 in the dielectric layer 120 for accommodating the conductive metal block 150 is a stepped hole. Compared with the prior art, forming an opening in the solder resist layer and then forming a metal bump protruding from the surface of the solder resist layer can increase the contact area between the conductive metal block 150 and the dielectric layer 120 . Compared with the solder mask layer, the bonding ability of the dielectric layer to the metal is better than that of the solder mask layer to the metal. Therefore, the reliability of the circuit board provided by the technical solution is better.

并且,介电层中的开孔采用一次激光烧蚀形成,从而可以形成比较密集分布的开孔,近而可以形成比较密集分布的导电金属块,提高电路板的布线密度。 In addition, the openings in the dielectric layer are formed by laser ablation once, so that densely distributed openings can be formed, and relatively densely distributed conductive metal blocks can be formed to increase the wiring density of the circuit board.

可以理解的是,对于本领域的普通技术人员来说,可以根据本发明的技术构思做出其它各种相应的改变与变形,而所有这些改变与变形都应属于本发明权利要求的保护范围。 It can be understood that those skilled in the art can make various other corresponding changes and modifications according to the technical concept of the present invention, and all these changes and modifications should belong to the protection scope of the claims of the present invention.

Claims (11)

1. a manufacture method for circuit board, comprises step:
Circuit substrate is provided, and it comprises substrate and is formed at the conductive pad on substrate one surface;
Dielectric layer is closed in one side pressure at described circuit substrate with conductive pad, and described dielectric layer has the first surface away from described substrate;
Adopt laser in dielectric layer, to form multiple and conductive pad multiple perforates one to one, each described perforate is shoulder hole, described perforate comprises interconnective the first hole section and the second hole section, the first hole section is adjacent with conductive pad, the second hole section is adjacent with first surface, and the aperture of the second hole section is greater than the aperture of the first hole section; And
In described perforate, form conducting metal piece, each conducting metal piece is electrically connected mutually with corresponding conductive pad.
2. the manufacture method of circuit board as claimed in claim 1, is characterized in that, each conducting metal piece has the end face away from corresponding conductive pad, and described end face is concordant with first surface.
3. the manufacture method of circuit board as claimed in claim 1, is characterized in that, forms conducting metal piece and comprise step in described perforate:
Form metal seed layer at the inwall of perforate and the first surface of dielectric layer;
By the mode of electroplating, form electroplating metal material on metal seed layer surface, described perforate is completely filled; And
Remove electroplating metal material and the metal seed layer of the first surface of dielectric layer, the electroplating metal material and the metal seed layer that are positioned at perforate form conducting metal piece.
4. the manufacture method of circuit board as claimed in claim 1, is characterized in that, adopts excimer laser to form described perforate.
5. the manufacture method of circuit board as claimed in claim 1, is characterized in that, described the first hole section and the second section junction, hole are formed with joint face, and described joint face exposes from the second hole section one side, and described joint face is parallel to first surface.
6. the manufacture method of circuit board as claimed in claim 1, it is characterized in that, described conducting metal piece comprises interconnective connecting portion and supporting part, described connecting portion be positioned at described the first hole section, described supporting part is positioned at the second hole section, described connecting portion is connected between corresponding conductive pad and supporting part, and the cross-sectional area of described connecting portion is less than the cross-sectional area of supporting part.
7. the manufacture method of circuit board as claimed in claim 1, is characterized in that, is also included in described end face and forms surface-treated layer.
8. a circuit board, it comprises substrate, conductive pad, dielectric layer and conducting metal piece, described conductive pad is formed at a surface of substrate, described dielectric layer is pressed on substrate and has a side of conductive pad, described dielectric layer has the first surface away from substrate, in dielectric layer, be formed with perforate corresponding to conductive pad, described perforate is shoulder hole, each described perforate comprises interconnective the first hole section and the second hole section, the first hole section is adjacent with conductive pad, the second hole section is adjacent with first surface, the aperture of the second hole section is greater than the aperture of the first hole section, conducting metal piece is formed in perforate, and fill described perforate completely.
9. circuit board as claimed in claim 8, it is characterized in that, described conducting metal piece comprises interconnective connecting portion and supporting part, described connecting portion be positioned at described the first hole section, described supporting part is positioned at the second hole section, described connecting portion is connected between corresponding conductive pad and supporting part, and the cross-sectional area of described connecting portion is less than the cross-sectional area of supporting part.
10. circuit board as claimed in claim 8, is characterized in that, each conducting metal piece has the end face away from corresponding conductive pad, and described end face is concordant with first surface.
11. circuit boards as claimed in claim 10, is characterized in that, described end face is formed with surface-treated layer.
CN201210511978.5A 2012-12-04 2012-12-04 Circuit board and manufacturing method of circuit board Pending CN103857197A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201210511978.5A CN103857197A (en) 2012-12-04 2012-12-04 Circuit board and manufacturing method of circuit board
TW101150396A TWI463931B (en) 2012-12-04 2012-12-27 Circuit board and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210511978.5A CN103857197A (en) 2012-12-04 2012-12-04 Circuit board and manufacturing method of circuit board

Publications (1)

Publication Number Publication Date
CN103857197A true CN103857197A (en) 2014-06-11

Family

ID=50864265

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210511978.5A Pending CN103857197A (en) 2012-12-04 2012-12-04 Circuit board and manufacturing method of circuit board

Country Status (2)

Country Link
CN (1) CN103857197A (en)
TW (1) TWI463931B (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106332436A (en) * 2015-06-26 2017-01-11 健鼎(无锡)电子有限公司 Circuit board and manufacturing method thereof
CN107689358A (en) * 2016-08-04 2018-02-13 胡迪群 Metal pad structure
CN107808859A (en) * 2016-09-09 2018-03-16 思鹭科技股份有限公司 Semiconductor structure
CN111212527A (en) * 2020-01-15 2020-05-29 广东科翔电子科技股份有限公司 Through hole filling and plating method applied to optical module high-density interconnection HDI board
CN112752429A (en) * 2019-10-31 2021-05-04 鹏鼎控股(深圳)股份有限公司 Multilayer circuit board and manufacturing method thereof
CN112888152A (en) * 2014-11-21 2021-06-01 安费诺公司 Mating backplane for high speed, high density electrical connectors
US12095218B2 (en) 2019-05-20 2024-09-17 Amphenol Corporation High density, high speed electrical connector
US12171063B2 (en) 2018-06-11 2024-12-17 Amphenol Corporation Backplane footprint for high speed, high density electrical connectors
US12207395B2 (en) 2016-03-08 2025-01-21 Amphenol Corporation Backplane footprint for high speed, high density electrical connectors
US12300942B2 (en) 2014-01-22 2025-05-13 Amphenol Corporation Very high speed, high density electrical interconnection system with broadside subassemblies

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10163801B2 (en) * 2016-10-14 2018-12-25 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of chip package with fan-out structure

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI239594B (en) * 2004-10-06 2005-09-11 Advanced Semiconductor Eng Redistribution layer structure of a wafer and the fabrication method thereof

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12300942B2 (en) 2014-01-22 2025-05-13 Amphenol Corporation Very high speed, high density electrical interconnection system with broadside subassemblies
US12309915B2 (en) 2014-11-21 2025-05-20 Amphenol Corporation Mating backplane for high speed, high density electrical connector
CN112888152A (en) * 2014-11-21 2021-06-01 安费诺公司 Mating backplane for high speed, high density electrical connectors
US11950356B2 (en) 2014-11-21 2024-04-02 Amphenol Corporation Mating backplane for high speed, high density electrical connector
CN112888152B (en) * 2014-11-21 2024-06-07 安费诺公司 Matched backboard for high-speed and high-density electric connector
CN106332436B (en) * 2015-06-26 2019-05-14 健鼎(湖北)电子有限公司 Circuit board and preparation method thereof
CN106332436A (en) * 2015-06-26 2017-01-11 健鼎(无锡)电子有限公司 Circuit board and manufacturing method thereof
US12207395B2 (en) 2016-03-08 2025-01-21 Amphenol Corporation Backplane footprint for high speed, high density electrical connectors
CN107689358A (en) * 2016-08-04 2018-02-13 胡迪群 Metal pad structure
CN107808859A (en) * 2016-09-09 2018-03-16 思鹭科技股份有限公司 Semiconductor structure
US12171063B2 (en) 2018-06-11 2024-12-17 Amphenol Corporation Backplane footprint for high speed, high density electrical connectors
US12095218B2 (en) 2019-05-20 2024-09-17 Amphenol Corporation High density, high speed electrical connector
CN112752429B (en) * 2019-10-31 2022-08-16 鹏鼎控股(深圳)股份有限公司 Multilayer circuit board and manufacturing method thereof
US11297722B2 (en) 2019-10-31 2022-04-05 Avary Holding (Shenzhen) Co., Limited. Multi-layered circuit board
CN112752429A (en) * 2019-10-31 2021-05-04 鹏鼎控股(深圳)股份有限公司 Multilayer circuit board and manufacturing method thereof
CN111212527A (en) * 2020-01-15 2020-05-29 广东科翔电子科技股份有限公司 Through hole filling and plating method applied to optical module high-density interconnection HDI board

Also Published As

Publication number Publication date
TW201424497A (en) 2014-06-16
TWI463931B (en) 2014-12-01

Similar Documents

Publication Publication Date Title
CN103857197A (en) Circuit board and manufacturing method of circuit board
US9693458B2 (en) Printed wiring board, method for manufacturing printed wiring board and package-on-package
JP5324051B2 (en) Wiring substrate manufacturing method, semiconductor device manufacturing method, and wiring substrate
JP4146864B2 (en) WIRING BOARD AND MANUFACTURING METHOD THEREOF, SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
JP4980295B2 (en) Wiring substrate manufacturing method and semiconductor device manufacturing method
JP2006186321A (en) Circuit board manufacturing method and electronic component mounting structure manufacturing method
JP6678090B2 (en) Electronic component built-in substrate, method of manufacturing the same, and electronic component device
TWI553787B (en) IC carrier board, semiconductor device having the same, and method of manufacturing the same
KR20150064976A (en) Printed circuit board and manufacturing method thereof
US20140332253A1 (en) Carrier substrate and manufacturing method thereof
US8120148B2 (en) Package structure with embedded die and method of fabricating the same
CN104425286A (en) IC carrier plate, semiconductor device having the same and manufacturing method of the IC carrier plate
TWI466611B (en) Chip package structure, circuit board with embedded components and manufacturing method thereof
JP2015198094A (en) Interposer, semiconductor device, and manufacturing method thereof
JP2015149325A (en) WIRING BOARD, SEMICONDUCTOR DEVICE, WIRING BOARD MANUFACTURING METHOD, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
JP2011014944A (en) Method of manufacturing electronic parts packaging structure
CN101145552A (en) Substrate for integrated circuit package and method for manufacturing the same
TWI498056B (en) Circuit board with embedded components, manufacturing method thereof and package structure
CN102711390B (en) Circuit board manufacturing method
JP2016111350A (en) Electronic packages and methods of making and using the same
TWI393229B (en) Packing substrate and method for manufacturing the same
CN104066270A (en) Surface coating used for circuit board, pad and circuit board
CN103650652A (en) The printed circuit board and the method for manufacturing the same
KR102141102B1 (en) Method for manufacturing semiconductor package substrate and semiconductor package substrate manufactured using the same
US9627224B2 (en) Semiconductor device with sloped sidewall and related methods

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20140611

WD01 Invention patent application deemed withdrawn after publication