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TW200503271A - Semiconductor device, manufacturing method thereof, and manufacturing method of metallic compound thin film - Google Patents

Semiconductor device, manufacturing method thereof, and manufacturing method of metallic compound thin film

Info

Publication number
TW200503271A
TW200503271A TW093108011A TW93108011A TW200503271A TW 200503271 A TW200503271 A TW 200503271A TW 093108011 A TW093108011 A TW 093108011A TW 93108011 A TW93108011 A TW 93108011A TW 200503271 A TW200503271 A TW 200503271A
Authority
TW
Taiwan
Prior art keywords
manufacturing
thin film
semiconductor device
metallic compound
compound thin
Prior art date
Application number
TW093108011A
Other languages
English (en)
Inventor
Kunihiko Iwamoto
Toshihide Nabatame
Koji Tominaga
Tetsuji Yasuda
Original Assignee
Rohm Co Ltd
Renesas Tech Corp
Horiba Ltd
Nat Inst Of Advanced Ind Scien
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd, Renesas Tech Corp, Horiba Ltd, Nat Inst Of Advanced Ind Scien filed Critical Rohm Co Ltd
Publication of TW200503271A publication Critical patent/TW200503271A/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28194Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28202Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Formation Of Insulating Films (AREA)
  • Electrodes Of Semiconductors (AREA)
TW093108011A 2003-03-25 2004-03-24 Semiconductor device, manufacturing method thereof, and manufacturing method of metallic compound thin film TW200503271A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003083687A JP4748927B2 (ja) 2003-03-25 2003-03-25 半導体装置

Publications (1)

Publication Number Publication Date
TW200503271A true TW200503271A (en) 2005-01-16

Family

ID=33094968

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093108011A TW200503271A (en) 2003-03-25 2004-03-24 Semiconductor device, manufacturing method thereof, and manufacturing method of metallic compound thin film

Country Status (6)

Country Link
US (2) US7372112B2 (zh)
EP (1) EP1610394A4 (zh)
JP (1) JP4748927B2 (zh)
KR (1) KR20050108414A (zh)
TW (1) TW200503271A (zh)
WO (1) WO2004086511A1 (zh)

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* Cited by examiner, † Cited by third party
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US7087480B1 (en) * 2002-04-18 2006-08-08 Taiwan Semiconductor Manufacturing Company, Ltd. Process to make high-k transistor dielectrics
JP4507232B2 (ja) * 2003-03-24 2010-07-21 ローム株式会社 半導体装置の製造方法
JP4499374B2 (ja) * 2003-05-14 2010-07-07 富士通株式会社 半導体装置及びその製造方法
KR20060072680A (ko) * 2004-12-23 2006-06-28 주식회사 하이닉스반도체 반도체 장치의 커패시터 및 그 제조방법
CN100424833C (zh) * 2005-05-12 2008-10-08 联华电子股份有限公司 制造掺杂氮的介电层的方法
JP4877934B2 (ja) * 2006-05-10 2012-02-15 麒麟麦酒株式会社 ガスバリア性プラスチック容器用のプリフォーム及びガスバリア性プラスチック容器の製造方法
JP2010278319A (ja) * 2009-05-29 2010-12-09 Renesas Electronics Corp 半導体装置およびその製造方法
JP2011003664A (ja) * 2009-06-17 2011-01-06 Renesas Electronics Corp 半導体装置およびその製造方法
US8887532B2 (en) 2010-08-24 2014-11-18 Corning Incorporated Glass-forming tools and methods
JP2012104569A (ja) * 2010-11-08 2012-05-31 Hitachi Kokusai Electric Inc 半導体装置の製造方法及び基板処理装置
JP6042160B2 (ja) * 2012-10-03 2016-12-14 東京エレクトロン株式会社 成膜方法及び成膜装置
US9644269B2 (en) 2014-01-30 2017-05-09 Varian Semiconductor Equipment Associates, Inc Diffusion resistant electrostatic clamp
JP6253748B2 (ja) * 2016-11-09 2017-12-27 東京エレクトロン株式会社 成膜方法及び成膜装置

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JPS5911663A (ja) * 1982-07-12 1984-01-21 Nec Corp 半導体装置用キヤパシタの製造方法
US5939763A (en) * 1996-09-05 1999-08-17 Advanced Micro Devices, Inc. Ultrathin oxynitride structure and process for VLSI applications
TW367612B (en) * 1996-12-26 1999-08-21 Hitachi Ltd Semiconductor device having nonvolatile memory and method of manufacture thereof
US6020243A (en) * 1997-07-24 2000-02-01 Texas Instruments Incorporated Zirconium and/or hafnium silicon-oxynitride gate dielectric
US6100160A (en) * 1998-02-17 2000-08-08 Texas Instruments Incorporated Oxide etch barrier formed by nitridation
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Also Published As

Publication number Publication date
JP2004296536A (ja) 2004-10-21
KR20050108414A (ko) 2005-11-16
US7790627B2 (en) 2010-09-07
EP1610394A1 (en) 2005-12-28
US20060180877A1 (en) 2006-08-17
US7372112B2 (en) 2008-05-13
WO2004086511A1 (ja) 2004-10-07
US20080166867A1 (en) 2008-07-10
JP4748927B2 (ja) 2011-08-17
EP1610394A4 (en) 2009-01-14

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