SU489231A1 - Device for correlation reception - Google Patents

Description

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I The invention relates to telecommunications and can be used for the correlation reception, processing and cycling of pulsed signals with relative phase motility (OFM).

A device for correlating reception of pulsed signals with a single relative phase motility is known, which contains parallel inductance and quadrature channels, each of which consists of a local multiplier connected in series to a second input, a local generator, an integrator, to the output of which a storage unit is connected, and the second multiplier, and the adder, to the output of which the decision block is connected. However, such a device performs autocorrelation (incoherent) signal reception, which reduces its noise immunity.

The purpose of the invention is to improve the noise immunity of the device. To do this, in each home channel, the output of the storage unit is connected via a serially connected first sign multiplier and an integrator to the second input of the second multiplier, the output of which is connected to the serially connected second and third sign multipliers, the generator with a reset, a block-generator and a counting trigger, with In this way, the integrator control input with a reset is connected to the output of the blocking generator, the control inputs of the first and third sign multipliers are connected to the output of the decisive device And the control input of the second sign multiplier - to yield a countable trigger.

The drawing is given a blocking diagram of the proposed device.

It contains parallel to the input in-phase 1 n quadrature 2 channels, each of which consists of a series-connected first multiplier 1-1 (2-1), integrator 1-2 (2-2), the output of which is connected in series connected storage unit 1 –3 (2–3), first sign multiplier 1–4 (2–4), and integrator 1–5 (2–5); the second multiplier 1-6 (2-6), the second input which is connected to the output of the integrator 1-5 (2-5). The output of the second multiply bodies 1-6 (2-6) is connected to the successively connected BTOpoiviy 1-7 (2-7) and the third 1-8 (2-8) sign multipliers, the integrator with reset 1-9 (2- 9), blocked by the generator 1-1 (X2-1O) and the counting trigger 1-11 (2-11), whose output is connected with the second input of the second sign peresno resident 1-7 (2-7), with: this output is blocking generator 1-10 (2-10) is connected to the integrator control input with reset 1-9 (2-9). The input of the device is the combined input of the first multipliers 1-1, 1-2, to the second inputs of which a local generator 3 is connected, and to the first multiplier 2-1 of the quadrature channel 2, the local generator 3 is connected via a phase shifter 4. To the outputs of the second sign pe. Residents 1-7, 2-7 are connected to an adder 5 connected in series with the decision block 6, the output of which is the output of the device and connected to the control inputs of the first 1-4, 2-4 and third 1-8, 2-8 signs of 1X multipliers . The combined control inputs of the storage units 1-3, 2-3 sodenoi with the input clock, the device operates as follows. A bluetooth oscillation with OFM binary signals arriving on the input device of the device passes further simultaneously into in-phase 1 and quadrant 2 channels, in each of which the input signal mixed with noise enters the input of the first multiplier 1-1 (2-1), the second input the voltage of the local oscillator 3, which is a sinusoidal oscillation with a frequency equal to the frequency of the incoming signal and an arbitrary phase, is applied to the first multiplier 2-1 of the quadrature channel 2, the local oscillator 3 signal Silent 4, Estimated maximum phase shift by 9 °. The output voltage of the first multiplier 1-1 (2-1), which is the result of the scalar product of the voltage of the signals coming from the local and local generator 3, filters with the integrator 1-2 (2-2), from the output of which the filtered voltage comes at the same time, the second multiplier 1-6 (2-6) and the storage unit 1-3 (2-3), made in the form of a time selector with a storage capacity, to the control input of which I receive clock pulses with a clock frequency. The delay of the voltage used by -i as a reference later is pro- vided by one cycle. The reference voltage through the first sign multiplier 1–4 (2–4) is fed to the integrator 1–5 (2–5), which accumulates the voltage over several cycles, as a result of which the signal-to-noise ratio increases so that when multiplying the reference voltage on the main one in the second multiplier 1-6 (2-6), noise; reference stress can be neglected. From the output of the second multiplier 1-6 (2-6), the voltage goes to the second sign multiplier 1-7 (2-7), where the signal processing takes place, as a result of which the common-mode output voltages 1 and: quadrature 2 are input to the inputs of the adder 5. channels with the same polarity, it is necessary for the correct addition of these voltages. The output voltage of the adder 5 is processed by a decision block 6, from where it is fed to the input of the third incompatible multiplier 1-8 (2-8) and to the output of the device. The third signed multiplier 1–8 (2–8) calculates the voltage in each of the channels 1 (2) with respect to the total. The voltage sign from the output of the third sign multiplier 1-8 (2-8) is positive with the same signs of the signals from the outputs of the decision block 6 (total) and the second sign multiplier 1-7 (1-8) and negative - with different signs. Negative voltage is accumulated by the integrator with a reset of 1-9 (2-9), rising to the level of operation of the blocking generator 1-10 (2-10), the output impulse of which produces a flip of the counting trigger 1-11 (2-11) and the reset of the integrator 1-9 (2-9). Reversing the counting flip-flop 111 (2-11), which controls the operation of the second-digit sign multiplier 1-7 (2-7), inverts the sign of the voltage applied to the adder 5. The operation of the first sign-multiplier 1-4 (2-4) is controlled the output voltage of the decision block 6, and the phase manipulation is removed according to the solution necessary for the voltage to be accumulated by the integrator 1-5 (2-5). As a result of the described operation of the device, there is a signal at the output corresponding to the voltage at the output of the correlation receiver. The subject of the invention. A device for the correlation reception of single-pulse signals. 1

relative phase mooul aiey, soaer -1 zhashee parallel soeainennye vhotsu on inphase and kvatsraturny channels Kazhan consisting of successively soetsinennyh first multiplier, to whose second vhotsu potsklyuchen local oscillator, an integrator, to which vyhotsu potsklyuchen storage unit and a second peremnozhntel and an adder, to the output of which a decision block is connected, characterized in that, s; an increase in noise immunity, in each channel the output of the storage unit is connected in series

connected by the first sign multiplier and integrator to the second input of the second multiplier, the output of which is connected to the serially connected second and local sign multipliers, integrator with reset, blocking generator and counting trigger, while the control input of the integrator with reset is connected to the output of blocking generator -

the torus, the control inputs of the first and third sign multipliers are connected to the output of the resolver, and the control input of the second sign multiplier is connected to the output of the counting trigger.

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