SU1571788A2 - Device for synchronous reception of frequency-manipulated signals - Google Patents

Abstract

This invention relates to radio. The purpose of the invention is to increase the reliability of reception. The device for synchronized radio frequency-manipulated signals contains amplifier 1, local oscillator 2, quadrature divider 3, mixers 4 and 5, low-pass filters 6 and 7, limit amplifiers 8 and 9, differential amplifiers-limiters 10 and 11, inverter 12 characters, elements NOT 13-16, triggers 17-24, the elements EXCLUSIVE OR 25-27, the phasing unit 28, the one-way frequency demodulator 29 and the majority unit 30. The goal is achieved by providing a reduction in distortion. 1 hp f-ly, 1 ill.

Description

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(61) 1485424 i (21) 4604827 / 24-09 (22) 07.29.88 (46) 15.06.90. Bul № 22 (72) V.V. Degt roar and S.N.Levchenko

(53) 621.394.62 (088.8)

(56) USSR Author's Certificate No. 1485424, cl. H 04 L 27/14, 1987.

(54) DEVELOPMENT OF SYNCHRONOUS RADIO ACCEPTANCE OF FREQUENCY-MANIPULAR SIGNALS

(57) The invention relates to radio. The purpose of the invention is to increase the reliability of reception. Device

synchronous radio reception of often-manipulated signals contains amplifier 1, local oscillator 2, quadrature divider 3, mixers 4 and 5, low-pass filters 6 and 7, limit amplifiers 8 and 9, differential amplifiers-limiters 10 and 11, inverter 12 characters, elements 13-16, triggers 17-24, elements EXCLUSIVE OR 25-27, phasing block 28, one-way frequency demodulator 29 and majority block 30. The goal is achieved by ensuring the reduction of distortion. 1 hp f-ly, 1 ill.

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The invention relates to radiocommunication, can be used in communication with frequency manipulation tantsii and is an improvement of the invention according to the author. St. No. 1485424.

The purpose of the invention is to increase the reliability of reception by reducing distortion.

The drawing shows a structural electrical circuit of the proposed device.

The device contains an amplifier 1, a local oscillator 2, a quadrature divider $, the first 4, the second 5 mixers, Aervy 6, the second 7 low-pass filters, the first 8, the second 9 limit amplifiers, the first 10, the second 11 differential amplifiers-limiters, an inverter 12 characters, first 13, second 14, fourth 15, third 16 elements HES first - eighth (triggers 17-24, first 25, third 26, second 27 elements EXCLUSIVE OR, phasing unit 28, one-way frequency demodulator 29, Sub-unit 30 .

The device works as follows.

The signal from amplifier 1 is fed to the first inputs of mixers 4 and 5, to the second inputs of which through quadrature divider 3 signals in quadrature (shifted by 90) are fed from local oscillator 2. Frequency of local oscillator 2 is set equal to the average frequency of the spectrum of the received signal (signal at the amplifier input one). As a result of the conversion, signals 7 are formed at the outputs of mixers 4 and 5 whose subcarriers are equal to the frequency deviation Ј «., And the mutual phase shift is 90. When the polarity of the transmitted signal changes, the mutual phase shift becomes 270. Filters 6 and 7 of the lower frequencies provide frequency selectivity and the formation of envelopes in square channels. The analog signals from the filters 6 and 7 of the low-frequency amplifiers-limiters 8 and 9 and the differential amplifiers-limiters 10 and 11 are amplified and limited and, thus, converted into digital (pulse) form

Analog signals from filters 6 and 7, respectively, are fed to limit amplifiers 8 and 9 and diff

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Potential amplifiers-limiters 10 and 11 (to the negative input of the differential amplifier-limiter 11 through the inverter 12 characters). In general, all limiter amplifiers are differential. At the same time, the negative input of limiting amplifiers 8 and 9 is connected to the housing.

From the output of the amplifier-limiter 9, the signal is fed to the D input of the trigger 17, C-input of the trigger 18 and through the element HE 13 to the C-input of the trigger 19 and D-input of the trigger 20. From the output of the amplifier 8, the signal is fed to the C-input the trigger 17, the D input of the trigger 18 and through the element NOT 14 to the D input of the trigger 19 and the C input of the trigger 20. From the output of the differential amplifier limiting 11, the signal is fed to the D input of the trigger 21, C input of the trigger 22 and through the element NOT 15 to the C input of the trigger 23 and the D input of the trigger 24. From the output of the amplifier limiter 10, the signal is fed to the C input of the trigger 21, D input three ger 22 and through the NOT element 16 to D-input of flip-flop 23 and C-24 trigger input.

The signals from the outputs of the triggers 17-24 are fed to the corresponding inputs of the majority block 30. The output of the majority block 30 is the output of the two-level signal of the device.

In the case of arriving from the flip-flops to the inputs of the majority block of 30 five or more logical 1, its output will be logical 1m, in the case of entering its inputs five or more logical O, its output will be logical O. In the case when the flip-flops come to The inputs of the majority block are four logical 1 and four logical 0, the decision is made taking into account the previous state of the majority block 30 (due to feedback from the output to the ninth input). If before that the output was 1, 1 remains, and if it was O, it remains O. Thus, the uncertainty in favor of the preceding solution is eliminated.

The signals from limiting amplifiers 8 and 9 and differential amplifiers limiting 10 and 11 through the element EXCLUSIVE OR 25 and through the element EXCLUSIVE OR 26 are combined on the element EXCLUSIVE OR

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27, at the output of which the current frequency of the digital stream, corresponding to the current level of the multi-level signal, is doubled compared to the prototype.

Claims (2)

1. The device of synchronous radio reception of the frequency-manipulated signals according to the author. St. No. 1485424, characterized in that, in order to increase the reliability of reception by reducing distortion, the first and second differential amplifiers-limiters, fifth, sixth, seventh and eighth triggers, a sign inverter, the second and third elements EXCLUSIVE OR, the third and fourth elements are introduced NOT, the output of the first element EXCLUSIVE OR is connected to the input of the phasing unit through the second element EXCLUSIVE OR, the output of the first low-pass filter is connected to the first inputs of the first and second differential limiting amplifiers Exit second lowpass filter connected to a second input of the first diffe10 717886 potential amplifier limiter and through the sign inverter with the second input of the second differential amplifier limiter, the output of the first differential amplifier limiter is connected to the C input of the fifth trigger, the D input of the sixth trigger, the first input of the third element EXCLUSIVE OR, and through the third element NOT with the D input of the seventh trigger and C-input of the eighth trigger, the output of the second differential limiting amplifier is connected to the second input. 15 House of the third element EXCLUSIVE OR, D-input of the fifth trigger, C- input of the sixth trigger and through the fourth element H C-input of the seventh flip-flop and the D-input of the eighth flip-flop, exclusive-OR output of the third element coupled to a second input of the second exclusive OR element, the outputs of the fifth, sixth, seventh and eighth flip-flops are connected to respective inputs of a majority block. 20 25 2. The device according to p. Is distinguished by the fact that the majority 3Q unit implements condition 5 of 9.