SU1196845A1 - Universal logic cell - Google Patents

Abstract

UNIVERSAL LOGIC CELL, containing two elements of equivalence ,. wherein the first and second inputs of the first equivalence element are respectively informational and first adjustment inputs of the cell, the output of the first element is connected to the first input of the second equivalence element, the second input of which is the second adjustment input of the cell, and the output of the second equivalence element is the output of t l so that, in order to increase testability, an AND-NOT element is introduced into it, with the output of the second equivalence element connected to the first input of the AND-NOT element, the output of which is connected to the third input of the first equivalence element, and the second input is VL (L is the third tuning input. cells.

Description

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- 1 1 The invention relates to automation and computing and can be used to build computer devices and homogeneous computing environments. The purpose of the invention is to increase the testability of a logical cell. The drawing shows the functional on the universal logic cell diagram. Logic cell contains information input 1, configuration inputs 2-4, AND-NOT element 5, elements 6 and 7 of equivalence, output 8. The universal logic cell works as follows. If signal Uj 0 is input to input 1, then output 8 of universal 5 cell implements a any Boolean function of two variables depending on the value of the training signals and Uj on wired 3 and 4. Moreover, the values of the training signals U and Uj are in the class of tuning alphabet C and are defined in accordance with the expressions :; and, 2 (x,)) .U2-RC i, -fJ functions f and f 2. can take the values O, 1, Xj and Xj, and the function R - is an equivalence function. In the control mode, input U1 is given a signal, Uj 1, and inputs 2-4 are signals and O, Uji O, x ;, O or, and 1, 1, X 1. At the same time, if the cell is fully functional, output 8 is observed meander with a period of 6 t -.

Claims (1)

UNIVERSAL LOGIC. CELL, containing two elements of equivalence ,. moreover, the first and second inputs of the first equivalence element are respectively the information and the first adjustment inputs of the cell, the output of the first element is connected to the first input of the second equivalence element, the second input of which is the second adjustment input of the cell, and the output of the second equivalence element is the output of the cell, from L. The main point is that, in order to increase the availability of control, an NAND element is inserted into it, and the output of the second equivalence element is connected to the first input of the NAND element, the output of which connected to the third input of the first equivalence element, and the second input is the third tuning input of the cell. ™ SU., ”1196845