RU2796445C1 - Noise rejection filter - Google Patents

Abstract

FIELD: radar engineering.

SUBSTANCE: used in coherent-pulse radar systems for extracting signals from moving targets against the background of passive interference with an unknown Doppler phase. In the noise rejection filter, the output of the clock generator is connected to the clock inputs of the delay lines. The inputs of the noise rejection filter are the inputs of the second delay block, and the outputs are the outputs of the complex adder.

EFFECT: increasing the efficiency of rejection for passive interference with a priori unknown Doppler phase and the selection of signals from moving targets.

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Description

SUBSTANCE: invention relates to radar engineering and can be used in coherent-pulse radar systems for extracting signals from moving targets against the background of passive interference with an unknown Doppler phase.

Known radar device for detecting a moving target [1], containing series-connected delay blocks, a multiplier of complex numbers and a subtractor. However, this device has a low signal separation efficiency of a moving target.

Another well-known device is a correlation autocompensator [2], which contains a number of delay blocks, two multipliers, an adder, and a block for estimating correlated interference parameters. The disadvantage of this device is the poor suppression of the edges of extended interference due to the large time constant of the adaptive feedback loop.

Closest to this invention, a digital device for suppressing passive interference [3], selected as a prototype, contains a weight block, a complex adder and delay blocks. However, this device has a loss in interference rejection efficiency.

The problem solved in the invention is to increase the efficiency of rejection of passive interference and the selection of signals from moving targets when processing signals from the target against the background of passive interference with a priori unknown Doppler phase.

To solve the problem, the noise rejection filter, which contains the first delay block, the complex adder and the clock generator, includes the second and third delay blocks, the complex multiplier, the complex inverter and the Doppler phase meter, interconnected in a certain way.

The essence of the invention as a technical solution is characterized by a set of essential features set forth in the claims and providing a solution to the problem by optimal and consistent processing of incoming pulses.

The technical result of the invention consists in increasing the efficiency of rejecting passive interference with a priori unknown Doppler phase and separating signals from moving targets.

In FIG. 1 shows a block diagram of the noise rejection filter; in fig. 2 - block delay; in fig. 3 - complex adder; in fig. 4 - complex multiplier; fig. 5 - complex inverter; in fig. 6 - Doppler phase meter; in fig. 7 - block of complex conjugation; in fig. 8 - drive.

The noise rejection filter (Fig. 1) contains delay blocks 1, 4, 5, a complex adder 2, a clock generator 3, a complex multiplier 6, a complex inverter 7 and a Doppler phase meter 8.

Blocks 1, 4, 5 delay (Fig. 2) contain two delay lines 9; complex adder 2 (Fig. 3) contains two adders 10; complex multipliers 6, 16 (Fig. 4) contain two channels (I, II), each of which includes the first and second multipliers 11, 12 and the adder 13; complex inverter 7 (Fig. 5) contain two sign inverter 14; Doppler phase meter 8 (Fig. 6) contains a complex conjugation unit 15, a complex multiplier 16, two accumulators 17, a modulus calculation unit 18, and two dividers 19; block 15 complex conjugation (Fig. 7) contains a sign inverter 20; each drive 17 (Fig. 8) contains n delay elements 21 for the interval t _d and n adders 22.

The noise rejection filter can be implemented as follows.

Entering the input of the proposed device (Fig. 1) digital readings (x _kl , y _kl ) follow through the repetition period T and in each resolution element in range (range ring) of each repetition period form a sequence of complex numbers

where k is the number of the current period, l is the number of the current range ring, ϕ _l is the Doppler phase shift over the repetition period (Doppler phase), usually interference, due to its significant excess over the signal.

Digital readings in the proposed device (Fig. 1) are fed to the connected inputs of the second delay block 4 (Fig. 2) for the interval τ and the first inputs of the Doppler phase meter 8 (Fig. 6). The second inputs of the Doppler phase meter 8 receive readings from the output of the first delay block 1 for the interval T - τ. The readings at the first and second inputs of the Doppler phase meter 8 are divided into interval T.

In the inverter 20 (Fig. 7) of the block 15 of the complex conjugation of the meter 8 (Fig. 6), the sign of the imaginary projections of the delayed readings is inverted. In the complex multiplier 16, the corresponding complex numbers are multiplied by operations with projections of these numbers in accordance with FIG. 4 and leading to the formation of quantities

строба, кроме элемента с номером n/2+1, для чего выходные величины элемента 21 задержки с номером n/2 поступают только на последующий элемент 21 задержки (фиг. 8). В результате накопления образуются величиныIn the drives 17 (Fig. 6) with the help of delay elements 21 and adders 22 (Fig. 8), the summation of the projections ReX _kl and ImX _kl with n + 1 adjacent elements of resolution in range is carried out sliding along the range in each repetition period

strobe, except for the element with the number n/2+1, for which the output values of the delay element 21 with the number n/2 are fed only to the subsequent delay element 21 (Fig. 8). As a result of accumulation, the quantities

- оценка доплеровского сдвига фазы помехи за период повторения Т, усредненная по n смежным элементам разрешения по дальности.Where

- estimation of the Doppler shift of the interference phase over the repetition period T, averaged over n adjacent range resolution bins.

, а затем на выходах делителей 19 (фиг. 6) - величины

поступающие на вторые входы комплексного перемножителя 6. Накопление n отсчетов обеспечивает высокоточное измерение величины

In block 18, the calculation of the module determines the values

, and then at the outputs of dividers 19 (Fig. 6) - values

coming to the second inputs of the complex multiplier 6. The accumulation of n counts provides a high-precision measurement of the quantity

инвертирования знаков в инверторах 14 (фиг. 5) задержанных отсчетов и синфазных суммирований в комплексном сумматоре 2 на выходе последнего отсчеты остатков помехи имеют видThe third delay block 5 for the interval τ together with the first delay block 1 for the interval T-τ form the resulting delay for the interval T. As a result, the inputs of the complex adder 2 receive samples synchronously. Taking into account complex multiplication with the value

inversion of signs in inverters 14 (Fig. 5) of delayed samples and in-phase summations in complex adder 2 at the output of the latter, the readings of residual interference have the form

обеспечивает необходимую для компенсации помехи синфазность суммируемых отсчетов. Отсчеты сигнала от движущейся цели из-за сохранения доплеровских сдвигов фазы сигнала не подавляются.Two-dimensional rotation of delayed readings in complex multiplier 6 by an angle

provides the in-phase of the summarized readings necessary for interference compensation. Signal samples from a moving target are not suppressed due to the preservation of Doppler phase shifts of the signal.

среднему элементу обучающей выборки, исключенному в накопителях 17 (фиг. 8). Величина τ определяется выражениемThe introduction of the second delay block 4 for the interval τ ensures that the estimates

the middle element of the training sample, excluded in the drives 17 (Fig. 8). The value of τ is determined by the expression

τ=t _in +nt _d /2,

n - количество элементов обучающей выборки, t_д - интервал (период) временной дискретизации.where t _in is the time of calculating the estimate

n is the number of elements of the training sample, t _d is the interval (period) of time sampling.

среднему элементу, исключенному из обучающей выборки. Тогда в случае сигнала, соизмеримого по величине с помехой, или разрывной помехи при компенсации отсчетов помехи с элемента разрешения, содержащего сигнал, исключается возможность ослабления или подавления сигнала за счет его влияния на используемые оценки. Кроме того, уменьшаются ошибки за счет рассогласования между оцениваемой и действительной величинами доплеровской фазы помехи.In this case, the correspondence of the estimate introduced into the complex multiplier 6 is achieved

the middle element excluded from the training sample. Then, in the case of a signal commensurate in magnitude with the interference, or discontinuous interference, when compensating for interference samples from the resolution element containing the signal, the possibility of attenuating or suppressing the signal due to its influence on the estimates used is excluded. In addition, errors are reduced due to the mismatch between the estimated and actual values of the Doppler phase of the interference.

Synchronization of the noise rejection filter is carried out by applying to all blocks of the proposed device a sequence of clock pulses from the clock generator 3 (Fig. 1).

The achieved technical result consists in increasing the efficiency of passive interference compensation with an a priori unknown Doppler phase and the selection of signals from moving targets, which is ensured by increasing the accuracy of estimating the Doppler phase of the interference and reducing the mismatch between the estimates obtained by averaging the samples of the training sample and those corresponding to the average element of the training sample.

Thus, the interference rejection filter makes it possible to increase the efficiency of suppressing passive interference and isolating signals from moving targets against the background of passive interference with an a priori unknown Doppler phase.

Bibliography

1. Patent No. 63-49193 (Japan), IPC G01S 13/52. Radar device for detecting a moving target / K.K. Toshiba. Published 03.10.1988. - Inventions of the countries of the world. - 1989. - Issue 109. - No. 15. - S. 52.

2. Radioelectronic systems: fundamentals of construction and theory. Directory / Ya.D. Shirman, S.T. Bagdasaryan, A.S. Malyarenko, D.I. Lekhovitsky [and others]; under the editorship of Ya.D. Shirman. - 2nd ed., revised. and additional - M.: Radio engineering, 2007; With. 439, fig. 25.22.

3. A.s. 743208 USSR, IPC G01S 7/36. Digital device for passive interference suppression / D.I. Popov. - No. 2540079/09; dec. 03.11.1977; publ. 06/25/1980, Bull. No. 23. - 4 s.

Claims (1)

An interference rejection filter comprising a first delay block containing delay lines, a complex adder, a second delay block containing delay lines, a third delay block, a complex multiplier, a complex inverter, a Doppler phase meter and a clock generator, while the inputs of the first delay block are connected to the first inputs complex adder, the inputs of the second delay block are connected to the first inputs of the Doppler phase meter, the outputs of the second delay block are connected to the inputs of the first delay block, the outputs of which are connected to the inputs of the third delay block and the second inputs of the Doppler phase meter, the outputs of which are connected to the second inputs of the complex multiplier, the outputs of the third delay block are connected to the first inputs of the complex multiplier, the outputs of which are connected to the inputs of the complex inverter, the outputs of which are connected to the second inputs of the complex adder, the output of the clock generator is connected to the clock inputs of the complex adder, the third delay block, the complex multiplier, the complex inverter and the Doppler phase meter, characterized in that the output of the clock generator is connected to the clock inputs of the delay lines, and the inputs of the noise rejection filter are the inputs of the second delay block, and the outputs are the outputs of the complex adder.

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